On Tue, Sep 05, 2017 at 12:07:59PM +0100, John Garry wrote:
> >>
> >>Hi Will, Lorenzo, Robin,
> >>
> >>I have created the patch to add DT support for this erratum.
> >>However, currently I have only added support for pci-based devices.
> >>I'm a bit stumped on how to add platform device support,
Hi Will, Lorenzo, Robin,
I have created the patch to add DT support for this erratum.
However, currently I have only added support for pci-based devices.
I'm a bit stumped on how to add platform device support, or if we
should also add support at all. And I would rather ask before
sending the
On 10/08/2017 18:27, Will Deacon wrote:
On Wed, Aug 09, 2017 at 11:07:15AM +0100, Shameer Kolothum wrote:
The HiSilicon erratum 161010801 describes the limitation of HiSilicon
platforms Hip06/Hip07 to support the SMMU mappings for MSI transactions.
On these platforms GICv3 ITS translator is
On 24/08/2017 15:35, Will Deacon wrote:
> >>OK, seems reasonable.
> >>
> >>We would consider blacklisting the device, where/how to do is the question.
> >>
> >>So the errata is in the GICv3 ITS/PCI host controller, and we just use the
> >>in-between SMMU (driver) to provide the workaround. So my
On Wed, Aug 23, 2017 at 05:55:52PM +0100, John Garry wrote:
> On 23/08/2017 17:43, Will Deacon wrote:
> >On Wed, Aug 23, 2017 at 03:29:46PM +0100, John Garry wrote:
> >>On 23/08/2017 14:24, Will Deacon wrote:
> >>>On Wed, Aug 23, 2017 at 02:17:24PM +0100, John Garry wrote:
> >>>Signed-off-by:
On 23/08/2017 17:43, Will Deacon wrote:
On Wed, Aug 23, 2017 at 03:29:46PM +0100, John Garry wrote:
On 23/08/2017 14:24, Will Deacon wrote:
On Wed, Aug 23, 2017 at 02:17:24PM +0100, John Garry wrote:
Signed-off-by: Shameer Kolothum
---
On Wed, Aug 23, 2017 at 03:29:46PM +0100, John Garry wrote:
> On 23/08/2017 14:24, Will Deacon wrote:
> >On Wed, Aug 23, 2017 at 02:17:24PM +0100, John Garry wrote:
> >Signed-off-by: Shameer Kolothum
>
> >---
> >drivers/iommu/arm-smmu-v3.c |
On 23/08/2017 14:24, Will Deacon wrote:
On Wed, Aug 23, 2017 at 02:17:24PM +0100, John Garry wrote:
Signed-off-by: Shameer Kolothum
---
drivers/iommu/arm-smmu-v3.c | 27 ++-
1 file changed, 22 insertions(+), 5 deletions(-)
Please
On Wed, Aug 23, 2017 at 02:17:24PM +0100, John Garry wrote:
> >>>Signed-off-by: Shameer Kolothum
> >>
> >>>---
> >>> drivers/iommu/arm-smmu-v3.c | 27 ++-
> >>> 1 file changed, 22 insertions(+), 5 deletions(-)
> >>
> >>Please can you
Signed-off-by: Shameer Kolothum
---
drivers/iommu/arm-smmu-v3.c | 27 ++-
1 file changed, 22 insertions(+), 5 deletions(-)
Please can you also add a devicetree binding with corresponding
documentation to enable this workaround on
ro.org;
> Gabriele Paoloni; John Garry; iommu@lists.linux-foundation.org; linux-arm-
> ker...@lists.infradead.org; linux-a...@vger.kernel.org; de...@acpica.org;
> Linuxarm; Wangzhou (B); Guohanjun (Hanjun Guo)
> Subject: Re: [PATCH v6 3/3] iommu/arm-smmu-v3:Enable ACPI based
> HiSili
On Wed, Aug 09, 2017 at 11:07:15AM +0100, Shameer Kolothum wrote:
> The HiSilicon erratum 161010801 describes the limitation of HiSilicon
> platforms Hip06/Hip07 to support the SMMU mappings for MSI transactions.
>
> On these platforms GICv3 ITS translator is presented with the deviceID
> by
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