On Mon, Feb 02, 2015 at 10:20:49AM +, Will Deacon wrote:
On Fri, Jan 30, 2015 at 09:55:55PM +, Arnd Bergmann wrote:
- reg = (iova ~0xfff) 32;
+ reg = ((u64)iova ~0xfff) 32;
writel_relaxed(reg, cb_base + ARM_SMMU_CB_ATS1PR_HI);
}
Thanks,
On Fri, Jan 30, 2015 at 09:55:55PM +, Arnd Bergmann wrote:
ARM allmodconfig gained a new warning when dma_addr_t is 32-bit wide:
drivers/iommu/arm-smmu.c: In function 'arm_smmu_iova_to_phys_hard':
drivers/iommu/arm-smmu.c:1255:3: warning: right shift count = width of type
This changes
ARM allmodconfig gained a new warning when dma_addr_t is 32-bit wide:
drivers/iommu/arm-smmu.c: In function 'arm_smmu_iova_to_phys_hard':
drivers/iommu/arm-smmu.c:1255:3: warning: right shift count = width of type
This changes the calculation so that the effective type is always
64-bit.
