On Fri, 22 Jan 2021 12:52:55 +0100
Jean-Philippe Brucker wrote:
> To support sharing page tables with the CPU, the SMMU can participate in
> Broadcast TLB Maintenance (BTM), where TLB invalidate instructions from
> the CPU are received by the SMMU. For platforms that do no implement BTM
> [1], it
To support sharing page tables with the CPU, the SMMU can participate in
Broadcast TLB Maintenance (BTM), where TLB invalidate instructions from
the CPU are received by the SMMU. For platforms that do no implement BTM
[1], it is still possible to use SVA, by sending all TLB invalidations
through th
