Re: [PATCH RESEND v9 08/13] iommu/arm-smmu-v3: Share process page tables

2020-09-17 Thread Jean-Philippe Brucker
On Tue, Sep 08, 2020 at 09:41:20AM +0200, Auger Eric wrote: > > +static struct arm_smmu_ctx_desc *arm_smmu_alloc_shared_cd(struct mm_struct > > *mm) > > +{ > > + u16 asid; > > + int err = 0; > > + u64 tcr, par, reg; > > + struct arm_smmu_ctx_desc *cd; > > + struct arm_smmu_ctx_desc *ret

Re: [PATCH RESEND v9 08/13] iommu/arm-smmu-v3: Share process page tables

2020-09-08 Thread Auger Eric
Hi Jean, On 8/17/20 7:15 PM, Jean-Philippe Brucker wrote: > With Shared Virtual Addressing (SVA), we need to mirror CPU TTBR, TCR, > MAIR and ASIDs in SMMU contexts. Each SMMU has a single ASID space split > into two sets, shared and private. Shared ASIDs correspond to those > obtained from the

[PATCH RESEND v9 08/13] iommu/arm-smmu-v3: Share process page tables

2020-08-17 Thread Jean-Philippe Brucker
With Shared Virtual Addressing (SVA), we need to mirror CPU TTBR, TCR, MAIR and ASIDs in SMMU contexts. Each SMMU has a single ASID space split into two sets, shared and private. Shared ASIDs correspond to those obtained from the arch ASID allocator, and private ASIDs are used for "classic"