On Thu, Jul 03, 2014 at 09:57:02AM -0600, Alex Williamson wrote:
The user of the IOMMU API domain expects to have full control of
the IOVA space for the domain. RMRRs are fundamentally incompatible
with that idea. We can neither map the RMRR into the IOMMU API
domain, nor can we guarantee
The user of the IOMMU API domain expects to have full control of
the IOVA space for the domain. RMRRs are fundamentally incompatible
with that idea. We can neither map the RMRR into the IOMMU API
domain, nor can we guarantee that the device won't continue DMA with
the area described by the RMRR
On Thu, 2014-06-19 at 08:10 +0200, Daniel Vetter wrote:
On Thu, Jun 19, 2014 at 3:47 AM, Alex Williamson
alex.william...@redhat.com wrote:
Finding some more specs... the MGGC0 register (50h) seems to indicate
the GTT stolen memory size is 2M, which sounds suspiciously like the 2M
that the
On Tue, 2014-06-17 at 15:44 +0200, Daniel Vetter wrote:
On Tue, Jun 17, 2014 at 07:16:22AM -0600, Alex Williamson wrote:
On Tue, 2014-06-17 at 13:41 +0100, David Woodhouse wrote:
On Tue, 2014-06-17 at 06:22 -0600, Alex Williamson wrote:
On Tue, 2014-06-17 at 08:04 +0100, David Woodhouse
On Wed, 2014-06-18 at 15:48 -0600, Alex Williamson wrote:
On Tue, 2014-06-17 at 15:44 +0200, Daniel Vetter wrote:
On Tue, Jun 17, 2014 at 07:16:22AM -0600, Alex Williamson wrote:
On Tue, 2014-06-17 at 13:41 +0100, David Woodhouse wrote:
On Tue, 2014-06-17 at 06:22 -0600, Alex Williamson
On Mon, 2014-06-16 at 23:35 -0600, Alex Williamson wrote:
Any idea what an off-the-shelf Asus motherboard would be doing with an
RMRR on the Intel HD graphics?
dmar: RMRR base: 0x00bb80 end: 0x00bf9f
IOMMU: Setting identity map for device :00:02.0 [0xbb80 -
On Tue, 2014-06-17 at 09:15 +0200, Daniel Vetter wrote:
We've always been struggling with stolen handling, and we've' always
been struggling with vt-d stuff. Also pass-through seems to be a major
pain (I've never tried myself). Given all that I'm voting for keeping
the RMRR and everything else
On Tue, 2014-06-17 at 08:04 +0100, David Woodhouse wrote:
On Mon, 2014-06-16 at 23:35 -0600, Alex Williamson wrote:
Any idea what an off-the-shelf Asus motherboard would be doing with an
RMRR on the Intel HD graphics?
dmar: RMRR base: 0x00bb80 end: 0x00bf9f
IOMMU:
On Tue, 2014-06-17 at 06:22 -0600, Alex Williamson wrote:
On Tue, 2014-06-17 at 08:04 +0100, David Woodhouse wrote:
On Mon, 2014-06-16 at 23:35 -0600, Alex Williamson wrote:
Any idea what an off-the-shelf Asus motherboard would be doing with an
RMRR on the Intel HD graphics?
On Tue, 2014-06-17 at 15:44 +0200, Daniel Vetter wrote:
On Tue, Jun 17, 2014 at 07:16:22AM -0600, Alex Williamson wrote:
On Tue, 2014-06-17 at 13:41 +0100, David Woodhouse wrote:
On Tue, 2014-06-17 at 06:22 -0600, Alex Williamson wrote:
On Tue, 2014-06-17 at 08:04 +0100, David Woodhouse
On Tue, 2014-06-17 at 18:45 +0200, Daniel Vetter wrote:
On Tue, Jun 17, 2014 at 08:15:47AM -0600, Alex Williamson wrote:
On Tue, 2014-06-17 at 15:44 +0200, Daniel Vetter wrote:
On Tue, Jun 17, 2014 at 07:16:22AM -0600, Alex Williamson wrote:
On Tue, 2014-06-17 at 13:41 +0100, David
On Fri, 2014-06-13 at 10:30 -0600, Alex Williamson wrote:
The user of the IOMMU API domain expects to have full control of
the IOVA space for the domain. RMRRs are fundamentally incompatible
with that idea. We can neither map the RMRR into the IOMMU API
domain, nor can we guarantee that the
The user of the IOMMU API domain expects to have full control of
the IOVA space for the domain. RMRRs are fundamentally incompatible
with that idea. We can neither map the RMRR into the IOMMU API
domain, nor can we guarantee that the device won't continue DMA with
the area described by the RMRR
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