Re: [PATCH v4 2/2] dts: arm64/sdm845: Add node for arm,mmu-500
On Tue 08 Jan 03:18 PST 2019, Vivek Gautam wrote:
>
> On 1/8/2019 12:29 PM, Bjorn Andersson wrote:
> > On Thu 11 Oct 02:49 PDT 2018, Vivek Gautam wrote:
> >
> > > Add device node for arm,mmu-500 available on sdm845.
> > > This MMU-500 with single TCU and multiple TBU architecture
> > > is shared among all the peripherals except gpu.
> > >
> > Hi Vivek,
> >
> > Applying this patch together with UFS ([1] and [2]) ontop of v5.0-rc1
> > causes my MTP reboot once the UFSHCD module is inserted and probed.
> > Independently the patches seems to work fine.
> >
> > Do you have any suggestion to why this would be?
>
>
> Hi Bjorn,
>
> Enabling SMMU on sdm845 when you have UFS also enabled, would need addition
> of
> 'iommus' property to ufs dt node.
> You will need to add the following with ufs:
>
> iommus = <_smmu 0x100 0xf>;
>
Thanks, this do address the sudden restart of my MTP, but provides a
fault.
[7.391117] arm-smmu 1500.iommu: Unhandled context fault: fsr=0x402,
iova=0xdf3e0, fsynr=0x29, cb=0
[7.747406] ufshcd-qcom 1d84000.ufshc: ufshcd_verify_dev_init: NOP OUT
failed -11
The only thing done ontop of v5.0-rc1, is to take your patch adding
apps_smmu, add the ufs nodes as Evan proposed and specify iommus in the
ufshcd node.
With Coreboot UFS seems to work without specifying iommus, but with it
UFS fails to come up.
Regards,
Bjorn
> Thanks
> Vivek
>
> >
> > [1]
> > https://lore.kernel.org/lkml/20181210192826.241350-4-evgr...@chromium.org/
> > [2]
> > https://lore.kernel.org/lkml/20181210192826.241350-5-evgr...@chromium.org/
> >
> > Regards,
> > Bjorn
> >
> > > Signed-off-by: Vivek Gautam
> > > ---
> > >
> > > Changes since v3:
> > > - none.
> > >
> > > arch/arm64/boot/dts/qcom/sdm845.dtsi | 72
> > >
> > > 1 file changed, 72 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > > b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > > index b72bdb0a31a5..0aace729643d 100644
> > > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > > @@ -1297,6 +1297,78 @@
> > > cell-index = <0>;
> > > };
> > > + apps_smmu: iommu@1500 {
> > > + compatible = "qcom,sdm845-smmu-500", "arm,mmu-500";
> > > + reg = <0x1500 0x8>;
> > > + #iommu-cells = <2>;
> > > + #global-interrupts = <1>;
> > > + interrupts = ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
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> > > + ,
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> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > + ,
> > > +
Re: [PATCH v4 2/2] dts: arm64/sdm845: Add node for arm,mmu-500
On 1/8/2019 12:29 PM, Bjorn Andersson wrote:
On Thu 11 Oct 02:49 PDT 2018, Vivek Gautam wrote:
Add device node for arm,mmu-500 available on sdm845.
This MMU-500 with single TCU and multiple TBU architecture
is shared among all the peripherals except gpu.
Hi Vivek,
Applying this patch together with UFS ([1] and [2]) ontop of v5.0-rc1
causes my MTP reboot once the UFSHCD module is inserted and probed.
Independently the patches seems to work fine.
Do you have any suggestion to why this would be?
Hi Bjorn,
Enabling SMMU on sdm845 when you have UFS also enabled, would need
addition of
'iommus' property to ufs dt node.
You will need to add the following with ufs:
iommus = <_smmu 0x100 0xf>;
Thanks
Vivek
[1] https://lore.kernel.org/lkml/20181210192826.241350-4-evgr...@chromium.org/
[2] https://lore.kernel.org/lkml/20181210192826.241350-5-evgr...@chromium.org/
Regards,
Bjorn
Signed-off-by: Vivek Gautam
---
Changes since v3:
- none.
arch/arm64/boot/dts/qcom/sdm845.dtsi | 72
1 file changed, 72 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index b72bdb0a31a5..0aace729643d 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -1297,6 +1297,78 @@
cell-index = <0>;
};
+ apps_smmu: iommu@1500 {
+ compatible = "qcom,sdm845-smmu-500", "arm,mmu-500";
+ reg = <0x1500 0x8>;
+ #iommu-cells = <2>;
+ #global-interrupts = <1>;
+ interrupts = ,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
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+,
+,
+,
+,
+,
+,
+,
+,
+,
+;
+ };
+
apss_shared: mailbox@1799 {
compatible = "qcom,sdm845-apss-shared";
reg = <0x1799 0x1000>;
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
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Re: [PATCH v4 2/2] dts: arm64/sdm845: Add node for arm,mmu-500
On Thu 11 Oct 02:49 PDT 2018, Vivek Gautam wrote:
> Add device node for arm,mmu-500 available on sdm845.
> This MMU-500 with single TCU and multiple TBU architecture
> is shared among all the peripherals except gpu.
>
Hi Vivek,
Applying this patch together with UFS ([1] and [2]) ontop of v5.0-rc1
causes my MTP reboot once the UFSHCD module is inserted and probed.
Independently the patches seems to work fine.
Do you have any suggestion to why this would be?
[1] https://lore.kernel.org/lkml/20181210192826.241350-4-evgr...@chromium.org/
[2] https://lore.kernel.org/lkml/20181210192826.241350-5-evgr...@chromium.org/
Regards,
Bjorn
> Signed-off-by: Vivek Gautam
> ---
>
> Changes since v3:
> - none.
>
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 72
>
> 1 file changed, 72 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index b72bdb0a31a5..0aace729643d 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -1297,6 +1297,78 @@
> cell-index = <0>;
> };
>
> + apps_smmu: iommu@1500 {
> + compatible = "qcom,sdm845-smmu-500", "arm,mmu-500";
> + reg = <0x1500 0x8>;
> + #iommu-cells = <2>;
> + #global-interrupts = <1>;
> + interrupts = ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ;
> + };
> +
> apss_shared: mailbox@1799 {
> compatible = "qcom,sdm845-apss-shared";
> reg = <0x1799 0x1000>;
> --
> QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
> of Code Aurora Forum, hosted by The Linux Foundation
>
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iommu mailing list
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[PATCH v4 2/2] dts: arm64/sdm845: Add node for arm,mmu-500
Add device node for arm,mmu-500 available on sdm845.
This MMU-500 with single TCU and multiple TBU architecture
is shared among all the peripherals except gpu.
Signed-off-by: Vivek Gautam
---
Changes since v3:
- none.
arch/arm64/boot/dts/qcom/sdm845.dtsi | 72
1 file changed, 72 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index b72bdb0a31a5..0aace729643d 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -1297,6 +1297,78 @@
cell-index = <0>;
};
+ apps_smmu: iommu@1500 {
+ compatible = "qcom,sdm845-smmu-500", "arm,mmu-500";
+ reg = <0x1500 0x8>;
+ #iommu-cells = <2>;
+ #global-interrupts = <1>;
+ interrupts = ,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+,
+;
+ };
+
apss_shared: mailbox@1799 {
compatible = "qcom,sdm845-apss-shared";
reg = <0x1799 0x1000>;
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
___
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
