Re: [RESEND,PATCH 01/13] dt-bindings: mediatek: Add bindings for MT6779
On Mon, 2019-12-16 at 20:05 +0800, Yong Wu wrote: > On Mon, 2019-11-04 at 19:52 +0800, Chao Hao wrote: > > This patch adds description for MT6779 IOMMU. > > > > MT6779 has two iommus, they are MM_IOMMU and APU_IOMMU which > > use ARM Short-Descriptor translation format. > > > > The MT6779 IOMMU hardware diagram is as below, it is only a brief > > diagram about iommu, it don't focus on the part of smi_larb, so > > I don't describe the smi_larb detailedly. > > > > EMI > > | > >-- > >|| > > MM_IOMMUAPU_IOMMU > >|| > >SMI_COMMOM--- APU_BUS > > ||| > > SMI_LARB(0~11) SMI_LARB12(FAKE)SMI_LARB13(FAKE) > > ||| > > || -- > > || | | | > >Multimedia engine CCU VPU MDLA EMDA > > > > All the connections are hardware fixed, software can not adjust it. > > > > From the diagram above, MM_IOMMU provides mapping for multimedia engine, > > but CCU is connected with smi_common directly, we can take them as larb12. > > APU_IOMMU provides mapping for APU engine, we can take them larb13. > > Larb12 and Larb13 are fake larbs. > > > > Signed-off-by: Chao Hao > > --- > > .../bindings/iommu/mediatek,iommu.txt | 2 + > > include/dt-bindings/memory/mt6779-larb-port.h | 217 ++ > > 2 files changed, 219 insertions(+) > > create mode 100644 include/dt-bindings/memory/mt6779-larb-port.h > > > > diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt > > b/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt > > index ce59a505f5a4..c1ccd8582eb2 100644 > > --- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt > > +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt > > @@ -58,6 +58,7 @@ Required properties: > > - compatible : must be one of the following string: > > "mediatek,mt2701-m4u" for mt2701 which uses generation one m4u HW. > > "mediatek,mt2712-m4u" for mt2712 which uses generation two m4u HW. > > + "mediatek,mt6779-m4u" for mt6779 which uses generation two m4u HW. > > "mediatek,mt7623-m4u", "mediatek,mt2701-m4u" for mt7623 which uses > > generation one m4u HW. > > "mediatek,mt8173-m4u" for mt8173 which uses generation two m4u HW. > > @@ -78,6 +79,7 @@ Required properties: > > Specifies the mtk_m4u_id as defined in > > dt-binding/memory/mt2701-larb-port.h for mt2701, mt7623 > > dt-binding/memory/mt2712-larb-port.h for mt2712, > > + dt-binding/memory/mt6779-larb-port.h for mt6779, > > dt-binding/memory/mt8173-larb-port.h for mt8173, and > > dt-binding/memory/mt8183-larb-port.h for mt8183. > > > > diff --git a/include/dt-bindings/memory/mt6779-larb-port.h > > b/include/dt-bindings/memory/mt6779-larb-port.h > > new file mode 100644 > > index ..8b7f2d2446ea > > --- /dev/null > > +++ b/include/dt-bindings/memory/mt6779-larb-port.h > > @@ -0,0 +1,217 @@ > > +/* SPDX-License-Identifier: GPL-2.0 */ > > +/* > > + * Copyright (c) 2019 MediaTek Inc. > > + * Author: Chao Hao > > + */ > > + > > +#ifndef _DTS_IOMMU_PORT_MT6779_H_ > > +#define _DTS_IOMMU_PORT_MT6779_H_ > > + > > +#define MTK_M4U_ID(larb, port) (((larb) << 5) | (port)) > > + > > +#define M4U_LARB0_ID0 > > +#define M4U_LARB1_ID1 > > +#define M4U_LARB2_ID2 > > +#define M4U_LARB3_ID3 > > +#define M4U_LARB4_ID4 > > +#define M4U_LARB5_ID5 > > +#define M4U_LARB6_ID6 > > +#define M4U_LARB7_ID7 > > +#define M4U_LARB8_ID8 > > +#define M4U_LARB9_ID9 > > +#define M4U_LARB10_ID 10 > > +#define M4U_LARB11_ID 11 > > +#define M4U_LARB12_ID 12 > > +#define M4U_LARB13_ID 13 > > + > > +/* larb0 */ > > +#define M4U_PORT_DISP_POSTMASK0 MTK_M4U_ID(M4U_LARB0_ID, 0) > > +#define M4U_PORT_DISP_OVL0_HDR MTK_M4U_ID(M4U_LARB0_ID, 1) > > +#define M4U_PORT_DISP_OVL1_HDR MTK_M4U_ID(M4U_LARB0_ID, 2) > > +#define M4U_PORT_DISP_OVL0 MTK_M4U_ID(M4U_LARB0_ID, 3) > > +#define M4U_PORT_DISP_OVL1 MTK_M4U_ID(M4U_LARB0_ID, 4) > > +#define M4U_PORT_DISP_PVRIC0MTK_M4U_ID(M4U_LARB0_ID, 5) > > +#define M4U_PORT_DISP_RDMA0 MTK_M4U_ID(M4U_LARB0_ID, 6) > > +#define M4U_PORT_DISP_WDMA0 MTK_M4U_ID(M4U_LARB0_ID, 7) > > +#define
Re: [RESEND,PATCH 01/13] dt-bindings: mediatek: Add bindings for MT6779
On Mon, 2019-11-04 at 19:52 +0800, Chao Hao wrote: > This patch adds description for MT6779 IOMMU. > > MT6779 has two iommus, they are MM_IOMMU and APU_IOMMU which > use ARM Short-Descriptor translation format. > > The MT6779 IOMMU hardware diagram is as below, it is only a brief > diagram about iommu, it don't focus on the part of smi_larb, so > I don't describe the smi_larb detailedly. > >EMI > | > -- > || > MM_IOMMUAPU_IOMMU > || >SMI_COMMOM--- APU_BUS > | || > SMI_LARB(0~11) SMI_LARB12(FAKE) SMI_LARB13(FAKE) > ||| > || -- > || | | | >Multimedia engineCCU VPU MDLA EMDA > > All the connections are hardware fixed, software can not adjust it. > > From the diagram above, MM_IOMMU provides mapping for multimedia engine, > but CCU is connected with smi_common directly, we can take them as larb12. > APU_IOMMU provides mapping for APU engine, we can take them larb13. > Larb12 and Larb13 are fake larbs. > > Signed-off-by: Chao Hao > --- > .../bindings/iommu/mediatek,iommu.txt | 2 + > include/dt-bindings/memory/mt6779-larb-port.h | 217 ++ > 2 files changed, 219 insertions(+) > create mode 100644 include/dt-bindings/memory/mt6779-larb-port.h > > diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt > b/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt > index ce59a505f5a4..c1ccd8582eb2 100644 > --- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt > +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt > @@ -58,6 +58,7 @@ Required properties: > - compatible : must be one of the following string: > "mediatek,mt2701-m4u" for mt2701 which uses generation one m4u HW. > "mediatek,mt2712-m4u" for mt2712 which uses generation two m4u HW. > + "mediatek,mt6779-m4u" for mt6779 which uses generation two m4u HW. > "mediatek,mt7623-m4u", "mediatek,mt2701-m4u" for mt7623 which uses >generation one m4u HW. > "mediatek,mt8173-m4u" for mt8173 which uses generation two m4u HW. > @@ -78,6 +79,7 @@ Required properties: > Specifies the mtk_m4u_id as defined in > dt-binding/memory/mt2701-larb-port.h for mt2701, mt7623 > dt-binding/memory/mt2712-larb-port.h for mt2712, > + dt-binding/memory/mt6779-larb-port.h for mt6779, > dt-binding/memory/mt8173-larb-port.h for mt8173, and > dt-binding/memory/mt8183-larb-port.h for mt8183. > > diff --git a/include/dt-bindings/memory/mt6779-larb-port.h > b/include/dt-bindings/memory/mt6779-larb-port.h > new file mode 100644 > index ..8b7f2d2446ea > --- /dev/null > +++ b/include/dt-bindings/memory/mt6779-larb-port.h > @@ -0,0 +1,217 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * Copyright (c) 2019 MediaTek Inc. > + * Author: Chao Hao > + */ > + > +#ifndef _DTS_IOMMU_PORT_MT6779_H_ > +#define _DTS_IOMMU_PORT_MT6779_H_ > + > +#define MTK_M4U_ID(larb, port)(((larb) << 5) | (port)) > + > +#define M4U_LARB0_ID 0 > +#define M4U_LARB1_ID 1 > +#define M4U_LARB2_ID 2 > +#define M4U_LARB3_ID 3 > +#define M4U_LARB4_ID 4 > +#define M4U_LARB5_ID 5 > +#define M4U_LARB6_ID 6 > +#define M4U_LARB7_ID 7 > +#define M4U_LARB8_ID 8 > +#define M4U_LARB9_ID 9 > +#define M4U_LARB10_ID 10 > +#define M4U_LARB11_ID 11 > +#define M4U_LARB12_ID 12 > +#define M4U_LARB13_ID 13 > + > +/* larb0 */ > +#define M4U_PORT_DISP_POSTMASK0 MTK_M4U_ID(M4U_LARB0_ID, 0) > +#define M4U_PORT_DISP_OVL0_HDRMTK_M4U_ID(M4U_LARB0_ID, 1) > +#define M4U_PORT_DISP_OVL1_HDRMTK_M4U_ID(M4U_LARB0_ID, 2) > +#define M4U_PORT_DISP_OVL0MTK_M4U_ID(M4U_LARB0_ID, 3) > +#define M4U_PORT_DISP_OVL1MTK_M4U_ID(M4U_LARB0_ID, 4) > +#define M4U_PORT_DISP_PVRIC0 MTK_M4U_ID(M4U_LARB0_ID, 5) > +#define M4U_PORT_DISP_RDMA0 MTK_M4U_ID(M4U_LARB0_ID, 6) > +#define M4U_PORT_DISP_WDMA0 MTK_M4U_ID(M4U_LARB0_ID, 7) > +#define M4U_PORT_DISP_FAKE0 MTK_M4U_ID(M4U_LARB0_ID, 8) > + > +/* larb1 */ > +#define M4U_PORT_DISP_OVL0_2L_HDR MTK_M4U_ID(M4U_LARB1_ID, 0) > +#define M4U_PORT_DISP_OVL1_2L_HDR MTK_M4U_ID(M4U_LARB1_ID, 1) > +#define M4U_PORT_DISP_OVL0_2L MTK_M4U_ID(M4U_LARB1_ID, 2) >
Re: [RESEND,PATCH 01/13] dt-bindings: mediatek: Add bindings for MT6779
On Mon, 4 Nov 2019 19:52:26 +0800, Chao Hao wrote: > This patch adds description for MT6779 IOMMU. > > MT6779 has two iommus, they are MM_IOMMU and APU_IOMMU which > use ARM Short-Descriptor translation format. > > The MT6779 IOMMU hardware diagram is as below, it is only a brief > diagram about iommu, it don't focus on the part of smi_larb, so > I don't describe the smi_larb detailedly. > >EMI > | > -- > || > MM_IOMMUAPU_IOMMU > || >SMI_COMMOM--- APU_BUS > | || > SMI_LARB(0~11) SMI_LARB12(FAKE) SMI_LARB13(FAKE) > ||| > || -- > || | | | >Multimedia engineCCU VPU MDLA EMDA > > All the connections are hardware fixed, software can not adjust it. > > >From the diagram above, MM_IOMMU provides mapping for multimedia engine, > but CCU is connected with smi_common directly, we can take them as larb12. > APU_IOMMU provides mapping for APU engine, we can take them larb13. > Larb12 and Larb13 are fake larbs. > > Signed-off-by: Chao Hao > --- > .../bindings/iommu/mediatek,iommu.txt | 2 + > include/dt-bindings/memory/mt6779-larb-port.h | 217 ++ > 2 files changed, 219 insertions(+) > create mode 100644 include/dt-bindings/memory/mt6779-larb-port.h > Reviewed-by: Rob Herring ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
[RESEND,PATCH 01/13] dt-bindings: mediatek: Add bindings for MT6779
This patch adds description for MT6779 IOMMU. MT6779 has two iommus, they are MM_IOMMU and APU_IOMMU which use ARM Short-Descriptor translation format. The MT6779 IOMMU hardware diagram is as below, it is only a brief diagram about iommu, it don't focus on the part of smi_larb, so I don't describe the smi_larb detailedly. EMI | -- || MM_IOMMUAPU_IOMMU || SMI_COMMOM--- APU_BUS ||| SMI_LARB(0~11) SMI_LARB12(FAKE)SMI_LARB13(FAKE) ||| || -- || | | | Multimedia engine CCU VPU MDLA EMDA All the connections are hardware fixed, software can not adjust it. >From the diagram above, MM_IOMMU provides mapping for multimedia engine, but CCU is connected with smi_common directly, we can take them as larb12. APU_IOMMU provides mapping for APU engine, we can take them larb13. Larb12 and Larb13 are fake larbs. Signed-off-by: Chao Hao --- .../bindings/iommu/mediatek,iommu.txt | 2 + include/dt-bindings/memory/mt6779-larb-port.h | 217 ++ 2 files changed, 219 insertions(+) create mode 100644 include/dt-bindings/memory/mt6779-larb-port.h diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt b/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt index ce59a505f5a4..c1ccd8582eb2 100644 --- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt @@ -58,6 +58,7 @@ Required properties: - compatible : must be one of the following string: "mediatek,mt2701-m4u" for mt2701 which uses generation one m4u HW. "mediatek,mt2712-m4u" for mt2712 which uses generation two m4u HW. + "mediatek,mt6779-m4u" for mt6779 which uses generation two m4u HW. "mediatek,mt7623-m4u", "mediatek,mt2701-m4u" for mt7623 which uses generation one m4u HW. "mediatek,mt8173-m4u" for mt8173 which uses generation two m4u HW. @@ -78,6 +79,7 @@ Required properties: Specifies the mtk_m4u_id as defined in dt-binding/memory/mt2701-larb-port.h for mt2701, mt7623 dt-binding/memory/mt2712-larb-port.h for mt2712, + dt-binding/memory/mt6779-larb-port.h for mt6779, dt-binding/memory/mt8173-larb-port.h for mt8173, and dt-binding/memory/mt8183-larb-port.h for mt8183. diff --git a/include/dt-bindings/memory/mt6779-larb-port.h b/include/dt-bindings/memory/mt6779-larb-port.h new file mode 100644 index ..8b7f2d2446ea --- /dev/null +++ b/include/dt-bindings/memory/mt6779-larb-port.h @@ -0,0 +1,217 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2019 MediaTek Inc. + * Author: Chao Hao + */ + +#ifndef _DTS_IOMMU_PORT_MT6779_H_ +#define _DTS_IOMMU_PORT_MT6779_H_ + +#define MTK_M4U_ID(larb, port) (((larb) << 5) | (port)) + +#define M4U_LARB0_ID0 +#define M4U_LARB1_ID1 +#define M4U_LARB2_ID2 +#define M4U_LARB3_ID3 +#define M4U_LARB4_ID4 +#define M4U_LARB5_ID5 +#define M4U_LARB6_ID6 +#define M4U_LARB7_ID7 +#define M4U_LARB8_ID8 +#define M4U_LARB9_ID9 +#define M4U_LARB10_ID 10 +#define M4U_LARB11_ID 11 +#define M4U_LARB12_ID 12 +#define M4U_LARB13_ID 13 + +/* larb0 */ +#define M4U_PORT_DISP_POSTMASK0 MTK_M4U_ID(M4U_LARB0_ID, 0) +#define M4U_PORT_DISP_OVL0_HDR MTK_M4U_ID(M4U_LARB0_ID, 1) +#define M4U_PORT_DISP_OVL1_HDR MTK_M4U_ID(M4U_LARB0_ID, 2) +#define M4U_PORT_DISP_OVL0 MTK_M4U_ID(M4U_LARB0_ID, 3) +#define M4U_PORT_DISP_OVL1 MTK_M4U_ID(M4U_LARB0_ID, 4) +#define M4U_PORT_DISP_PVRIC0MTK_M4U_ID(M4U_LARB0_ID, 5) +#define M4U_PORT_DISP_RDMA0 MTK_M4U_ID(M4U_LARB0_ID, 6) +#define M4U_PORT_DISP_WDMA0 MTK_M4U_ID(M4U_LARB0_ID, 7) +#define M4U_PORT_DISP_FAKE0 MTK_M4U_ID(M4U_LARB0_ID, 8) + +/* larb1 */ +#define M4U_PORT_DISP_OVL0_2L_HDR MTK_M4U_ID(M4U_LARB1_ID, 0) +#define M4U_PORT_DISP_OVL1_2L_HDR MTK_M4U_ID(M4U_LARB1_ID, 1) +#define M4U_PORT_DISP_OVL0_2L MTK_M4U_ID(M4U_LARB1_ID, 2) +#define M4U_PORT_DISP_OVL1_2L MTK_M4U_ID(M4U_LARB1_ID, 3) +#define M4U_PORT_DISP_RDMA1 MTK_M4U_ID(M4U_LARB1_ID, 4) +#define M4U_PORT_MDP_PVRIC0 MTK_M4U_ID(M4U_LARB1_ID, 5) +#define
