I've pulled this into the dma-mapping for-next tree now.
Hi all,
this series replaces the arch_dma_mmap_pgprot hooks with the
simpler pgprot_dmacoherent as used by the arm code already and
cleans up various bits around that area.
Changes since v1:
- improve the new arm64 comment
- keep the special DMA_ATTR_WRITE_COMBINE handling for mips and
On Fri, Aug 23, 2019 at 09:58:04PM +, Paul Burton wrote:
> So I believe uncached & uncached accelerated are another case like that
> described above - they're 2 different CCAs but the same "access type",
> namely uncached.
>
> Section 4.9 then goes on to forbid mixing access types, but not
Hi Christoph,
On Fri, Aug 16, 2019 at 09:07:48AM +0200, Christoph Hellwig wrote:
> I'd still like to hear a confirmation from the mips folks how
> the write combibe attribute can or can't work with the KSEG1
> uncached segment.
Quoting section 4.8 "Cacheability and Coherency Attributes and
Hi all,
this series replaced the arch_dma_mmap_pgprot hooks with the
simpler pgprot_dmacoherent as used by the arm code already and
cleans up various bits around that area.
I'd still like to hear a confirmation from the mips folks how
the write combibe attribute can or can't work with the KSEG1
