Hello,
On Thursday 10 Nov 2016 12:42:06 Joerg Roedel wrote:
> On Fri, Oct 21, 2016 at 06:52:53PM +0100, Robin Murphy wrote:
> > > -static struct iommu_domain *ipmmu_domain_alloc(unsigned type)
> > > -{
> > > - if (type != IOMMU_DOMAIN_UNMANAGED)
> > > - return NULL;
> >
> > I *think*
The ARM and ARM64 implementations of the IOMMU domain alloc/free
operations can be unified with the correct combination of type checking,
as the domain type can never be IOMMU_DOMAIN_DMA on 32-bit ARM due to
the driver calling iommu_group_get_for_dev() on ARM64 only. Do so.
Signed-off-by: Laurent
Hello,
On Friday 21 Oct 2016 18:32:54 Robin Murphy wrote:
> On 20/10/16 00:36, Magnus Damm wrote:
> > From: Magnus Damm
> >
> > Not all architectures have an iommu member in their archdata, so
> > use #ifdefs support build wit COMPILE_TEST on any architecture.
>
>
On Thu, 2016-11-10 at 14:14 +0100, Borislav Petkov wrote:
> + Toshi.
>
> On Wed, Nov 09, 2016 at 06:34:48PM -0600, Tom Lendacky wrote:
> >
> > For processors that support PAT, set the write-protect cache mode
> > (_PAGE_CACHE_MODE_WP) entry to the actual write-protect value
> > (x05).
Using
Hi Magnus,
Thank you for the patch.
On Thursday 20 Oct 2016 08:35:53 Magnus Damm wrote:
> From: Magnus Damm
>
> Introduce a bitmap for context handing and convert the
> interrupt routine to handle all registered contexts.
>
> At this point the number of contexts
Hi Magnus,
Thank you for the patch.
On Thursday 20 Oct 2016 08:36:03 Magnus Damm wrote:
> From: Magnus Damm
>
> Break out the utlb parsing code and dev_data allocation into a
> separate function. This is preparation for future code sharing.
>
> Signed-off-by:
Hi Magnus,
Thank you for the patch.
On Thursday 20 Oct 2016 08:36:13 Magnus Damm wrote:
> From: Magnus Damm
>
> Break out the domain allocation code into a separate function.
> This is preparation for future code sharing.
>
> Signed-off-by: Magnus Damm
+ Toshi.
On Wed, Nov 09, 2016 at 06:34:48PM -0600, Tom Lendacky wrote:
> For processors that support PAT, set the write-protect cache mode
> (_PAGE_CACHE_MODE_WP) entry to the actual write-protect value (x05).
>
> Acked-by: Borislav Petkov
> Signed-off-by: Tom Lendacky
On 10/11/16 12:14, Auger Eric wrote:
> Hi Robin,
>
> On 10/11/2016 12:54, Robin Murphy wrote:
>> Hi Eric,
>>
>> On 10/11/16 11:22, Auger Eric wrote:
>>> Hi Robin,
>>>
>>> On 04/11/2016 15:00, Robin Murphy wrote:
Hi Eric,
Thanks for posting this new series - the bottom-up approach
Hi Robin,
On 10/11/2016 12:54, Robin Murphy wrote:
> Hi Eric,
>
> On 10/11/16 11:22, Auger Eric wrote:
>> Hi Robin,
>>
>> On 04/11/2016 15:00, Robin Murphy wrote:
>>> Hi Eric,
>>>
>>> Thanks for posting this new series - the bottom-up approach is a lot
>>> easier to reason about :)
>>>
>>> On
On Thu, 10 Nov 2016 12:16:19 +0100
Lars Segerlund wrote:
> Hi,
>
> I am getting these errors from a userspace 'device driver' ,
>
> [599805.585424] DMAR: DRHD: handling fault status reg 202
> [599805.585431] DMAR: DMAR:[DMA Read] Request device [03:00.0] fault addr
On 08/11/16 14:53, Marek Szyprowski wrote:
> Hi Robin,
>
>
> On 2016-11-08 15:44, Robin Murphy wrote:
>> On 08/11/16 13:41, Marek Szyprowski wrote:
>>> On 2016-11-08 12:37, Robin Murphy wrote:
On 07/11/16 13:06, Marek Szyprowski wrote:
> When one called iommu_dma_init_domain() with size
On 10/11/16 12:24, Joerg Roedel wrote:
> On Wed, Oct 26, 2016 at 06:43:56PM +0100, Robin Murphy wrote:
>> With the new dma_{map,unmap}_resource() functions added to the DMA API
>> for the benefit of cases like slave DMA, add suitable implementations to
>> the arsenal of our generic layer. Since
On Wed, Nov 09, 2016 at 02:40:08PM +, Robin Murphy wrote:
[...]
> > +void fwnode_iommu_set_ops(struct fwnode_handle *fwnode,
> > + const struct iommu_ops *ops)
> > +{
> > + struct iommu_fwentry *iommu = kzalloc(sizeof(*iommu), GFP_KERNEL);
> > +
> > + if
Hi Eric,
On 10/11/16 11:22, Auger Eric wrote:
> Hi Robin,
>
> On 04/11/2016 15:00, Robin Murphy wrote:
>> Hi Eric,
>>
>> Thanks for posting this new series - the bottom-up approach is a lot
>> easier to reason about :)
>>
>> On 04/11/16 11:24, Eric Auger wrote:
>>> Introduce a new
On Wed, Oct 26, 2016 at 12:01:34PM -0600, Alex Williamson wrote:
> Allow other parts of the kernel to see which PCI ACS flags the IOMMU
> layer considers necessary for isolation.
>
> Signed-off-by: Alex Williamson
> Cc: Joerg Roedel
> ---
>
Hi Robin,
On 04/11/2016 15:00, Robin Murphy wrote:
> Hi Eric,
>
> Thanks for posting this new series - the bottom-up approach is a lot
> easier to reason about :)
>
> On 04/11/16 11:24, Eric Auger wrote:
>> Introduce a new iommu_reserved_region struct. This embodies
>> an IOVA reserved region
Hi Rafael,
On Thu, Nov 10, 2016 at 12:36:12AM +0100, Rafael J. Wysocki wrote:
> Hi Lorenzo,
>
> On Wed, Nov 9, 2016 at 3:19 PM, Lorenzo Pieralisi
> wrote:
> > This patch series is v7 of a previous posting:
> >
> > https://lkml.org/lkml/2016/10/18/506
>
> I don't see
Hi,
I am getting these errors from a userspace 'device driver' ,
[599805.585424] DMAR: DRHD: handling fault status reg 202
[599805.585431] DMAR: DMAR:[DMA Read] Request device [03:00.0] fault addr
4c0008000
DMAR:[fault reason 06] PTE Read access is not set
Basicly i mapp a
On Wed, Oct 19, 2016 at 11:30:34AM +0100, Russell King wrote:
> Convert DT component matching to use component_match_add_release().
>
> Signed-off-by: Russell King
> ---
> drivers/iommu/mtk_iommu.c| 8 +---
> drivers/iommu/mtk_iommu.h| 5 +
>
On Wed, Oct 26, 2016 at 01:09:53PM +0200, Lucas Stach wrote:
> This will get rid of a lot false positives caused by kmemleak being
> unaware of the irq_remap_table. Based on a suggestion from Catalin Marinas.
>
> Signed-off-by: Lucas Stach
> ---
> drivers/iommu/amd_iommu_init.c
On Wed, Nov 09, 2016 at 06:34:39PM -0600, Tom Lendacky wrote:
> This patch adds a Documenation entry to decribe the AMD Secure Memory
> Encryption (SME) feature.
>
> Signed-off-by: Tom Lendacky
> ---
> Documentation/kernel-parameters.txt |5 +++
>
On Thu, 2016-11-10 at 11:45 +0100, Joerg Roedel wrote:
> Hi David,
>
> On Sun, Oct 30, 2016 at 06:18:22AM -0600, David Woodhouse wrote:
> > + /* Start at 2 because it's defined as 1^(1+PSS) */
>
> This probably means 2^(1+PSS), right?
Or 1 << (1+PSS). Yeah.
> > + iommu->pasid_max = 2
Hi Will, Alex,
On 10/11/2016 03:01, Will Deacon wrote:
> On Wed, Nov 09, 2016 at 05:55:17PM -0700, Alex Williamson wrote:
>> On Thu, 10 Nov 2016 01:14:42 +0100
>> Auger Eric wrote:
>>> On 10/11/2016 00:59, Alex Williamson wrote:
On Wed, 9 Nov 2016 23:38:50 +
On Thu, Oct 20, 2016 at 08:35:33AM +0900, Magnus Damm wrote:
> iommu/ipmmu-vmsa: IPMMU multi-arch update V6
>
> [PATCH v6 01/07] iommu/ipmmu-vmsa: Remove platform data handling
> [PATCH v6 02/07] iommu/ipmmu-vmsa: Rework interrupt code and use bitmap for
> context
> [PATCH v6 03/07]
Hi Baoquan,
thanks for working on this, really appreciated!
On Thu, Oct 20, 2016 at 07:37:11PM +0800, Baoquan He wrote:
> This is v6 post.
>
> The principle of the fix is similar to intel iommu. Just defer the assignment
> of device to domain to device driver init. But there's difference than
Hi Ulf,
On Wed, Nov 9, 2016 at 7:27 PM, Ulf Hansson wrote:
> On 9 November 2016 at 04:14, Yangbo Lu wrote:
>> This patchset is used to fix a host version register bug in the
>> T4240-R1.0-R2.0
>> eSDHC controller. To match the SoC version and
On Tue, Nov 08, 2016 at 02:29:20PM +0100, Marek Szyprowski wrote:
> Remove remaining leftovers of the ref-count related code in the
> __sysmmu_enable/disable functions inline __sysmmu_enable/disable_nocount
> to them. Suspend/resume callbacks now checks if master device is set for
> given SYSMMU
On Thu, 10 Nov 2016 15:40:07 +0100
Joerg Roedel wrote:
> On Wed, Nov 09, 2016 at 01:01:14PM -0700, Alex Williamson wrote:
> > Well, it's not like QEMU or libvirt stumbling through sysfs to figure
> > out where holes could be in order to instantiate a VM with matching
> > holes,
On Fri, Nov 04, 2016 at 11:24:06AM +, Eric Auger wrote:
> The function populates the list of reserved regions with the
> PCI host bridge windows and the MSI IOVA range.
>
> At the moment an arbitray MSI IOVA window is set at 0x800
> of size 1MB.
>
> Signed-off-by: Eric Auger
On 10/11/16 15:46, Joerg Roedel wrote:
> On Fri, Nov 04, 2016 at 11:24:06AM +, Eric Auger wrote:
>> The function populates the list of reserved regions with the
>> PCI host bridge windows and the MSI IOVA range.
>>
>> At the moment an arbitray MSI IOVA window is set at 0x800
>> of size
On Thu, Oct 20, 2016 at 07:37:18PM +0800, Baoquan He wrote:
> prot = dir2prot(direction);
> + if (translation_pre_enabled(iommu) && !dev_data->domain_updated) {
> + dev_data->domain_updated = true;
> + set_dte_entry(dev_data->devid, domain, dev_data->ats.enabled);
On Wed, Oct 26, 2016 at 06:43:56PM +0100, Robin Murphy wrote:
> With the new dma_{map,unmap}_resource() functions added to the DMA API
> for the benefit of cases like slave DMA, add suitable implementations to
> the arsenal of our generic layer. Since cache maintenance should not be
> a concern,
On Tue, Nov 08, 2016 at 11:37:23AM +, Robin Murphy wrote:
> TBH I've been pondering ripping the size stuff out of dma-iommu, as it
> all stems from me originally failing to understand what dma_32bit_pfn is
> actually for.
The point of dma_32bit_pfn is to allocate dma-address below 4G by
On Thu, Nov 10, 2016 at 04:57:51PM +0100, Auger Eric wrote:
> It does not only serve the purpose to register the MSI IOVA region. We
> also need to allocate an iova_domain where MSI IOVAs will be allocated
> upon the request of the relevant MSI controllers. Do you mean you don't
> like to use the
On 10/11/16 15:59, Joerg Roedel wrote:
> On Tue, Nov 08, 2016 at 11:37:23AM +, Robin Murphy wrote:
>> TBH I've been pondering ripping the size stuff out of dma-iommu, as it
>> all stems from me originally failing to understand what dma_32bit_pfn is
>> actually for.
>
> The point of
On Thu, Nov 10, 2016 at 04:07:08PM +, Robin Murphy wrote:
> On 10/11/16 15:46, Joerg Roedel wrote:
> > On Fri, Nov 04, 2016 at 11:24:06AM +, Eric Auger wrote:
> >> + resource_list_for_each_entry(window, >windows) {
> >> + if (resource_type(window->res) != IORESOURCE_MEM &&
> >> +
Hi Joerg,
On 10/11/2016 16:22, Joerg Roedel wrote:
> On Fri, Nov 04, 2016 at 11:24:00AM +, Eric Auger wrote:
>> Fix the size check within start_pfn and limit_pfn.
>>
>> Signed-off-by: Eric Auger
>>
>> ---
>>
>> the issue was observed when playing with 1 page iova
Hi Joerg, Robin,
On 10/11/2016 16:37, Joerg Roedel wrote:
> On Fri, Nov 04, 2016 at 11:24:02AM +, Eric Auger wrote:
>> Introduce a new iommu_reserved_region struct. This embodies
>> an IOVA reserved region that cannot be used along with the IOMMU
>> API. The list is protected by a dedicated
Hi Joerg,
On 10/11/2016 16:46, Joerg Roedel wrote:
> On Fri, Nov 04, 2016 at 11:24:06AM +, Eric Auger wrote:
>> The function populates the list of reserved regions with the
>> PCI host bridge windows and the MSI IOVA range.
>>
>> At the moment an arbitray MSI IOVA window is set at 0x800
On Wed, Nov 09, 2016 at 08:11:16PM +, Robin Murphy wrote:
> When we *are* in full control of the IOVA space, we just carve out what
> we can find as best we can - see iova_reserve_pci_windows() in
> dma-iommu.c, which isn't really all that different to what x86 does
> (e.g.
On Fri, Nov 04, 2016 at 11:24:00AM +, Eric Auger wrote:
> Fix the size check within start_pfn and limit_pfn.
>
> Signed-off-by: Eric Auger
>
> ---
>
> the issue was observed when playing with 1 page iova domain with
> higher iova reserved.
> ---
>
On Thu, 10 Nov 2016 12:14:40 +0100
Auger Eric wrote:
> Hi Will, Alex,
>
> On 10/11/2016 03:01, Will Deacon wrote:
> > On Wed, Nov 09, 2016 at 05:55:17PM -0700, Alex Williamson wrote:
> >> On Thu, 10 Nov 2016 01:14:42 +0100
> >> Auger Eric wrote:
Hi David,
On Sun, Oct 30, 2016 at 06:18:22AM -0600, David Woodhouse wrote:
> + /* Start at 2 because it's defined as 1^(1+PSS) */
This probably means 2^(1+PSS), right?
> + iommu->pasid_max = 2 << ecap_pss(iommu->ecap);
Otherwise the patch looks good. Do you want to send it upstream
On Mon, Oct 17, 2016 at 12:49:20PM +0100, Robin Murphy wrote:
> Our per-device data consists of the M4U instance and firmware-provided
> list of LARB IDs, which is a perfect fit for the generic iommu_fwspec
> machinery. Use that directly as a simpler alternative to the custom
> archdata code.
>
>
On Thu, Nov 10, 2016 at 02:30:04PM +, Robin Murphy wrote:
> On 10/11/16 12:24, Joerg Roedel wrote:
> > On Wed, Oct 26, 2016 at 06:43:56PM +0100, Robin Murphy wrote:
> >> With the new dma_{map,unmap}_resource() functions added to the DMA API
> >> for the benefit of cases like slave DMA, add
On Wed, Nov 09, 2016 at 06:00:59PM +, Will Deacon wrote:
> I'd still rather the new function was renamed. We already have the group,
> so calling a weird underscore version of iommu_group_get is really
> counter-intuitive.
>
> Joerg -- do you have a preference?
iommu_group_ref_get sound best
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