Re: [PATCH] acpi/iort, numa: Add numa node mapping for smmuv3 devices

[+Cc Lv Zheng] On 2017/6/2 0:21, Lorenzo Pieralisi wrote: > On Thu, Jun 01, 2017 at 07:35:37PM +0530, Ganapatrao Kulkarni wrote: >> ARM IORT specification has provision to define Proximity domain >> in SMMUv3 IORT table. Adding required code to parse Proximity domain of >> SMMUv3 IORT table.

Re: [PATCH] acpi/iort, numa: Add numa node mapping for smmuv3 devices

On Thu, Jun 01, 2017 at 07:35:37PM +0530, Ganapatrao Kulkarni wrote: > ARM IORT specification has provision to define Proximity domain > in SMMUv3 IORT table. Adding required code to parse Proximity domain of > SMMUv3 IORT table. Parsed Proximity domain is used to set numa_node > of SMMUv3

[PATCH 3.2 036/101] x86/pci-calgary: Fix iommu_free() comparison of unsigned expression >= 0

3.2.89-rc1 review patch. If anyone has any objections, please let me know. -- From: Nikola Pajkovsky commit 68dee8e2f2cacc54d038394e70d22411dee89da2 upstream. commit 8fd524b355da ("x86: Kill bad_dma_address variable") has killed bad_dma_address variable

[PATCH 3.16 095/212] x86/pci-calgary: Fix iommu_free() comparison of unsigned expression >= 0

3.16.44-rc1 review patch. If anyone has any objections, please let me know. -- From: Nikola Pajkovsky commit 68dee8e2f2cacc54d038394e70d22411dee89da2 upstream. commit 8fd524b355da ("x86: Kill bad_dma_address variable") has killed bad_dma_address variable

Re: [RFC,20/30] iommu/arm-smmu-v3: Enable PCI PASID in masters

On Thu, 2017-06-01 at 13:30 +0100, Jean-Philippe Brucker wrote: > > Yes, the current plan is to create a PASID (SSID) allocator that could be > used by AMD, Intel, ARM, and other IOMMUs. Currently the kfd driver > allocates PASIDs, but this will be done by the IOMMU subsystem in the > future.

Re: [PATCH 2/7] dt-bindings: PCI: Describe ATS property for root complex nodes

On 31/05/17 18:23, Rob Herring wrote: > On Wed, May 24, 2017 at 07:01:38PM +0100, Jean-Philippe Brucker wrote: >> Address Translation Service (ATS) is an extension to PCIe allowing >> endpoints to manage their own IOTLB, called Address Translation Cache >> (ATC). Instead of having every memory

Re: [PATCH 0/7] Add PCI ATS support to SMMUv3

On 31/05/17 16:27, Nate Watterson wrote: > Hi Jean-Philippe, > > On 5/24/2017 2:01 PM, Jean-Philippe Brucker wrote: >> PCIe devices can implement their own TLB, named Address Translation Cache >> (ATC). In order to support Address Translation Service (ATS), the >> following changes are needed in

Re: [RFC,20/30] iommu/arm-smmu-v3: Enable PCI PASID in masters

Hi Sinan, On 31/05/17 15:10, Sinan Kaya wrote: > Hi Jean-Philippe, > > On 2/27/2017 2:54 PM, Jean-Philippe Brucker wrote: >> Enable PASID for PCI devices that support it. >> >> Signed-off-by: Jean-Philippe Brucker >> --- >> drivers/iommu/arm-smmu-v3.c | 66 >>

[PATCH 3/4] iommu: add qcom_iommu

An iommu driver for Qualcomm "B" family devices which do implement the ARM SMMU spec, but not in a way that is compatible with how the arm-smmu driver is designed. It seems SMMU_SCR1.GASRAE=1 so the global register space is not accessible. This means it needs to get configuration from devicetree

[PATCH 2/4] iommu: arm-smmu: split out register defines

I want to re-use some of these for qcom_iommu, which has (roughly) the same context-bank registers. Signed-off-by: Rob Clark --- drivers/iommu/arm-smmu-regs.h | 227 ++ drivers/iommu/arm-smmu.c | 203

[PATCH 4/4] iommu: qcom: initialize secure page table

From: Stanimir Varbanov This basically gets the secure page table size, allocates memory for secure pagetables and passes the physical address to the trusted zone. Signed-off-by: Stanimir Varbanov Signed-off-by: Rob Clark

[PATCH 1/4] Docs: dt: document qcom iommu bindings

Cc: devicet...@vger.kernel.org Signed-off-by: Rob Clark Reviewed-by: Rob Herring --- .../devicetree/bindings/iommu/qcom,iommu.txt | 121 + 1 file changed, 121 insertions(+) create mode 100644

[PATCH 0/4] iommu: add qcom_iommu for early "B" family devices

An iommu driver for Qualcomm "B" family devices which do not implement the ARM SMMU spec in a way that is compatible with the arm-smmu driver. Since last version, a few updates to 3/4 based on Robin's suggestions. Rob Clark (3): Docs: dt: document qcom iommu bindings iommu: arm-smmu: split

[PATCH] acpi/iort, numa: Add numa node mapping for smmuv3 devices

ARM IORT specification has provision to define Proximity domain in SMMUv3 IORT table. Adding required code to parse Proximity domain of SMMUv3 IORT table. Parsed Proximity domain is used to set numa_node of SMMUv3 platform devices. Signed-off-by: Ganapatrao Kulkarni