Re: [PATCH 15/19] drm/msm: Add support for private address space instances

2020-08-31 Thread Bjorn Andersson
On Thu 13 Aug 21:41 CDT 2020, Rob Clark wrote: > From: Jordan Crouse > > Add support for allocating private address space instances. Targets that > support per-context pagetables should implement their own function to > allocate private address spaces. > > The default will return a pointer to

Re: [PATCH 12/19] drm/msm: Drop context arg to gpu->submit()

2020-08-31 Thread Bjorn Andersson
On Thu 13 Aug 21:41 CDT 2020, Rob Clark wrote: > From: Jordan Crouse > > Now that we can get the ctx from the submitqueue, the extra arg is > redundant. > Reviewed-by: Bjorn Andersson > Signed-off-by: Jordan Crouse > [split out of previous patch to reduce churny noise] > Signed-off-by: Rob

Re: [PATCH 13/19] drm/msm: Set the global virtual address range from the IOMMU domain

2020-08-31 Thread Bjorn Andersson
On Thu 13 Aug 21:41 CDT 2020, Rob Clark wrote: > From: Jordan Crouse > > Use the aperture settings from the IOMMU domain to set up the virtual > address range for the GPU. This allows us to transparently deal with > IOMMU side features (like split pagetables). > Reviewed-by: Bjorn Andersson

Re: [PATCH 14/19] drm/msm: Add support to create a local pagetable

2020-08-31 Thread Bjorn Andersson
On Thu 13 Aug 21:41 CDT 2020, Rob Clark wrote: > From: Jordan Crouse > > Add support to create a io-pgtable for use by targets that support > per-instance pagetables. In order to support per-instance pagetables the > GPU SMMU device needs to have the qcom,adreno-smmu compatible string and >

Re: [PATCH 18/19] iommu/arm-smmu: add a way for implementations to influence SCTLR

2020-08-31 Thread Bjorn Andersson
On Thu 13 Aug 21:41 CDT 2020, Rob Clark wrote: > From: Rob Clark > > For the Adreno GPU's SMMU, we want SCTLR.HUPCF set to ensure that > pending translations are not terminated on iova fault. Otherwise > a terminated CP read could hang the GPU by returning invalid > command-stream data. >

Re: [PATCH 08/19] iommu/arm-smmu: constify some helpers

2020-08-31 Thread Bjorn Andersson
On Thu 13 Aug 21:41 CDT 2020, Rob Clark wrote: > From: Rob Clark > > Sprinkle a few `const`s where helpers don't need write access. > Reviewed-by: Bjorn Andersson > Signed-off-by: Rob Clark > --- > drivers/iommu/arm/arm-smmu/arm-smmu.h | 6 +++--- > 1 file changed, 3 insertions(+), 3

Re: [PATCH 01/19] drm/msm: remove dangling submitqueue references

2020-08-31 Thread Bjorn Andersson
On Fri 14 Aug 02:40 UTC 2020, Rob Clark wrote: > From: Rob Clark > > Currently it doesn't matter, since we free the ctx immediately. But > when we start refcnt'ing the ctx, we don't want old dangling list > entries to hang around. > > Signed-off-by: Rob Clark Reviewed-by: Bjorn Andersson

Re: [PATCH 01/19] drm/msm: remove dangling submitqueue references

2020-08-31 Thread Bjorn Andersson
On Tue 01 Sep 03:42 UTC 2020, Rob Clark wrote: > On Mon, Aug 31, 2020 at 7:35 PM Bjorn Andersson > wrote: > > > > On Fri 14 Aug 02:40 UTC 2020, Rob Clark wrote: > > > > > From: Rob Clark > > > > > > Currently it doesn't matter, since we free the ctx immediately. But > > > when we start

Re: [PATCH 06/19] drm/msm/gpu: add dev_to_gpu() helper

2020-08-31 Thread Bjorn Andersson
On Thu 13 Aug 21:41 CDT 2020, Rob Clark wrote: > From: Rob Clark > > In a later patch, the drvdata will not directly be 'struct msm_gpu *', > so add a helper to reduce the churn. > > Signed-off-by: Rob Clark > --- > drivers/gpu/drm/msm/adreno/adreno_device.c | 10 -- >

Re: [PATCH 07/19] drm/msm: set adreno_smmu as gpu's drvdata

2020-08-31 Thread Bjorn Andersson
On Thu 13 Aug 21:41 CDT 2020, Rob Clark wrote: > From: Rob Clark > > This will be populated by adreno-smmu, to provide a way for coordinating > enabling/disabling TTBR0 translation. > Reviewed-by: Bjorn Andersson > Signed-off-by: Rob Clark > --- >

Re: [PATCH 09/19] iommu/arm-smmu-qcom: Add implementation for the adreno GPU SMMU

2020-08-31 Thread Bjorn Andersson
On Thu 13 Aug 21:41 CDT 2020, Rob Clark wrote: > From: Jordan Crouse > > Add a special implementation for the SMMU attached to most Adreno GPU > target triggered from the qcom,adreno-smmu compatible string. > > The new Adreno SMMU implementation will enable split pagetables > (TTBR1) for the

Re: [PATCH 10/19] dt-bindings: arm-smmu: Add compatible string for Adreno GPU SMMU

2020-08-31 Thread Bjorn Andersson
On Thu 13 Aug 21:41 CDT 2020, Rob Clark wrote: > From: Jordan Crouse > > Every Qcom Adreno GPU has an embedded SMMU for its own use. These > devices depend on unique features such as split pagetables, > different stall/halt requirements and other settings. Identify them > with a compatible

Re: [PATCH v1] iommu/vt-d: Move intel_iommu_gfx_mapped to Intel IOMMU header

2020-08-31 Thread Lu Baolu
Hi Andy, On 8/29/20 12:12 AM, Andy Shevchenko wrote: Static analyzer is not happy about intel_iommu_gfx_mapped declaration: .../drivers/iommu/intel/iommu.c:364:5: warning: symbol 'intel_iommu_gfx_mapped' was not declared. Should it be static? Move its declaration to Intel IOMMU header file.

Re: [PATCH 11/19] drm/msm: Add a context pointer to the submitqueue

2020-08-31 Thread Bjorn Andersson
On Thu 13 Aug 21:41 CDT 2020, Rob Clark wrote: > From: Jordan Crouse > > Each submitqueue is attached to a context. Add a pointer to the > context to the submitqueue at create time and refcount it so > that it stays around through the life of the queue. > Reviewed-by: Bjorn Andersson >

Re: [PATCH 19/19] drm/msm: show process names in gem_describe

2020-08-31 Thread Bjorn Andersson
On Thu 13 Aug 21:41 CDT 2020, Rob Clark wrote: > From: Rob Clark > > In $debugfs/gem we already show any vma(s) associated with an object. > Also show process names if the vma's address space is a per-process > address space. > Reviewed-by: Bjorn Andersson > Signed-off-by: Rob Clark > ---

Re: [patch V2 00/46] x86, PCI, XEN, genirq ...: Prepare for device MSI

2020-08-31 Thread Lu Baolu
Hi Thomas, On 2020/8/31 15:10, Thomas Gleixner wrote: On Mon, Aug 31 2020 at 08:51, Lu Baolu wrote: On 8/26/20 7:16 PM, Thomas Gleixner wrote: This is the second version of providing a base to support device MSI (non PCI based) and on top of that support for IMS (Interrupt Message Storm)

Re: [patch V2 00/46] x86, PCI, XEN, genirq ...: Prepare for device MSI

2020-08-31 Thread Thomas Gleixner
On Mon, Aug 31 2020 at 08:51, Lu Baolu wrote: > On 8/26/20 7:16 PM, Thomas Gleixner wrote: >> This is the second version of providing a base to support device MSI (non >> PCI based) and on top of that support for IMS (Interrupt Message Storm) >> based devices in a halfways architecture independent

Re: [PATCH 5/5] powerpc: use the generic dma_ops_bypass mode

2020-08-31 Thread Christoph Hellwig
On Sun, Aug 30, 2020 at 11:04:21AM +0200, Cédric Le Goater wrote: > Hello, > > On 7/8/20 5:24 PM, Christoph Hellwig wrote: > > Use the DMA API bypass mechanism for direct window mappings. This uses > > common code and speed up the direct mapping case by avoiding indirect > > calls just when not

Re: [PATCH v1] iommu/vt-d: Move intel_iommu_ops to header file

2020-08-31 Thread Andy Shevchenko
On Sat, Aug 29, 2020 at 07:58:46AM +0100, Christoph Hellwig wrote: > On Fri, Aug 28, 2020 at 07:05:02PM +0300, Andy Shevchenko wrote: > > Compiler is not happy about hidden declaration of intel_iommu_ops. > > > > .../drivers/iommu/intel/iommu.c:414:24: warning: symbol 'intel_iommu_ops' > > was

Re: [PATCH v1] iommu/vt-d: Move intel_iommu_ops to header file

2020-08-31 Thread Lu Baolu
Hi Andy, On 2020/8/31 14:30, Andy Shevchenko wrote: On Sat, Aug 29, 2020 at 07:58:46AM +0100, Christoph Hellwig wrote: On Fri, Aug 28, 2020 at 07:05:02PM +0300, Andy Shevchenko wrote: Compiler is not happy about hidden declaration of intel_iommu_ops. .../drivers/iommu/intel/iommu.c:414:24:

Re: [PATCH 5/5] powerpc: use the generic dma_ops_bypass mode

2020-08-31 Thread Cédric Le Goater
On 8/31/20 8:40 AM, Christoph Hellwig wrote: > On Sun, Aug 30, 2020 at 11:04:21AM +0200, Cédric Le Goater wrote: >> Hello, >> >> On 7/8/20 5:24 PM, Christoph Hellwig wrote: >>> Use the DMA API bypass mechanism for direct window mappings. This uses >>> common code and speed up the direct mapping

Re: [PATCH v8 7/7] iommu/vt-d: Check UAPI data processed by IOMMU core

2020-08-31 Thread Lu Baolu
Hi Jacob, On 9/1/20 2:25 AM, Jacob Pan wrote: IOMMU generic layer already does sanity checks on UAPI data for version match and argsz range based on generic information. This patch adjusts the following data checking responsibilities: - removes the redundant version check from VT-d driver -

Re: [Regression] [PATCH] iommu: Avoid crash in init_no_remapping_devices if iommu is NULL

2020-08-31 Thread Lu Baolu
Hi Torsten, Thank you for reporting this. On 8/31/20 7:03 PM, Torsten Hilbrich wrote: I noticed a kernel crash when trying to boot a v5.9-rc2 based kernel. The crash reads as: <1>[7.410192] BUG: kernel NULL pointer dereference, address: 0038 <1>[7.410196] #PF: supervisor

Re: [PATCH 01/19] drm/msm: remove dangling submitqueue references

2020-08-31 Thread Rob Clark
On Mon, Aug 31, 2020 at 7:35 PM Bjorn Andersson wrote: > > On Fri 14 Aug 02:40 UTC 2020, Rob Clark wrote: > > > From: Rob Clark > > > > Currently it doesn't matter, since we free the ctx immediately. But > > when we start refcnt'ing the ctx, we don't want old dangling list > > entries to hang

[PATCH v4 1/5] iommu: Add optional subdev in aux_at(de)tach ops

2020-08-31 Thread Lu Baolu
In the vfio/mdev use case of aux-domain, the subdevices are created from the physical devices with IOMMU_DEV_FEAT_AUX enabled and the aux-domains are attached to the subdevices through the iommu_ops.aux_attach_dev() interface. Current iommu_ops.aux_at(de)tach_dev() design only takes the

[PATCH v4 4/5] vfio/type1: Use iommu_aux_at(de)tach_group() APIs

2020-08-31 Thread Lu Baolu
Replace iommu_aux_at(de)tach_device() with iommu_at(de)tach_subdev_group(). Signed-off-by: Lu Baolu --- drivers/vfio/vfio_iommu_type1.c | 43 + 1 file changed, 6 insertions(+), 37 deletions(-) diff --git a/drivers/vfio/vfio_iommu_type1.c

[PATCH v4 0/5] iommu aux-domain APIs extensions

2020-08-31 Thread Lu Baolu
This series aims to extend the IOMMU aux-domain API set so that it could be more friendly to vfio/mdev usage. The interactions between vfio/mdev and iommu during mdev creation and passthr are: 1. Create a group for mdev with iommu_group_alloc(); 2. Add the device to the group with group =

Re: [PATCH 03/19] iommu/arm-smmu: Add support for split pagetables

2020-08-31 Thread Bjorn Andersson
On Thu 13 Aug 21:40 CDT 2020, Rob Clark wrote: > From: Jordan Crouse > > Enable TTBR1 for a context bank if IO_PGTABLE_QUIRK_ARM_TTBR1 is selected > by the io-pgtable configuration. > > Signed-off-by: Jordan Crouse > Signed-off-by: Rob Clark > --- > drivers/iommu/arm/arm-smmu/arm-smmu.c |

Re: [PATCH 05/19] iommu: add private interface for adreno-smmu

2020-08-31 Thread Bjorn Andersson
On Thu 13 Aug 21:41 CDT 2020, Rob Clark wrote: > From: Rob Clark > > This interface will be used for drm/msm to coordinate with the > qcom_adreno_smmu_impl to enable/disable TTBR0 translation. > > Once TTBR0 translation is enabled, the GPU's CP (Command Processor) > will directly switch TTBR0

Re: [PATCH 02/19] iommu/arm-smmu: Pass io-pgtable config to implementation specific function

2020-08-31 Thread Bjorn Andersson
On Thu 13 Aug 21:40 CDT 2020, Rob Clark wrote: > From: Jordan Crouse > > Construct the io-pgtable config before calling the implementation specific > init_context function and pass it so the implementation specific function > can get a chance to change it before the io-pgtable is created. > >

[PATCH v4 3/5] iommu: Add iommu_aux_get_domain_for_dev()

2020-08-31 Thread Lu Baolu
The device driver needs an API to get its aux-domain. A typical usage scenario is: unsigned long pasid; struct iommu_domain *domain; struct device *dev = mdev_dev(mdev); struct device *iommu_device = vfio_mdev_get_iommu_device(dev); domain =

[PATCH v4 5/5] iommu/vt-d: Add is_aux_domain support

2020-08-31 Thread Lu Baolu
With subdevice information opt-in through iommu_ops.aux_at(de)tach_dev() interfaces, the vendor iommu driver is able to learn the knowledge about the relationships between the subdevices and the aux-domains. Implement is_aux_domain() support based on the relationship knowledges. Signed-off-by: Lu

[PATCH v4 2/5] iommu: Add iommu_at(de)tach_subdev_group()

2020-08-31 Thread Lu Baolu
This adds two new APIs for the use cases like vfio/mdev where subdevices derived from physical devices are created and put in an iommu_group. The new IOMMU API interfaces mimic the vfio_mdev_at(de)tach_domain() directly, testing whether the resulting device supports IOMMU_DEV_FEAT_AUX and using an

Re: [PATCH 01/19] drm/msm: remove dangling submitqueue references

2020-08-31 Thread Bjorn Andersson
On Fri 14 Aug 02:40 UTC 2020, Rob Clark wrote: > From: Rob Clark > > Currently it doesn't matter, since we free the ctx immediately. But > when we start refcnt'ing the ctx, we don't want old dangling list > entries to hang around. > > Signed-off-by: Rob Clark > --- >

RE: [PATCH v6 0/2] make dma_alloc_coherent NUMA-aware by per-NUMA CMA

2020-08-31 Thread Song Bao Hua (Barry Song)
> -Original Message- > From: linux-kernel-ow...@vger.kernel.org > [mailto:linux-kernel-ow...@vger.kernel.org] On Behalf Of Christoph Hellwig > Sent: Friday, August 21, 2020 6:19 PM > To: Song Bao Hua (Barry Song) > Cc: h...@lst.de; m.szyprow...@samsung.com; robin.mur...@arm.com; >

[PATCH v5] iommu/mediatek: check 4GB mode by reading infracfg

2020-08-31 Thread Miles Chen
In previous discussion [1] and [2], we found that it is risky to use max_pfn or totalram_pages to tell if 4GB mode is enabled. Check 4GB mode by reading infracfg register, remove the usage of the un-exported symbol max_pfn. This is a step towards building mtk_iommu as a kernel module. [1]

[Regression] [PATCH] iommu: Avoid crash in init_no_remapping_devices if iommu is NULL

2020-08-31 Thread Torsten Hilbrich
I noticed a kernel crash when trying to boot a v5.9-rc2 based kernel. The crash reads as: <1>[7.410192] BUG: kernel NULL pointer dereference, address: 0038 <1>[7.410196] #PF: supervisor write access in kernel mode <1>[7.410199] #PF: error_code(0x0002) - not-present page

Re: [PATCH v6 0/2] make dma_alloc_coherent NUMA-aware by per-NUMA CMA

2020-08-31 Thread Christoph Hellwig
This is on my todo list to be applied this week. ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu

Re: [patch V2 24/46] PCI: vmd: Mark VMD irqdomain with DOMAIN_BUS_VMD_MSI

2020-08-31 Thread Jason Gunthorpe
On Wed, Aug 26, 2020 at 01:16:52PM +0200, Thomas Gleixner wrote: > From: Thomas Gleixner > > Devices on the VMD bus use their own MSI irq domain, but it is not > distinguishable from regular PCI/MSI irq domains. This is required > to exclude VMD devices from getting the irq domain pointer set by

Re: [patch V2 46/46] irqchip: Add IMS (Interrupt Message Storm) driver - NOT FOR MERGING

2020-08-31 Thread Jason Gunthorpe
On Wed, Aug 26, 2020 at 01:17:14PM +0200, Thomas Gleixner wrote: > + * ims_queue_info - Information to create an IMS queue domain > + * @queue_lock: Callback which informs the device driver that > + * an interrupt management operation starts. > + *

Re: [PATCH v7 7/7] iommu/vt-d: Check UAPI data processed by IOMMU core

2020-08-31 Thread Jacob Pan
On Thu, 13 Aug 2020 11:19:46 +0200 Auger Eric wrote: > Hi Jacob, > > On 7/30/20 2:21 AM, Jacob Pan wrote: > > IOMMU generic layer already does sanity checks UAPI data for version > > match and argsz range under generic information. > > Remove the redundant version check from VT-d driver and

[PATCH v8 1/7] docs: IOMMU user API

2020-08-31 Thread Jacob Pan
IOMMU UAPI is newly introduced to support communications between guest virtual IOMMU and host IOMMU. There has been lots of discussions on how it should work with VFIO UAPI and userspace in general. This document is intended to clarify the UAPI design and usage. The mechanics of how future

[PATCH v8 6/7] iommu/uapi: Handle data and argsz filled by users

2020-08-31 Thread Jacob Pan
IOMMU user APIs are responsible for processing user data. This patch changes the interface such that user pointers can be passed into IOMMU code directly. Separate kernel APIs without user pointers are introduced for in-kernel users of the UAPI functionality. IOMMU UAPI data has a user filled

[PATCH v8 5/7] iommu/uapi: Rename uapi functions

2020-08-31 Thread Jacob Pan
User APIs such as iommu_sva_unbind_gpasid() may also be used by the kernel. Since we introduced user pointer to the UAPI functions, in-kernel callers cannot share the same APIs. In-kernel callers are also trusted, there is no need to validate the data. We plan to have two flavors of the same API

[PATCH v8 0/7] IOMMU user API enhancement

2020-08-31 Thread Jacob Pan
IOMMU user API header was introduced to support nested DMA translation and related fault handling. The current UAPI data structures consist of three areas that cover the interactions between host kernel and guest: - fault handling - cache invalidation - bind guest page tables, i.e. guest PASID

[PATCH v8 4/7] iommu/uapi: Use named union for user data

2020-08-31 Thread Jacob Pan
IOMMU UAPI data size is filled by the user space which must be validated by the kernel. To ensure backward compatibility, user data can only be extended by either re-purpose padding bytes or extend the variable sized union at the end. No size change is allowed before the union. Therefore, the

[PATCH v8 7/7] iommu/vt-d: Check UAPI data processed by IOMMU core

2020-08-31 Thread Jacob Pan
IOMMU generic layer already does sanity checks on UAPI data for version match and argsz range based on generic information. This patch adjusts the following data checking responsibilities: - removes the redundant version check from VT-d driver - removes the check for vendor specific data size -

[PATCH v8 3/7] iommu/uapi: Introduce enum type for PASID data format

2020-08-31 Thread Jacob Pan
There can be multiple vendor-specific PASID data formats used in UAPI structures. This patch adds enum type with a last entry which makes range checking much easier. Suggested-by: Alex Williamson Reviewed-by: Eric Auger Signed-off-by: Jacob Pan --- include/uapi/linux/iommu.h | 8 ++-- 1

[PATCH v8 2/7] iommu/uapi: Add argsz for user filled data

2020-08-31 Thread Jacob Pan
As IOMMU UAPI gets extended, user data size may increase. To support backward compatibiliy, this patch introduces a size field to each UAPI data structures. It is *always* the responsibility for the user to fill in the correct size. Padding fields are adjusted to ensure 8 byte alignment. Specific