Re: [PATCHv5 5/6] iommu: arm-smmu-impl: Use table to list QCOM implementations

2020-09-23 Thread Robin Murphy
On 2020-09-22 07:18, Sai Prakash Ranjan wrote: Use table and of_match_node() to match qcom implementation instead of multiple of_device_compatible() calls for each QCOM SMMU implementation. Signed-off-by: Sai Prakash Ranjan --- drivers/iommu/arm/arm-smmu/arm-smmu-impl.c | 12 1

[bugzilla-dae...@bugzilla.kernel.org: [Bug 209149] New: "iommu/vt-d: Enable PCI ACS for platform opt in hint" makes NVMe config space not accessible after S3]

2020-09-23 Thread Bjorn Helgaas
[+cc IOMMU and NVMe folks] Sorry, I forgot to forward this to linux-pci when it was first reported. Apparently this happens with v5.9-rc3, and may be related to 50310600ebda ("iommu/vt-d: Enable PCI ACS for platform opt in hint"), which appeared in v5.8-rc3. There are several dmesg logs and

Re: [bugzilla-dae...@bugzilla.kernel.org: [Bug 209149] New: "iommu/vt-d: Enable PCI ACS for platform opt in hint" makes NVMe config space not accessible after S3]

2020-09-23 Thread Raj, Ashok
Hi Bjorn On Wed, Sep 23, 2020 at 11:03:27AM -0500, Bjorn Helgaas wrote: > [+cc IOMMU and NVMe folks] > > Sorry, I forgot to forward this to linux-pci when it was first > reported. > > Apparently this happens with v5.9-rc3, and may be related to > 50310600ebda ("iommu/vt-d: Enable PCI ACS for

[PATCH v2 3/3] iommu: amd: Re-purpose Exclusion range registers to support SNP CWWB

2020-09-23 Thread Suravee Suthikulpanit
When the IOMMU SNP support bit is set in the IOMMU Extended Features register, hardware re-purposes the following registers: 1. IOMMU Exclusion Base register (MMIO offset 0020h) to Completion Wait Write-Back (CWWB) Base register 2. IOMMU Exclusion Range Limit (MMIO offset 0028h) to

Re: IOVA allocation dependency between firmware buffer and remaining buffers

2020-09-23 Thread Christoph Hellwig
On Wed, Sep 23, 2020 at 01:15:33PM +0530, Ajay kumar wrote: > Hello all, > > We pretty much tried to solve the same issue here with a new API in DMA-IOMMU: > https://lore.kernel.org/linux-iommu/20200811054912.ga...@infradead.org/T/ > > Christopher- the user part would be MFC devices on exynos

[PATCH] iommu: of: skip iommu_device_list traversal in of_iommu_xlate()

2020-09-23 Thread Charan Teja Reddy
In of_iommu_xlate(), check if iommu device is enabled before traversing the iommu_device_list through iommu_ops_from_fwnode(). It is of no use in traversing the iommu_device_list only to return NO_IOMMU because of iommu device node is disabled. Signed-off-by: Charan Teja Reddy ---

[PATCH v2 1/3] iommu: amd: Use 4K page for completion wait write-back semaphore

2020-09-23 Thread Suravee Suthikulpanit
IOMMU SNP support requires the completion wait write-back semaphore to be implemented using a 4K-aligned page, where the page address is to be programmed into the newly introduced MMIO base/range registers. This new scheme uses a per-iommu atomic variable to store the current semaphore value,

[PATCH v2 2/3] iommu: amd: Add support for RMP_PAGE_FAULT and RMP_HW_ERR

2020-09-23 Thread Suravee Suthikulpanit
IOMMU SNP support introduces two new IOMMU events: * RMP Page Fault event * RMP Hardware Error event Hence, add reporting functions for these events. Cc: Brijesh Singh Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/amd_iommu_types.h | 2 + drivers/iommu/amd/iommu.c

[PATCH v2 0/3] amd : iommu : Initial IOMMU support for SNP

2020-09-23 Thread Suravee Suthikulpanit
Introducing support for AMD Secure Nested Paging (SNP) with IOMMU, which mainly affects the use of IOMMU Exclusion Base and Range Limit registers. Note that these registers are no longer used by Linux IOMMU driver. Patch 2 and 3 are SNP-specific, and discuss detail of the implementation. In order

Re: [PATCH v2 0/2] iommu/arm-smmu-v3: Improve cmdq lock efficiency

2020-09-23 Thread John Garry
On 21/09/2020 14:58, John Garry wrote: Could you try to adapt the hacks I sent before, please? I know they weren't quite right (I have no hardware to test on Could the ARM Rev C FVP be used to at least functionally test? Can't seem to access myself, even though it's gratis... ), but the

Re: dma_alloc_coherent not allocating memory from CMA Reserved

2020-09-23 Thread Robin Murphy
On 2020-09-23 08:43, Sathyavathi M wrote: Hi All, I am trying to allocate coherent memory for 33 MB in kerenl driver. and for that i have reserved CMA of 1024 MB, but from dmesg, i can see that address reserved for cma is different and what i get with dma_alloc_coherent is different. My pc is

RE: [External] Re: [PATCH] Revert "iommu/amd: Treat per-device exclusion ranges as r/w unity-mapped regions"

2020-09-23 Thread Adrian Huang12
Hi Baoquan, > -Original Message- > From: Baoquan He > Sent: Wednesday, September 23, 2020 10:33 AM > To: j...@8bytes.org; Adrian Huang12 > Cc: iommu@lists.linux-foundation.org; linux-ker...@vger.kernel.org; > jsnit...@redhat.com > Subject: [External] Re: [PATCH] Revert "iommu/amd: Treat

Re: [PATCHv5 4/6] drm/msm/a6xx: Add support for using system cache(LLC)

2020-09-23 Thread Jordan Crouse
On Tue, Sep 22, 2020 at 11:48:17AM +0530, Sai Prakash Ranjan wrote: > From: Sharat Masetty > > The last level system cache can be partitioned to 32 different > slices of which GPU has two slices preallocated. One slice is > used for caching GPU buffers and the other slice is used for > caching

RE: Re: dma_alloc_coherent not allocating memory from CMA Reserved

2020-09-23 Thread Sathyavathi M
Hi Robin,   My question is during boot up the CMA was allocated at  [ 0.014538] *cma: Reserved 400 MiB at 0x000205c0* But when we do dma_alloac_coherent in the driver the address is different  f800 The address  f800 doesnt lie in the range of CMA allocated at

Re: [PATCH v10 01/11] vfio: VFIO_IOMMU_SET_PASID_TABLE

2020-09-23 Thread Auger Eric
Hi Zenghui, On 9/23/20 1:27 PM, Zenghui Yu wrote: > Hi Eric, > > On 2020/3/21 0:19, Eric Auger wrote: >> From: "Liu, Yi L" >> >> This patch adds an VFIO_IOMMU_SET_PASID_TABLE ioctl >> which aims to pass the virtual iommu guest configuration >> to the host. This latter takes the form of the

Re: [PATCH] iommu: of: skip iommu_device_list traversal in of_iommu_xlate()

2020-09-23 Thread Robin Murphy
On 2020-09-23 15:53, Charan Teja Reddy wrote: In of_iommu_xlate(), check if iommu device is enabled before traversing the iommu_device_list through iommu_ops_from_fwnode(). It is of no use in traversing the iommu_device_list only to return NO_IOMMU because of iommu device node is disabled.

Re: [bugzilla-dae...@bugzilla.kernel.org: [Bug 209149] New: "iommu/vt-d: Enable PCI ACS for platform opt in hint" makes NVMe config space not accessible after S3]

2020-09-23 Thread Kai-Heng Feng
[+Cc Christoph] > On Sep 24, 2020, at 00:03, Bjorn Helgaas wrote: > > [+cc IOMMU and NVMe folks] > > Sorry, I forgot to forward this to linux-pci when it was first > reported. > > Apparently this happens with v5.9-rc3, and may be related to > 50310600ebda ("iommu/vt-d: Enable PCI ACS for

Re: [bugzilla-dae...@bugzilla.kernel.org: [Bug 209149] New: "iommu/vt-d: Enable PCI ACS for platform opt in hint" makes NVMe config space not accessible after S3]

2020-09-23 Thread Rajat Jain via iommu
On Wed, Sep 23, 2020 at 9:19 AM Raj, Ashok wrote: > > Hi Bjorn > > > On Wed, Sep 23, 2020 at 11:03:27AM -0500, Bjorn Helgaas wrote: > > [+cc IOMMU and NVMe folks] > > > > Sorry, I forgot to forward this to linux-pci when it was first > > reported. > > > > Apparently this happens with v5.9-rc3,

Re: [PATCH v3 0/6] Convert the intel iommu driver to the dma-iommu api

2020-09-23 Thread Lu Baolu
Hi Tvrtko, On 9/15/20 4:31 PM, Tvrtko Ursulin wrote: With the previous version of the series I hit a problem on Ivybridge where apparently the dma engine width is not respected. At least that is my layman interpretation of the errors. From the older thread: <3> [209.526605] DMAR:

Re: [PATCH] iommu: of: skip iommu_device_list traversal in of_iommu_xlate()

2020-09-23 Thread Charan Teja Kalla
On 9/23/2020 9:54 PM, Robin Murphy wrote: > On 2020-09-23 15:53, Charan Teja Reddy wrote: >> In of_iommu_xlate(), check if iommu device is enabled before traversing >> the iommu_device_list through iommu_ops_from_fwnode(). It is of no use >> in traversing the iommu_device_list only to return

Re: [PATCH 2/3] iommu: amd: Add support for RMP_PAGE_FAULT and RMP_HW_ERR

2020-09-23 Thread Suravee Suthikulpanit
On 9/18/20 4:31 PM, Joerg Roedel wrote: Hi Suravee, On Wed, Sep 16, 2020 at 01:55:48PM +, Suravee Suthikulpanit wrote: +static void amd_iommu_report_rmp_hw_error(volatile u32 *event) +{ + struct pci_dev *pdev; + struct iommu_dev_data *dev_data = NULL; + int devid =

Re: [PATCH v10 01/11] vfio: VFIO_IOMMU_SET_PASID_TABLE

2020-09-23 Thread Zenghui Yu
Hi Eric, On 2020/3/21 0:19, Eric Auger wrote: From: "Liu, Yi L" This patch adds an VFIO_IOMMU_SET_PASID_TABLE ioctl which aims to pass the virtual iommu guest configuration to the host. This latter takes the form of the so-called PASID table. Signed-off-by: Jacob Pan Signed-off-by: Liu, Yi

Re: IOVA allocation dependency between firmware buffer and remaining buffers

2020-09-23 Thread Christoph Hellwig
On Wed, Sep 23, 2020 at 08:48:26AM +0200, Marek Szyprowski wrote: > Hi Shaik, > > I've run into similar problem while adapting S5P-MFC and Exynos4-IS > drivers for generic IOMMU-DMA framework. Here is my first solution: >

Re: [PATCH v2] iommu/arm: Add module parameter to set msi iova address

2020-09-23 Thread Auger Eric
Hi Will, On 9/21/20 10:45 PM, Will Deacon wrote: > On Mon, Sep 14, 2020 at 11:13:07AM -0700, Vennila Megavannan wrote: >> From: Srinath Mannam >> >> Add provision to change default value of MSI IOVA base to platform's >> suitable IOVA using module parameter. The present hardcoded MSI IOVA base

Re: IOVA allocation dependency between firmware buffer and remaining buffers

2020-09-23 Thread Marek Szyprowski
Hi Shaik, I've run into similar problem while adapting S5P-MFC and Exynos4-IS drivers for generic IOMMU-DMA framework. Here is my first solution: https://lore.kernel.org/linux-samsung-soc/20200918144833.14618-1-m.szyprow...@samsung.com/T/ It allows to remap given buffer at the specific IOVA

Re: IOVA allocation dependency between firmware buffer and remaining buffers

2020-09-23 Thread Ajay Kumar
Hello all, We pretty much tried to solve the same issue here with a new API in DMA-IOMMU: https://lore.kernel.org/linux-iommu/20200811054912.ga...@infradead.org/T/ Christoph - the user part would be MFC devices on exynos platforms Thanks, Ajay On Wed, Sep 23, 2020 at 12:28 PM Christoph

Re: IOVA allocation dependency between firmware buffer and remaining buffers

2020-09-23 Thread Ajay kumar
Hello all, We pretty much tried to solve the same issue here with a new API in DMA-IOMMU: https://lore.kernel.org/linux-iommu/20200811054912.ga...@infradead.org/T/ Christopher- the user part would be MFC devices on exynos platforms Thanks, Ajay On 9/23/20, Christoph Hellwig wrote: > On Wed,

dma_alloc_coherent not allocating memory from CMA Reserved

2020-09-23 Thread Sathyavathi M
Hi All,   I am trying to allocate coherent memory for 33 MB in kerenl driver. and for that i have reserved CMA of 1024 MB, but from dmesg, i can see that address reserved for cma is different and what i get with dma_alloc_coherent is different. My pc is intel x86 machine and tried in

Re: [PATCH 1/4] ARM/omap1: switch to use dma_direct_set_offset for lbus DMA offsets

2020-09-23 Thread Russell King - ARM Linux admin
On Mon, Sep 21, 2020 at 08:47:23AM +0200, Christoph Hellwig wrote: > On Mon, Sep 21, 2020 at 09:44:18AM +0300, Tony Lindgren wrote: > > * Janusz Krzysztofik [200919 22:29]: > > > Hi Tony, > > > > > > On Friday, September 18, 2020 7:49:33 A.M. CEST Tony Lindgren wrote: > > > > * Christoph Hellwig

[PATCH 06/13] iommu: amd: Move IO page table related functions

2020-09-23 Thread Suravee Suthikulpanit
Preparing to migrate to use IO page table framework. There is no functional change. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/amd_iommu.h | 18 ++ drivers/iommu/amd/io_pgtable.c | 473 drivers/iommu/amd/iommu.c | 476

[PATCH 03/13] iommu: amd: Move pt_root to to struct amd_io_pgtable

2020-09-23 Thread Suravee Suthikulpanit
To better organize the data structure since it contains IO page table related information. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/amd_iommu.h | 2 +- drivers/iommu/amd/amd_iommu_types.h | 2 +- drivers/iommu/amd/iommu.c | 2 +- 3 files changed, 3

[PATCH 12/13] iommu: amd: Introduce iommu_v1_map_page and iommu_v1_unmap_page

2020-09-23 Thread Suravee Suthikulpanit
These implement map and unmap for AMD IOMMU v1 pagetable, which will be used by the IO pagetable framework. Also clean up unused extern function declarations. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/amd_iommu.h | 13 - drivers/iommu/amd/io_pgtable.c | 25

[PATCH 11/13] iommu: amd: Introduce iommu_v1_iova_to_phys

2020-09-23 Thread Suravee Suthikulpanit
This implements iova_to_phys for AMD IOMMU v1 pagetable, which will be used by the IO page table framework. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/io_pgtable.c | 21 + drivers/iommu/amd/iommu.c | 16 +--- 2 files changed, 22

[PATCH 05/13] iommu: amd: Declare functions as extern

2020-09-23 Thread Suravee Suthikulpanit
And move declaration to header file so that they can be included across multiple files. There is no functional change. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/amd_iommu.h | 3 +++ drivers/iommu/amd/iommu.c | 39 +-- 2 files changed, 22

[PATCH 00/13] iommu: amd: Add Generic IO Page Table Framework Support

2020-09-23 Thread Suravee Suthikulpanit
The framework allows callable implementation of IO page table. This allows AMD IOMMU driver to switch between different types of AMD IOMMU page tables (e.g. v1 vs. v2). This series refactors the current implementation of AMD IOMMU v1 page table to adopt the framework. There should be no

[PATCH 02/13] iommu: amd: Prepare for generic IO page table framework

2020-09-23 Thread Suravee Suthikulpanit
Add initial hook up code to implement generic IO page table framework. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/Kconfig | 1 + drivers/iommu/amd/Makefile | 2 +- drivers/iommu/amd/amd_iommu_types.h | 32 +++ drivers/iommu/amd/io_pgtable.c | 89

[PATCH 04/13] iommu: amd: Convert to using amd_io_pgtable

2020-09-23 Thread Suravee Suthikulpanit
Make use of the new struct amd_io_pgtable in preparation to remove the struct domain_pgtable. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/amd_iommu.h | 1 + drivers/iommu/amd/iommu.c | 25 ++--- 2 files changed, 11 insertions(+), 15 deletions(-) diff

[PATCH 10/13] iommu: amd: Refactor fetch_pte to use struct amd_io_pgtable

2020-09-23 Thread Suravee Suthikulpanit
To simplify the fetch_pte function. There is no functional change. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/amd_iommu.h | 2 +- drivers/iommu/amd/io_pgtable.c | 13 +++-- drivers/iommu/amd/iommu.c | 4 +++- 3 files changed, 11 insertions(+), 8 deletions(-)

[PATCH 07/13] iommu: amd: Restructure code for freeing page table

2020-09-23 Thread Suravee Suthikulpanit
Introduce amd_iommu_free_pgtable helper function, which consolidates logic for freeing page table. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/amd_iommu.h | 2 +- drivers/iommu/amd/io_pgtable.c | 12 +++- drivers/iommu/amd/iommu.c | 19 ++- 3 files

[PATCH 09/13] iommu: amd: Rename variables to be consistent with struct io_pgtable_ops

2020-09-23 Thread Suravee Suthikulpanit
There is no functional change. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/io_pgtable.c | 31 +++ 1 file changed, 15 insertions(+), 16 deletions(-) diff --git a/drivers/iommu/amd/io_pgtable.c b/drivers/iommu/amd/io_pgtable.c index

[PATCH 08/13] iommu: amd: Remove amd_iommu_domain_get_pgtable

2020-09-23 Thread Suravee Suthikulpanit
Since the IO page table root and mode parameters have been moved into the struct amd_io_pg, the function is no longer needed. Therefore, remove it along with the struct domain_pgtable. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/amd_iommu.h | 4 ++--

[PATCH 13/13] iommu: amd: Adopt IO page table framework

2020-09-23 Thread Suravee Suthikulpanit
Switch to using IO page table framework for AMD IOMMU v1 page table. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/amd_iommu.h | 3 +++ drivers/iommu/amd/iommu.c | 10 ++ 2 files changed, 13 insertions(+) diff --git a/drivers/iommu/amd/amd_iommu.h

[PATCH 01/13] iommu: amd: Re-define amd_iommu_domain_encode_pgtable as inline

2020-09-23 Thread Suravee Suthikulpanit
Move the function to header file to allow inclusion in other files. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/amd_iommu.h | 13 + drivers/iommu/amd/iommu.c | 10 -- 2 files changed, 13 insertions(+), 10 deletions(-) diff --git