Re: [PATCH 00/13] x86: Trenchboot secure dynamic launch Linux kernel support

On Fri, Sep 25, 2020 at 05:32:50PM -0400, Daniel P. Smith wrote: > The work for this is split across different teams with different > resourcing levels resulting in one organization working Intel and > another working AMD. This then raised the concern over submitting a > single patch set developed

[PATCH v4 6/7] iommu/vt-d: Convert intel iommu driver to the iommu ops

From: Tom Murphy Convert the intel iommu driver to the dma-iommu api. Remove the iova handling and reserve region code from the intel iommu driver. Signed-off-by: Tom Murphy Signed-off-by: Lu Baolu --- drivers/iommu/intel/Kconfig | 1 + drivers/iommu/intel/iommu.c | 742

[PATCH v4 7/7] iommu/vt-d: Cleanup after converting to dma-iommu ops

Some cleanups after converting the driver to use dma-iommu ops. - Remove nobounce option; - Cleanup and simplify the path in domain mapping. Signed-off-by: Lu Baolu --- .../admin-guide/kernel-parameters.txt | 5 -- drivers/iommu/intel/iommu.c | 90 ++-

[PATCH v4 3/7] iommu: Allow the dma-iommu api to use bounce buffers

From: Tom Murphy Allow the dma-iommu api to use bounce buffers for untrusted devices. This is a copy of the intel bounce buffer code. Signed-off-by: Tom Murphy Co-developed-by: Lu Baolu Signed-off-by: Lu Baolu --- drivers/iommu/dma-iommu.c | 163 +++--- 1

[PATCH v4 4/7] iommu: Add quirk for Intel graphic devices in map_sg

Combining the sg segments exposes a bug in the Intel i915 driver which causes visual artifacts and the screen to freeze. This is most likely because of how the i915 handles the returned list. It probably doesn't respect the returned value specifying the number of elements in the list and instead

[PATCH v4 1/7] iommu: Handle freelists when using deferred flushing in iommu drivers

From: Tom Murphy Allow the iommu_unmap_fast to return newly freed page table pages and pass the freelist to queue_iova in the dma-iommu ops path. This is useful for iommu drivers (in this case the intel iommu driver) which need to wait for the ioTLB to be flushed before newly free/unmapped page

[PATCH v4 5/7] iommu/vt-d: Update domain geometry in iommu_ops.at(de)tach_dev

The iommu-dma constrains IOVA allocation based on the domain geometry that the driver reports. Update domain geometry everytime a domain is attached to or detached from a device. Signed-off-by: Lu Baolu --- drivers/iommu/intel/iommu.c | 16 ++-- 1 file changed, 14 insertions(+), 2

[PATCH v4 0/7] Convert the intel iommu driver to the dma-iommu api

Hi, The previous post of this series could be found here. https://lore.kernel.org/linux-iommu/20200912032200.11489-1-baolu...@linux.intel.com/ This version introduce a new patch [4/7] to fix an issue reported here.

[PATCH v4 2/7] iommu: Add iommu_dma_free_cpu_cached_iovas()

From: Tom Murphy Add a iommu_dma_free_cpu_cached_iovas function to allow drivers which use the dma-iommu ops to free cached cpu iovas. Signed-off-by: Tom Murphy Signed-off-by: Lu Baolu --- drivers/iommu/dma-iommu.c | 9 + include/linux/dma-iommu.h | 8 2 files changed, 17

[PATCH] x86/apic/msi: Unbreak DMAR and HPET MSI

Switching the DMAR and HPET MSI code to use the generic MSI domain ops missed to add the flag which tells the core code to update the domain operations with the defaults. As a consequence the core code crashes when an interrupt in one of those domains is allocated. Add the missing flags. Fixes:

[PATCH 1/1] iommu/vt-d: Fix lockdep splat in iommu_flush_dev_iotlb()

Lock(>lock) without disabling irq causes lockdep warnings. [ 12.703950] [ 12.703962] WARNING: possible irq lock inversion dependency detected [ 12.703975] 5.9.0-rc6+ #659 Not tainted [ 12.703983]