Hi iommu developers,
I have a question regarding the recent VIOT submission for supporting
paravirtualized IOMMU in guests. The spec defines PCI Range Node Structure
(5.2.30.3) that maps to a single PCI segment.
Is it possible for the new table to express that an IOMMU covers all PCI
Joerg,
I did run with 5.9.3. After about 2 hours in a reboot-cycle the system failed
again with amdgpu-problems.
> please try booting with "pci=noats" on the kernel command line.
This I will do next.
Best regards,
Edgar
-Original Message-
From: Merger, Edgar [AUTOSOL/MAS/AUGS]
Sent:
FW has to configure devices' StreamIDs so that SMMU is able to lookup
context and do proper translation later on. For Armada 7040 & 8040 and
publicly available FW, most of the devices are configured properly,
but some like ap_sdhci0, PCIe, NIC still remain unassigned which
results in SMMU faults
Joerg,
One remark:
With kernel-parameter pci=noats in dmesg there is
[ 10.128463] kfd kfd: Error initializing iommuv2
Best regards,
Edgar
-Original Message-
From: Merger, Edgar [AUTOSOL/MAS/AUGS]
Sent: Donnerstag, 5. November 2020 12:16
To: 'jroe...@suse.de'
Cc:
On 2020-11-05 07:42, Christoph Hellwig wrote:
dma_virt_ops requires that all pages have a kernel virtual address.
Introduce a INFINIBAND_VIRT_DMA Kconfig symbol that depends on !HIGHMEM
and a large enough dma_addr_t, and make all three driver depend on the
new symbol.
Signed-off-by: Christoph
On Thu, Nov 05, 2020 at 11:58:30AM +, Merger, Edgar [AUTOSOL/MAS/AUGS]
wrote:
> One remark:
> With kernel-parameter pci=noats in dmesg there is
>
> [ 10.128463] kfd kfd: Error initializing iommuv2
That is expected. IOMMUv2 depends on ATS support.
Regards,
Joerg
Hi,
On Thu, Nov 05, 2020 at 12:13:53AM +, Yinghan Yang via iommu wrote:
> Hi iommu developers,
>
>
>
> I have a question regarding the recent VIOT submission for supporting
> paravirtualized IOMMU in guests. The spec defines PCI Range Node Structure
> (5.2.30.3) that maps to a single PCI
On Sat, Oct 31, 2020 at 1:38 AM John Stultz wrote:
> Tweaks to allow pinctrl-msm code to be loadable as a module.
>
> This is needed in order to support having the qcom-scm driver,
> which pinctrl-msm calls into, configured as a module.
>
> This requires that we tweak Kconfigs selecting
On Thu, Nov 05, 2020 at 08:42:02AM +0100, Christoph Hellwig wrote:
> diff --git a/include/rdma/ib_verbs.h b/include/rdma/ib_verbs.h
> index 5f8fd7976034e0..661e4a22b3cb81 100644
> +++ b/include/rdma/ib_verbs.h
> @@ -3950,6 +3950,8 @@ static inline int ib_req_ncomp_notif(struct ib_cq *cq,
> int
On Thu, Nov 05, 2020 at 08:42:03AM +0100, Christoph Hellwig wrote:
> Now that all users of dma_virt_ops are gone we can remove the workaround
> for it in the PCI peer to peer code.
>
> Signed-off-by: Christoph Hellwig
> Reviewed-by: Logan Gunthorpe
> Acked-by: Bjorn Helgaas
>
On Thu, Nov 05, 2020 at 08:42:00AM +0100, Christoph Hellwig wrote:
> dma_virt_ops requires that all pages have a kernel virtual address.
> Introduce a INFINIBAND_VIRT_DMA Kconfig symbol that depends on !HIGHMEM
> and a large enough dma_addr_t, and make all three driver depend on the
> new symbol.
On Thu, Nov 05, 2020 at 06:08:16PM +0100, Christoph Hellwig wrote:
> On Thu, Nov 05, 2020 at 10:34:18AM -0400, Jason Gunthorpe wrote:
> > The check is removed here, but I didn't see a matching check added to
> > the IB side? Something like:
> >
> > static int rdma_rw_map_sg(struct ib_device *dev,
AMD IOMMU requires 4k-aligned pages for the event log, the PPR log,
and the completion wait write-back regions. However, when allocating
the pages, they could be part of large mapping (e.g. 2M) page.
This causes #PF due to the SNP RMP hardware enforces the check based
on the page level for these
The IOMMU code needs more work. We're sure for now the IRQ remapping
hooks are not applicable when Linux is the root.
Signed-off-by: Wei Liu
Acked-by: Joerg Roedel
---
drivers/iommu/hyperv-iommu.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
On Thu, Nov 05, 2020 at 10:34:18AM -0400, Jason Gunthorpe wrote:
> The check is removed here, but I didn't see a matching check added to
> the IB side? Something like:
>
> static int rdma_rw_map_sg(struct ib_device *dev, struct scatterlist *sg,
> u32 sg_cnt, enum
On Thu, Nov 05, 2020 at 10:34:15AM -0400, Jason Gunthorpe wrote:
> On Thu, Nov 05, 2020 at 08:42:02AM +0100, Christoph Hellwig wrote:
> > diff --git a/include/rdma/ib_verbs.h b/include/rdma/ib_verbs.h
> > index 5f8fd7976034e0..661e4a22b3cb81 100644
> > +++ b/include/rdma/ib_verbs.h
> > @@ -3950,6
On 2020-11-05 14:41, Jason Gunthorpe wrote:
On Thu, Nov 05, 2020 at 08:42:00AM +0100, Christoph Hellwig wrote:
dma_virt_ops requires that all pages have a kernel virtual address.
Introduce a INFINIBAND_VIRT_DMA Kconfig symbol that depends on !HIGHMEM
and a large enough dma_addr_t, and make all
On Thu, Sep 24, 2020 at 01:27:25PM +0200, Thierry Reding wrote:
> On Tue, Sep 15, 2020 at 02:36:48PM +0200, Thierry Reding wrote:
> > On Mon, Sep 14, 2020 at 04:08:29PM -0600, Rob Herring wrote:
> > > On Fri, Sep 04, 2020 at 02:59:57PM +0200, Thierry Reding wrote:
> > > > From: Thierry Reding
> >
On Fri, Sep 25, 2020 at 01:39:07PM +0100, Robin Murphy wrote:
> On 2020-09-24 17:23, Dmitry Osipenko wrote:
> > 24.09.2020 17:01, Thierry Reding пишет:
> > > On Thu, Sep 24, 2020 at 04:23:59PM +0300, Dmitry Osipenko wrote:
> > > > 04.09.2020 15:59, Thierry Reding пишет:
> > > > > From: Thierry
On Thu, Nov 05, 2020 at 03:29:58PM +, Robin Murphy wrote:
> It's commonly done using the "def_bool" shorthand. I fact, I think simply
> "def_bool !HIGHMEM" would suffice for the fundamental definition here.
Indeed, I'll switch it over.
___
iommu
Hi!
On 03/11/2020 17:31, Nicolas Saenz Julienne wrote:
> crashkernel might reserve memory located in ZONE_DMA. We plan to delay
> ZONE_DMA's initialization after unflattening the devicetree and ACPI's
> boot table initialization, so move it later in the boot process.
> Specifically into
On Thu, Sep 24, 2020 at 07:23:34PM +0300, Dmitry Osipenko wrote:
> 24.09.2020 17:01, Thierry Reding пишет:
> > On Thu, Sep 24, 2020 at 04:23:59PM +0300, Dmitry Osipenko wrote:
> >> 04.09.2020 15:59, Thierry Reding пишет:
> >>> From: Thierry Reding
> >>>
> >>> Reserved memory regions can be marked
On Fri, Sep 25, 2020 at 04:21:17PM +0300, Dmitry Osipenko wrote:
> 25.09.2020 15:39, Robin Murphy пишет:
> ...
> >> IIRC, in the past Robin Murphy was suggesting to read out hardware state
> >> early during kernel boot in order to find what regions are in use by
> >> hardware.
> >
> > I doubt I
On Thu, Nov 05, 2020 at 12:15:46PM +, Robin Murphy wrote:
> On 2020-11-05 07:42, Christoph Hellwig wrote:
>> dma_virt_ops requires that all pages have a kernel virtual address.
>> Introduce a INFINIBAND_VIRT_DMA Kconfig symbol that depends on !HIGHMEM
>> and a large enough dma_addr_t, and make
On Thu, Nov 05, 2020 at 01:23:57PM -0400, Jason Gunthorpe wrote:
> But that depends on the calling driver doing this properly, and we
> don't expose an API to get the PCI device of the struct ib_device
> .. how does nvme even work here?
The PCI p2pdma APIs walk the parent chains of a struct
On Thu, Nov 05, 2020 at 01:39:30PM -0400, Jason Gunthorpe wrote:
> Hmm. This works for real devices like mlx5, but it means the three SW
> devices will also resolve to a real PCI device that is not the DMA
> device.
Does it? When I followed the links on my system rxe was a virtual
device without
On Thu, Nov 05, 2020 at 02:06:49PM -0500, Konrad Rzeszutek Wilk wrote:
> .
> > > Right, so I am wondering if we can do this better.
> > >
> > > That is you are never going to get any 32-bit devices with SEV right? That
> > > is there is nothing that bounds you to always use the memory below 4GB?
On Thu, Nov 05, 2020 at 06:29:21PM +0100, Christoph Hellwig wrote:
> On Thu, Nov 05, 2020 at 01:23:57PM -0400, Jason Gunthorpe wrote:
> > But that depends on the calling driver doing this properly, and we
> > don't expose an API to get the PCI device of the struct ib_device
> > .. how does nvme
On 2020-11-05 16:43, Thierry Reding wrote:
On Thu, Sep 24, 2020 at 01:27:25PM +0200, Thierry Reding wrote:
On Tue, Sep 15, 2020 at 02:36:48PM +0200, Thierry Reding wrote:
On Mon, Sep 14, 2020 at 04:08:29PM -0600, Rob Herring wrote:
On Fri, Sep 04, 2020 at 02:59:57PM +0200, Thierry Reding
On Thu, Nov 05, 2020 at 01:52:53PM -0400, Jason Gunthorpe wrote:
> On Thu, Nov 05, 2020 at 08:42:02AM +0100, Christoph Hellwig wrote:
> > @@ -1341,7 +1322,14 @@ int ib_register_device(struct ib_device *device,
> > const char *name,
> > if (ret)
> > return ret;
> >
> > -
On 2020-10-27 11:26, Shameer Kolothum wrote:
Add a helper function that retrieves RMR memory descriptors
associated with a given endpoint dev. These memory regions
should have a unity mapping in the SMMU. So reserve them as
IOMMU_RESV_DIRECT.
As a general observation, we also need a way into
.
> > Right, so I am wondering if we can do this better.
> >
> > That is you are never going to get any 32-bit devices with SEV right? That
> > is there is nothing that bounds you to always use the memory below 4GB?
> >
>
> We do support 32-bit PCIe passthrough devices with SEV.
Ewww.. Which
On Tue, Nov 03, 2020 at 01:42:00PM +0800, Yong Wu wrote:
> Add mt8192 smi support.
>
> Signed-off-by: Yong Wu
> ---
> drivers/memory/mtk-smi.c | 19 +++
Thanks, applied.
Best regards,
Krzysztof
___
iommu mailing list
On Thu, Nov 5, 2020 at 6:17 AM Linus Walleij wrote:
> On Sat, Oct 31, 2020 at 1:38 AM John Stultz wrote:
>
> > Tweaks to allow pinctrl-msm code to be loadable as a module.
> >
> > This is needed in order to support having the qcom-scm driver,
> > which pinctrl-msm calls into, configured as a
On Thu, Nov 05, 2020 at 06:43:06PM +0100, Christoph Hellwig wrote:
> On Thu, Nov 05, 2020 at 01:39:30PM -0400, Jason Gunthorpe wrote:
> > Hmm. This works for real devices like mlx5, but it means the three SW
> > devices will also resolve to a real PCI device that is not the DMA
> > device.
>
>
Hello Konrad,
On Thu, Nov 05, 2020 at 12:43:17PM -0500, Konrad Rzeszutek Wilk wrote:
> On Wed, Nov 04, 2020 at 10:39:13PM +, Ashish Kalra wrote:
> > Hello Konrad,
> >
> > On Wed, Nov 04, 2020 at 05:14:52PM -0500, Konrad Rzeszutek Wilk wrote:
> > > On Wed, Nov 04, 2020 at 10:08:04PM +,
On Thu, Nov 05, 2020 at 07:38:28PM +, Ashish Kalra wrote:
> On Thu, Nov 05, 2020 at 02:06:49PM -0500, Konrad Rzeszutek Wilk wrote:
> > .
> > > > Right, so I am wondering if we can do this better.
> > > >
> > > > That is you are never going to get any 32-bit devices with SEV right?
> > > >
On Tue, 03 Nov 2020 13:41:58 +0800, Yong Wu wrote:
> Convert MediaTek SMI to DT schema.
>
> Signed-off-by: Yong Wu
> ---
> .../mediatek,smi-common.txt | 50 ---
> .../mediatek,smi-common.yaml | 140 ++
>
On Tue, Nov 03, 2020 at 01:41:58PM +0800, Yong Wu wrote:
> Convert MediaTek SMI to DT schema.
>
> Signed-off-by: Yong Wu
> ---
> .../mediatek,smi-common.txt | 50 ---
> .../mediatek,smi-common.yaml | 140 ++
>
On Tue, Nov 03, 2020 at 01:41:59PM +0800, Yong Wu wrote:
> Add mt8192 smi support in the bindings.
>
> Signed-off-by: Yong Wu
> Reviewed-by: Rob Herring
> ---
> .../bindings/memory-controllers/mediatek,smi-common.yaml | 4 +++-
> .../bindings/memory-controllers/mediatek,smi-larb.yaml
-"Christoph Hellwig" wrote: -
>To: "Jason Gunthorpe"
>From: "Christoph Hellwig"
>Date: 11/05/2020 08:46AM
>Cc: "Bjorn Helgaas" , "Bernard Metzler"
>, "Zhu Yanjun" , "Logan
>Gunthorpe" , "Dennis Dalessandro"
>, "Mike Marciniszyn"
>, linux-r...@vger.kernel.org,
Hi Jean,
Thank you for the clarifications. In cases where a large range of PCI segments
may be assigned to guest, would it make sense to describe this configuration as
base + count. Currently, one would have to describe them individually.
Yinghan
-Original Message-
From:
On Thu, Nov 05, 2020 at 03:20:07PM -0500, Konrad Rzeszutek Wilk wrote:
> On Thu, Nov 05, 2020 at 07:38:28PM +, Ashish Kalra wrote:
> > On Thu, Nov 05, 2020 at 02:06:49PM -0500, Konrad Rzeszutek Wilk wrote:
> > > .
> > > > > Right, so I am wondering if we can do this better.
> > > > >
> > > >
With Kernel 5.9.3 kernel-parameter pci=noats the system is running for 19hours
now in reboot-test without the error to occur.
Best regards,
Edgar
-Original Message-
From: jroe...@suse.de
Sent: Donnerstag, 5. November 2020 13:33
To: Merger, Edgar [AUTOSOL/MAS/AUGS]
Cc:
This patch reworks PINCTRL_MSM to be a visible option, and
instead of having the various SoC specific drivers select
PINCTRL_MSM, this switches those configs to depend on
PINCTRL_MSM.
This is useful, as it will be needed in order to cleanly support
having the qcom-scm driver, which pinctrl-msm
Tweaks to allow pinctrl-msm code to be loadable as a module.
This is needed in order to support having the qcom-scm driver,
which pinctrl-msm calls into, configured as a module.
This requires that we tweak Kconfigs selecting PINCTRL_MSM to
also depend on QCOM_SCM || QCOM_SCM=n so that we match
Allow the qcom_scm driver to be loadable as a permenent module.
This still uses the "depends on QCOM_SCM || !QCOM_SCM" bit to
ensure that drivers that call into the qcom_scm driver are
also built as modules. While not ideal in some cases its the
only safe way I can find to avoid build errors
On Fri 30 Oct 19:38 CDT 2020, John Stultz wrote:
> Tweaks to allow pinctrl-msm code to be loadable as a module.
>
> This is needed in order to support having the qcom-scm driver,
> which pinctrl-msm calls into, configured as a module.
>
> This requires that we tweak Kconfigs selecting
On Fri 30 Oct 19:38 CDT 2020, John Stultz wrote:
> Allow the qcom_scm driver to be loadable as a permenent module.
>
> This still uses the "depends on QCOM_SCM || !QCOM_SCM" bit to
> ensure that drivers that call into the qcom_scm driver are
> also built as modules. While not ideal in some cases
On Wed, Nov 04, 2020 at 10:39:13PM +, Ashish Kalra wrote:
> Hello Konrad,
>
> On Wed, Nov 04, 2020 at 05:14:52PM -0500, Konrad Rzeszutek Wilk wrote:
> > On Wed, Nov 04, 2020 at 10:08:04PM +, Ashish Kalra wrote:
> > > From: Ashish Kalra
> > >
> > > For SEV, all DMA to and from guest has
On Thu, Nov 05, 2020 at 08:42:02AM +0100, Christoph Hellwig wrote:
> @@ -1341,7 +1322,14 @@ int ib_register_device(struct ib_device *device, const
> char *name,
> if (ret)
> return ret;
>
> - setup_dma_device(device, dma_device);
> + /*
> + * If the caller does
51 matches
Mail list logo
