Hi all,
This set of patches solves some errors when I tested the SMMU nested mode.
Test scenario description:
guest kernel: 4KB translation granule
host kernel: 16KB translation granule
errors:
1. encountered an endless loop in __arm_smmu_tlb_inv_range because
num_pages is 0
2. encountered
On Wed, May 19, 2021 at 10:42 PM Dan Carpenter wrote:
>
> On Wed, May 19, 2021 at 09:39:20PM +0800, Yongji Xie wrote:
> > On Mon, May 17, 2021 at 5:56 PM Xie Yongji wrote:
> > >
> > > This ensures that we will not use an invalid block size
> > > in config space (might come from an untrusted
On Thu, May 20, 2021 at 01:25:16PM +0800, Yongji Xie wrote:
> On Wed, May 19, 2021 at 10:42 PM Dan Carpenter
> wrote:
> >
> > On Wed, May 19, 2021 at 09:39:20PM +0800, Yongji Xie wrote:
> > > On Mon, May 17, 2021 at 5:56 PM Xie Yongji
> > > wrote:
> > > >
> > > > This ensures that we will not
This patch series converts the Intel IOMMU to use the generic sva
helpers defined in iommu-sva-lib.c and io-pgfault.c. It includes the
SVA pasid management and IO page fault handling.
This series could be divided into below parts:
PATCH[1~3]: Use iommu_sva_alloc/free_pasid() to manage the SVA
Align the pasid alloc/free code with the generic helpers defined in the
iommu core. This also refactored the SVA binding code to improve the
readability.
Signed-off-by: Lu Baolu
---
include/linux/intel-iommu.h | 1 -
drivers/iommu/intel/iommu.c | 3 +
drivers/iommu/intel/svm.c | 278
It's common to iterate the svm device list and find a matched device. Add
common helpers to do this and consolidate the code.
Signed-off-by: Lu Baolu
---
drivers/iommu/intel/svm.c | 68 +++
1 file changed, 40 insertions(+), 28 deletions(-)
diff --git
Refactor prq_event_thread() by moving handling single prq event out of
the main loop.
Signed-off-by: Lu Baolu
---
drivers/iommu/intel/svm.c | 239 ++
1 file changed, 136 insertions(+), 103 deletions(-)
diff --git a/drivers/iommu/intel/svm.c
This allocates and registers the iopf queue infrastructure for devices
which want to support IO page fault for SVA.
Signed-off-by: Lu Baolu
---
include/linux/intel-iommu.h | 2 ++
drivers/iommu/intel/iommu.c | 66 ++---
drivers/iommu/intel/svm.c | 37
We are about to use iommu_sva_alloc/free_pasid() helpers in iommu core.
That means the pasid life cycle will be managed by iommu core. Use a
local array to save the per pasid private data instead of attaching it
the real pasid.
Signed-off-by: Lu Baolu
---
drivers/iommu/intel/svm.c | 62
Let the IO page fault requests get handled through the io-pgfault
framework.
Signed-off-by: Lu Baolu
---
drivers/iommu/intel/iommu.c | 14 ++-
drivers/iommu/intel/svm.c | 84 +++--
2 files changed, 17 insertions(+), 81 deletions(-)
diff --git
This adds a new trace event to track the page fault request report.
This event will provide almost all information defined in a page
request descriptor.
A sample output:
| prq_report: dmar0/:00:0a.0 seq# 1: rid=0x50 addr=0x559ef6f97 r
pasid=0x2 index=0x1
| prq_report: dmar0/:00:0a.0
The execution time of some operations is very performance critical, such
as cache invalidation and PRQ processing time. This adds some common code
to monitor the execution time range of those operations. The interfaces
include enabling/disabling, checking status, updating sampling data and
A debugfs interface /sys/kernel/debug/iommu/intel/dmar_perf_latency is
created to control and show counts of execution time ranges for various
types per DMAR. The interface may help debug any potential performance
issue.
By default, the interface is disabled.
Possible write value of
Queued invalidation execution time is performance critical and needs
to be monitored. This adds code to sample the execution time of IOTLB/
devTLB/ICE cache invalidation.
Signed-off-by: Lu Baolu
---
drivers/iommu/intel/dmar.c | 31 +++
1 file changed, 31
The execution time for page fault request handling is performance critical
and needs to be monitored. This adds code to sample the execution time of
page fault request handling.
Signed-off-by: Lu Baolu
---
drivers/iommu/intel/svm.c | 16 +---
1 file changed, 13 insertions(+), 3
On 2021/5/20 3:14, Rob Herring wrote:
On Mon, May 17, 2021 at 01:17:05PM +, Wang Xingang wrote:
From: Xingang Wang
When booting with devicetree, the pci_request_acs() is called after the
enumeration and initialization of PCI devices, thus the ACS is not
enabled. This patch add check
On Wed, May 19, 2021 at 09:50:25AM +0800, Lu Baolu wrote:
> Hi Joerg,
>
> Two small fixes are queued in this series. It includes:
>
> - Use user privilege for RID2PASID translation
> - Check memory allocation return value
>
> Please consider them for v5.13.
>
> Best regards,
> Lu Baolu
>
>
On Wed, May 19, 2021 at 2:51 AM Robin Murphy wrote:
>
> On 2021-05-18 12:28, Dong Aisheng wrote:
> > dma_contiguous_reserve() aims to support cmdline case for CMA memory
> > reserve. But if users define reserved memory in DT,
> > 'dma_contiguous_default_area' will not be 0, then it's meaningless
On 2021-05-19 10:30, Shameerali Kolothum Thodi wrote:
-Original Message-
From: Joerg Roedel [mailto:j...@8bytes.org]
Sent: 18 May 2021 09:50
To: Shameerali Kolothum Thodi
Cc: linux-arm-ker...@lists.infradead.org; linux-a...@vger.kernel.org;
iommu@lists.linux-foundation.org; Linuxarm
On Mon, May 17, 2021 at 5:56 PM Xie Yongji wrote:
>
> This ensures that we will not use an invalid block size
> in config space (might come from an untrusted device).
>
> Signed-off-by: Xie Yongji
> ---
> drivers/block/virtio_blk.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>
> -Original Message-
> From: Joerg Roedel [mailto:j...@8bytes.org]
> Sent: 18 May 2021 09:50
> To: Shameerali Kolothum Thodi
> Cc: linux-arm-ker...@lists.infradead.org; linux-a...@vger.kernel.org;
> iommu@lists.linux-foundation.org; Linuxarm ;
> lorenzo.pieral...@arm.com;
In the __arm_smmu_tlb_inv_range(), the fileds of TLBI CMD is
calculated based on the invalid range and the leaf page size,
when SMMU supports RIL. It will cause some errors when the
invalid range isn't aligned with the leaf page size.
1. The num_pages will be zero, if the invalid range is less
In __arm_smmu_tlb_inv_range(), the field 'ttl' of TLB invalidation
command is caculated based on granule size when the SMMU supports
RIL. There are some scenarious we need to avoid, which are pointed
out in the SMMUv3 spec(page 143-144, Version D.a). Adding a check
to ensure that the granule size
On 2021-05-19 10:43, Kunkun Jiang wrote:
Hi all,
This set of patches solves some errors when I tested the SMMU nested mode.
Test scenario description:
guest kernel: 4KB translation granule
host kernel: 16KB translation granule
errors:
1. encountered an endless loop in __arm_smmu_tlb_inv_range
On Wed, May 19, 2021 at 09:39:20PM +0800, Yongji Xie wrote:
> On Mon, May 17, 2021 at 5:56 PM Xie Yongji wrote:
> >
> > This ensures that we will not use an invalid block size
> > in config space (might come from an untrusted device).
I looked at if I should add this as an untrusted function so
On 2021-05-17 16:35, Joerg Roedel wrote:
On Mon, May 17, 2021 at 10:35:00AM -0300, Jason Gunthorpe wrote:
Well, I'm sorry, but there is a huge other thread talking about the
IOASID design in great detail and why this is all needed. Jumping into
this thread without context and basically
Hi Jason,
On Mon, 17 May 2021 11:37:58 -0300, Jason Gunthorpe wrote:
> On Thu, May 13, 2021 at 04:40:28PM -0700, Jacob Pan wrote:
>
> > Looks like we are converging. Let me summarize the takeaways:
> > 1. Remove IOMMU_SVA_BIND_SUPERVISOR flag from this patch, in fact there
> > will be no flags
On Wed, May 19, 2021 at 04:23:21PM +0100, Robin Murphy wrote:
> On 2021-05-17 16:35, Joerg Roedel wrote:
> > On Mon, May 17, 2021 at 10:35:00AM -0300, Jason Gunthorpe wrote:
> > > Well, I'm sorry, but there is a huge other thread talking about the
> > > IOASID design in great detail and why this
On 5/17/2021 11:42 PM, Claire Chang wrote:
> Add a new function, swiotlb_init_io_tlb_mem, for the io_tlb_mem struct
> initialization to make the code reusable.
>
> Note that we now also call set_memory_decrypted in swiotlb_init_with_tbl.
>
> Signed-off-by: Claire Chang
> ---
>
On 5/17/2021 11:42 PM, Claire Chang wrote:
> Add the initialization function to create restricted DMA pools from
> matching reserved-memory nodes.
>
> Signed-off-by: Claire Chang
> ---
> include/linux/device.h | 4 +++
> include/linux/swiotlb.h | 3 +-
> kernel/dma/swiotlb.c| 76
On 5/17/2021 11:42 PM, Claire Chang wrote:
> Add a new wrapper __dma_direct_free_pages() that will be useful later
> for swiotlb_free().
>
> Signed-off-by: Claire Chang
Reviewed-by: Florian Fainelli
--
Florian
___
iommu mailing list
On 5/17/2021 11:42 PM, Claire Chang wrote:
> Add a new kconfig symbol, DMA_RESTRICTED_POOL, for restricted DMA pool.
>
> Signed-off-by: Claire Chang
Reviewed-by: Florian Fainelli
--
Florian
___
iommu mailing list
iommu@lists.linux-foundation.org
On Mon, May 17, 2021 at 01:17:05PM +, Wang Xingang wrote:
> From: Xingang Wang
>
> When booting with devicetree, the pci_request_acs() is called after the
> enumeration and initialization of PCI devices, thus the ACS is not
> enabled. This patch add check for IOMMU in of_core_init(), and
On 5/17/2021 11:42 PM, Claire Chang wrote:
> Add a new getter, get_io_tlb_mem, to help select the io_tlb_mem struct.
> The restricted DMA pool is preferred if available.
>
> Signed-off-by: Claire Chang
Reviewed-by: Florian Fainelli
--
Florian
___
On 5/17/2021 11:42 PM, Claire Chang wrote:
> Update is_swiotlb_buffer to add a struct device argument. This will be
> useful later to allow for restricted DMA pool.
>
> Signed-off-by: Claire Chang
Reviewed-by: Florian Fainelli
--
Florian
___
On 5/17/2021 11:42 PM, Claire Chang wrote:
> Update is_swiotlb_active to add a struct device argument. This will be
> useful later to allow for restricted DMA pool.
>
> Signed-off-by: Claire Chang
Reviewed-by: Florian Fainelli
--
Florian
___
On 5/17/2021 11:42 PM, Claire Chang wrote:
> Split the debugfs creation to make the code reusable for supporting
> different bounce buffer pools, e.g. restricted DMA pool.
>
> Signed-off-by: Claire Chang
Reviewed-by: Florian Fainelli
--
Florian
> From: Jason Gunthorpe
> Sent: Thursday, May 20, 2021 2:07 AM
>
> On Wed, May 19, 2021 at 04:23:21PM +0100, Robin Murphy wrote:
> > On 2021-05-17 16:35, Joerg Roedel wrote:
> > > On Mon, May 17, 2021 at 10:35:00AM -0300, Jason Gunthorpe wrote:
> > > > Well, I'm sorry, but there is a huge other
On Wed, May 19, 2021 at 11:12:46PM +, Tian, Kevin wrote:
> > From: Jason Gunthorpe
> > Sent: Thursday, May 20, 2021 2:07 AM
> >
> > On Wed, May 19, 2021 at 04:23:21PM +0100, Robin Murphy wrote:
> > > On 2021-05-17 16:35, Joerg Roedel wrote:
> > > > On Mon, May 17, 2021 at 10:35:00AM -0300,
39 matches
Mail list logo
