On Tue, Nov 23, 2021 at 06:10:33PM +0200, Maxim Levitsky wrote:
> Maxim Levitsky (5):
> iommu/amd: restore GA log/tail pointer on host resume
> iommu/amd: x2apic mode: re-enable after resume
> iommu/amd: x2apic mode: setup the INTX registers on mask/unmask
> iommu/amd: x2apic mode:
On Wed, Dec 15, 2021 at 03:24:32PM -0800, Kees Cook wrote:
> The find.h APIs are designed to be used only on unsigned long arguments.
> This can technically result in a over-read, but it is harmless in this
> case. Regardless, fix it to avoid the warning seen under -Warray-bounds,
> which we'd
On Thu, Dec 16, 2021 at 09:17:03AM +0800, Lu Baolu wrote:
> These macros has no reference in the tree anymore. Cleanup them.
>
> Signed-off-by: Lu Baolu
> ---
> include/linux/intel-svm.h | 6 --
> 1 file changed, 6 deletions(-)
Applied, thanks.
On Thu, Dec 16, 2021 at 04:33:02PM +0800, Xiang wangx wrote:
> The double `as' in a comment is repeated, thus it should be removed.
>
> Signed-off-by: Xiang wangx
> ---
> drivers/iommu/virtio-iommu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Applied, thanks.
On Fri, Dec 17, 2021 at 04:38:13PM +0800, Lu Baolu wrote:
> Hi Joerg,
>
> The patches queued in this series are for v5.17. It includes:
>
> - Various cleanups, no functional changes.
>
> Please pull.
Applied, thanks Baolu.
___
iommu mailing list
Hi Joerg,
The patches queued in this series are for v5.17. It includes:
- Various cleanups, no functional changes.
Please pull.
Best regards,
Baolu
Christophe JAILLET (1):
iommu/vt-d: Use bitmap_zalloc() when applicable
Kees Cook (1):
iommu/vt-d: Use correctly sized arguments for bit
From: Christophe JAILLET
'iommu->domain_ids' is a bitmap. So use 'bitmap_zalloc()' to simplify code
and improve the semantic.
Also change the corresponding 'kfree()' into 'bitmap_free()' to keep
consistency.
Signed-off-by: Christophe JAILLET
Link:
From: Kefeng Wang
The BUG_ON check exists in dma_pte_clear_range(), kill the duplicate
check.
Signed-off-by: Kefeng Wang
Link:
https://lore.kernel.org/r/20211025032307.182974-1-wangkefeng.w...@huawei.com
Signed-off-by: Lu Baolu
---
drivers/iommu/intel/iommu.c | 4
1 file changed, 4
From: Maíra Canal
Remove dma_to_buf_pfn function, which is not used in the codebase.
This was pointed by clang with the following warning:
drivers/iommu/intel/iommu.c:136:29: warning: unused function
'dma_to_mm_pfn' [-Wunused-function]
static inline unsigned long dma_to_mm_pfn(unsigned long
From: Kees Cook
The find.h APIs are designed to be used only on unsigned long arguments.
This can technically result in a over-read, but it is harmless in this
case. Regardless, fix it to avoid the warning seen under -Warray-bounds,
which we'd like to enable globally:
In file included from
On 14/12/2021 15:38, Robin Murphy wrote:
...
IOMMU/DT folks, any thoughts about this approach? The patches that are
of interest outside of Host1x/TegraDRM specifics are patches 1, 2, 4,
and 5.
FWIW it looks fairly innocuous to me. I don't understand host1x -
neither hardware nor driver
On Wed, Dec 15, 2021 at 11:21:24AM +, Will Deacon wrote:
> git://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git
> tags/arm-smmu-updates
Pulled, thanks Will.
___
iommu mailing list
iommu@lists.linux-foundation.org
On Tue, Dec 07, 2021 at 07:17:26PM +0800, John Garry wrote:
> It really is a property of the IOVA rcache code that we need to alloc a
> power-of-2 size, so relocate the functionality to resize into
> alloc_iova_fast(), rather than the callsites.
>
> Signed-off-by: John Garry
> Acked-by: Will
All flush queues are driven by iommu-dma now, so there is no need to
abstract entry_dtor or its data any more. Squash the now-canonical
implementation directly into the IOVA code to get it out of the way.
Reviewed-by: John Garry
Reviewed-by: Christoph Hellwig
Signed-off-by: Robin Murphy
---
Once again, with iommu-dma now being the only flush queue user, we no
longer need the extra level of indirection through flush_cb. Squash that
and let the flush queue code call the domain method directly. This does
mean temporarily having to carry an additional copy of the IOMMU domain
pointer
For reasons unclear, pagetable freeing is an effectively recursive
method implemented via an elaborate system of templated functions that
turns out to account for 25% of the object file size. Implementing it
using regular straightforward recursion makes the code simpler, and
seems like a good
From: "Matthew Wilcox (Oracle)"
page->freelist is for the use of slab. We already have the ability
to free a list of pages in the core mm, but it requires the use of a
list_head and for the pages to be chained together through page->lru.
Switch the AMD IOMMU code over to using
From: "Matthew Wilcox (Oracle)"
page->freelist is for the use of slab. We already have the ability
to free a list of pages in the core mm, but it requires the use of a
list_head and for the pages to be chained together through page->lru.
Switch the Intel IOMMU and IOVA code over to using
Complete the move into iommu-dma by refactoring the flush queues
themselves to belong to the DMA cookie rather than the IOVA domain.
The refactoring may as well extend to some minor cosmetic aspects
too, to help us stay one step ahead of the style police.
Signed-off-by: Robin Murphy
---
From: Xiongfeng Wang
It turns out to be possible for hotplugging out a device to reach the
stage of tearing down the device's group and default domain before the
domain's flush queue has drained naturally. At this point, it is then
possible for the timeout to expire just before the del_timer()
v1:
https://lore.kernel.org/linux-iommu/cover.1637671820.git.robin.mur...@arm.com/
v2:
https://lore.kernel.org/linux-iommu/cover.1639157090.git.robin.mur...@arm.com/
Hi all,
Just another quick update addressing the trivial nits and picking up the
review tags so far. The previous Tegra DRM
Squash and simplify some of the freeing code, and move the init
and free routines down into the rest of the flush queue code to
obviate the forward declarations.
Reviewed-by: John Garry
Signed-off-by: Robin Murphy
---
drivers/iommu/iova.c | 131 +++
1
Flush queues are specific to DMA ops, which are now handled exclusively
by iommu-dma. As such, now that the historical artefacts from being
shared directly with drivers have been cleaned up, move the flush queue
code into iommu-dma itself to get it out of the way of other IOVA users.
This is pure
On 2021-12-16 08:02, Christoph Hellwig wrote:
@@ -147,7 +142,7 @@ struct iova *reserve_iova(struct iova_domain *iovad,
unsigned long pfn_lo,
unsigned long pfn_hi);
void init_iova_domain(struct iova_domain *iovad, unsigned long granule,
unsigned long start_pfn);
-int
Signed-off-by: Paul Menzel
---
drivers/iommu/amd/init.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c
index 1eacd43cb436..29d55a99c39f 100644
--- a/drivers/iommu/amd/init.c
+++ b/drivers/iommu/amd/init.c
@@ -1523,7 +1523,7
On Mon, Dec 13, 2021 at 02:14:01AM -0500, Tianyu Lan wrote:
> From: Tianyu Lan
[...]
>
> Tianyu Lan (5):
> swiotlb: Add swiotlb bounce buffer remap function for HV IVM
> x86/hyper-v: Add hyperv Isolation VM check in the cc_platform_has()
> hyper-v: Enable swiotlb bounce buffer for
The kernel must allocate a Process Address Space ID (PASID) on behalf of
each process which will use ENQCMD and program it into the new MSR to
communicate the process identity to platform hardware. ENQCMD uses the
PASID stored in this MSR to tag requests from this process.
The PASID state must be
To avoid complexity of updating each thread's PASID status (e.g. sending
IPI to update IA32_PASID MSR) on allocating and freeing PASID, once
allocated and assigned to an mm, the PASID stays with the mm for the
rest of the mm's lifetime. A reference to the PASID is taken on
allocating the PASID.
From: Peter Zijlstra
Add a new single bit field to the task structure to track whether this task
has initialized the IA32_PASID MSR to the mm's PASID.
Initialize the field to zero when creating a new task with fork/clone.
Signed-off-by: Peter Zijlstra
Co-developed-by: Fenghua Yu
pasid_valid() is defined to check if a given PASID is valid.
Suggested-by: Ashok Raj
Suggested-by: Jacob Pan
Signed-off-by: Fenghua Yu
Reviewed-by: Tony Luck
---
v2:
- Define a helper pasid_valid() (Ashok, Jacob, Thomas, Tony)
include/linux/ioasid.h | 9 +
1 file changed, 9
The ENQCMD implicitly accesses the PASID_MSR to fill in the pasid field
of the descriptor being submitted to an accelerator. But there is no
precise (and stable across kernel changes) point at which the PASID_MSR
is updated from the value for one task to the next.
Kernel code that uses
Since ENQCMD is handled by #GP fix up, it can be re-enabled.
The ENQCMD feature can only be used if CONFIG_INTEL_IOMMU_SVM is set. Add
X86_FEATURE_ENQCMD to the disabled features mask as appropriate so that
cpu_feature_enabled() can be used to check the feature.
Signed-off-by: Fenghua Yu
This CONFIG option originally only referred to the Shared
Virtual Address (SVA) library. But it is now also used for
non-library portions of code.
Drop the "_LIB" suffix so that there is just one configuration
options for all code relating to SVA.
Signed-off-by: Fenghua Yu
Reviewed-by: Tony
All tasks start with PASID state disabled. This means that the first
time they execute an ENQCMD instruction they will take a #GP fault.
Modify the #GP fault handler to check if the "mm" for the task has
already been allocated a PASID. If so, try to fix the #GP fault by
loading the IA32_PASID
This currently depends on CONFIG_IOMMU_SUPPORT. But it is only
needed when CONFIG_IOMMU_SVA option is enabled.
Change the CONFIG guards around definition and initialization
of mm->pasid field.
Suggested-by: Jacob Pan
Signed-off-by: Fenghua Yu
Reviewed-by: Tony Luck
---
v2:
- Change condition
Problems in the old code to manage SVM (Shared Virtual Memory) devices
and the PASID (Process Address Space ID) led to that code being
disabled.
Subsequent discussions resulted in a far simpler approach:
1) PASID life cycle is from first allocation by a process until that
process exits.
2)
Since allocating, freeing and fixing up PASID are changed, the
documentation is updated to reflect the changes.
Originally-by: Ashok Raj
Signed-off-by: Fenghua Yu
Reviewed-by: Tony Luck
---
v2:
- Update life cycle info (Tony and Thomas).
- Update initial PASID value to INVALID_IOASID on
A new mm doesn't have a PASID yet when it's created. Initialize
the mm's PASID on fork() or for init_mm to INVALID_IOASID (-1).
Suggested-by: Dave Hansen
Signed-off-by: Fenghua Yu
Reviewed-by: Tony Luck
---
v2:
- Change condition to more accurate CONFIG_IOMMU_SVA (Jacob)
On Fri, Dec 17, 2021 at 10:01:35PM +, Fenghua Yu wrote:
> The ENQCMD implicitly accesses the PASID_MSR to fill in the pasid field
> of the descriptor being submitted to an accelerator. But there is no
> precise (and stable across kernel changes) point at which the PASID_MSR
> is updated from
'ommu->domain_ids' is a bitmap. So use 'bitmap_zalloc()' to simplify
code and improve the semantic, instead of hand writing it.
Also change the corresponding 'kfree()' into 'bitmap_free()' to keep
consistency.
Signed-off-by: Christophe JAILLET
---
drivers/iommu/intel/iommu.c | 9 -
1
Hi Thomas,
On Fri, Dec 10, 2021 at 11:19:26PM +0100, Thomas Gleixner wrote:
> From: Thomas Gleixner
>
> Replace open coded MSI descriptor chasing and use the proper accessor
> functions instead.
>
> Signed-off-by: Thomas Gleixner
> Reviewed-by: Greg Kroah-Hartman
> Reviewed-by: Jason
On 2021/12/18 5:58, Christophe JAILLET wrote:
'ommu->domain_ids' is a bitmap. So use 'bitmap_zalloc()' to simplify
code and improve the semantic, instead of hand writing it.
Also change the corresponding 'kfree()' into 'bitmap_free()' to keep
consistency.
Signed-off-by: Christophe JAILLET
---
The suported page sizes of an iommu_domain are saved in the pgsize_bitmap
field. Retrieve the value from the right place.
Fixes: 58fd9375c2c534 ("drm/nouveau/platform: probe IOMMU if present")
Signed-off-by: Lu Baolu
---
drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c | 2 +-
1 file changed,
Le 18/12/2021 à 06:56, Lu Baolu a écrit :
On 2021/12/18 5:58, Christophe JAILLET wrote:
'ommu->domain_ids' is a bitmap. So use 'bitmap_zalloc()' to simplify
code and improve the semantic, instead of hand writing it.
Also change the corresponding 'kfree()' into 'bitmap_free()' to keep
44 matches
Mail list logo
