GART looses it's state only in case of a deepest suspend level. Let's not
waste memory if machine doesn't support that suspend level.
Signed-off-by: Dmitry Osipenko
---
drivers/iommu/tegra-gart.c | 36 +---
1 file changed, 25 insertions(+), 11 del
Validation of page frame number doesn't require protection with a spinlock,
let's move it out of spinlock for consistency.
Signed-off-by: Dmitry Osipenko
---
drivers/iommu/tegra-gart.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/tegra-gart.c
I've added an experimental support of the GART to the Tegra DRM driver
and it ended up with a very positive result. During the testing of the
GART driver I've noticed couple of its minor shortcomings, so here the
patches to remedy them.
Dmitry Osipenko (4):
iommu/tegra: g
The iommu_unmap() treats zero bytes number returned by an IOMMU driver as
an indicator that unmapping should be stopped. As a result, GART driver
unmaps only the first page entry of the whole range, which is incorrect.
Signed-off-by: Dmitry Osipenko
---
drivers/iommu/tegra-gart.c | 2 +-
1 file
Due to a bug, multiple devices may try to map the same IOVA region. We can
catch that case by checking that 'VALID' bit of the GART's page entry is
unset prior to mapping of the page.
Signed-off-by: Dmitry Osipenko
---
drivers/iommu/tegra-gart.c | 7 +++
1 file change
#x27;s correct them
for consistency.
Signed-off-by: Dmitry Osipenko
---
include/linux/iommu.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index 2cb54adc4a33..f1ce8e517d8d 100644
--- a/include/linux/iommu.h
+++ b/inclu
ain existing behaviour with respect to the API.
>
> Signed-off-by: Robin Murphy
> ---
> drivers/iommu/tegra-gart.c | 19 +++
> 1 file changed, 19 insertions(+)
>
Tested-by: Dmitry Osipenko
--
Dmitry
___
iommu
On 01.10.2018 1:48, Dmitry Osipenko wrote:
> Hello,
>
> This patch-series integrates the GART (IOMMU) driver with the Memory
> Controller driver, that allows to report the name of a faulty memory
> client on GART page fault. A major code clean up and performance
> optimizati
Introduce iotlb_sync_map() callback that is invoked in the end of
iommu_map(). This new callback allows IOMMU drivers to avoid syncing
after mapping of each contiguous chunk and sync only when the whole
mapping is completed, optimizing performance of the mapping operation.
Signed-off-by: Dmitry
e for devices would be a better solution, allowing to implement
transparent context switching of virtual IOMMU domains.
Some very minor code cleanups, reworded commit messages.
Dmitry Osipenko (21):
iommu/tegra: gart: Remove pr_fmt and clean up includes
iommu/tegra: gart: Clean up
Remove unneeded headers inclusion and sort the headers in alphabet order.
Remove pr_fmt macro since there is no pr_*() in the code and it doesn't
affect dev_*() functions.
Signed-off-by: Dmitry Osipenko
Acked-by: Thierry Reding
---
drivers/iommu/tegra-gart.c | 17 +
1
GART can't handle all devices, hence ignore devices that aren't related
to GART. IOMMU phandle must be explicitly assign to devices in the device
tree.
Signed-off-by: Dmitry Osipenko
Acked-by: Thierry Reding
---
drivers/iommu/tegra-gart.c | 14 +-
1 file changed, 13
Properly clean up allocated resources on the drivers probe failure and
remove unneeded checks.
Signed-off-by: Dmitry Osipenko
Acked-by: Thierry Reding
---
drivers/iommu/tegra-gart.c | 16 ++--
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/drivers/iommu/tegra-gart.c
Device tree binding of Memory Controller has been changed: GART has been
squashed into the MC, there are a new mandatory clock and #iommu-cells
properties, the compatible has been changed to 'tegra20-mc-gart'.
Signed-off-by: Dmitry Osipenko
---
arch/arm/boot/dts/tegra20
Currently GART writes one page entry at a time. More optimal would be to
aggregate the writes and flush BUS buffer in the end, this gives map/unmap
10-40% performance boost (depending on size of mapping) in comparison to
flushing after each page entry update.
Signed-off-by: Dmitry Osipenko
Acked
This fixes irrelevant "tegra-mc 7000f000.memory-controller: no memory
timings for RAM code 0 registered" warning message during of kernels
boot-up on Tegra20.
Fixes: a8d502fd3348 ("memory: tegra: Squash tegra20-mc into common tegra-mc
driver")
Signed-off-by: Dmitry Osipenko
The tegra20-mc device-tree binding has been changed, GART has been
squashed into Memory Controller and now the clock property is mandatory
for Tegra20, the DT compatible has been changed as well. Adapt driver to
the DT changes.
Signed-off-by: Dmitry Osipenko
---
drivers/memory/tegra/mc.c | 21
w clock
property also puts the tegra20-mc binding in line with the bindings of the
later Tegra generations.
Signed-off-by: Dmitry Osipenko
Reviewed-by: Rob Herring
---
.../bindings/iommu/nvidia,tegra20-gart.txt| 14 --
.../memory-controllers/nvidia,tegra20-mc.txt | 27 ++
With the device tree binding changes, now Memory Controller has access to
GART registers. Hence it is now possible to read client ID on GART page
fault to get information about what memory client causes the fault.
Signed-off-by: Dmitry Osipenko
---
drivers/memory/tegra/mc.c | 12 ++--
1
There is no need to match device with the DT node since it was already
matched, use of_device_get_match_data() helper to get the match-data.
Signed-off-by: Dmitry Osipenko
---
drivers/memory/tegra/mc.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/memory
The device-tree binding has been changed. There is no separate GART device
anymore, it is squashed into the Memory Controller. Integrate GART module
with the MC in a way it is done for the SMMU of Tegra30+.
Signed-off-by: Dmitry Osipenko
---
drivers/iommu/Kconfig | 1 +
drivers/iommu
GART has a single address space that is shared by all devices, hence only
one domain could be active at a time.
Signed-off-by: Dmitry Osipenko
Acked-by: Thierry Reding
---
drivers/iommu/tegra-gart.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/iommu/tegra-gart.c b
There is no need for inserting of memory barriers to access registers of
Memory Controller. Hence use the relaxed versions of the accessors.
Signed-off-by: Dmitry Osipenko
---
drivers/memory/tegra/mc.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/memory/tegra
Fix spinlock recursion bug that happens on IOMMU domain destruction if
any of the allocated domains have devices attached to them.
Signed-off-by: Dmitry Osipenko
Acked-by: Thierry Reding
---
drivers/iommu/tegra-gart.c | 24
1 file changed, 16 insertions(+), 8 deletions
Fix NULL pointer dereference on IOMMU domain destruction that happens
because clients list is being iterated unsafely and its elements are
getting deleted during the iteration.
Signed-off-by: Dmitry Osipenko
Acked-by: Thierry Reding
---
drivers/iommu/tegra-gart.c | 4 ++--
1 file changed, 2
There could be unlimited number of allocated domains, but only one domain
can be active at a time. Hence devices must be detached only from the
active domain.
Signed-off-by: Dmitry Osipenko
Acked-by: Thierry Reding
---
drivers/iommu/tegra-gart.c | 8 +---
1 file changed, 5 insertions(+), 3
GART is a part of the Memory Controller driver that is always built-in,
hence there is no benefit from the use of managed resources.
Signed-off-by: Dmitry Osipenko
Acked-by: Thierry Reding
---
drivers/iommu/tegra-gart.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff
f the IOMMU-core.
Signed-off-by: Dmitry Osipenko
---
drivers/iommu/tegra-gart.c | 244 +++--
1 file changed, 96 insertions(+), 148 deletions(-)
diff --git a/drivers/iommu/tegra-gart.c b/drivers/iommu/tegra-gart.c
index 71de54aa845c..c732c6a2a165 100644
--- a/dr
GART is a simple IOMMU provider that has single address space. There is
no need to setup global clients list and manage it for tracking of the
active domain, hence lot's of code could be safely removed and replaced
with a simpler alternative.
Signed-off-by: Dmitry Osipenko
Acked-by: Th
iate them
from the MC.
Signed-off-by: Dmitry Osipenko
---
drivers/iommu/tegra-gart.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/iommu/tegra-gart.c b/drivers/iommu/tegra-gart.c
index 99afdbf8860c..9d2df43ce50b 100644
--- a/drivers/iommu/tegra-gart.c
+++ b/drivers/iommu/tegra-g
On 11.12.2018 12:53, Joerg Roedel wrote:
> On Sun, Dec 09, 2018 at 11:29:29PM +0300, Dmitry Osipenko wrote:
>> Dmitry Osipenko (21):
>> iommu/tegra: gart: Remove pr_fmt and clean up includes
>> iommu/tegra: gart: Clean up driver probe errors handling
>> iommu/
On 12.12.2018 13:43, Joerg Roedel wrote:
> Hi Thierry, Hi Dmitry,
>
> On Wed, Dec 12, 2018 at 11:24:15AM +0100, Thierry Reding wrote:
>> So appart from the one issue in the "memory controller integration"
>> patch this looks good and I've acked the remaining patches. Once the one
>> remaining issu
On 12.12.2018 13:14, Thierry Reding wrote:
> On Sun, Dec 09, 2018 at 11:29:42PM +0300, Dmitry Osipenko wrote:
>> The device-tree binding has been changed. There is no separate GART device
>> anymore, it is squashed into the Memory Controller. Integrate GART module
>> with
Remove unneeded headers inclusion and sort the headers in alphabet order.
Remove pr_fmt macro since there is no pr_*() in the code and it doesn't
affect dev_*() functions.
Signed-off-by: Dmitry Osipenko
Acked-by: Thierry Reding
---
drivers/iommu/tegra-gart.c | 17 +
1
; patch from
the series for now because after some more considering it became not
exactly apparent whether that is what we need, that was also suggested
by Robin Murphy in the review comment. Maybe something like a runtime
IOMMU usage for devices would be a better solution, allowing t
Currently GART writes one page entry at a time. More optimal would be to
aggregate the writes and flush BUS buffer in the end, this gives map/unmap
10-40% performance boost (depending on size of mapping) in comparison to
flushing after each page entry update.
Signed-off-by: Dmitry Osipenko
Acked
GART can't handle all devices, hence ignore devices that aren't related
to GART. IOMMU phandle must be explicitly assign to devices in the device
tree.
Signed-off-by: Dmitry Osipenko
Acked-by: Thierry Reding
---
drivers/iommu/tegra-gart.c | 14 +-
1 file changed, 13
Properly clean up allocated resources on the drivers probe failure and
remove unneeded checks.
Signed-off-by: Dmitry Osipenko
Acked-by: Thierry Reding
---
drivers/iommu/tegra-gart.c | 16 ++--
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/drivers/iommu/tegra-gart.c
Introduce iotlb_sync_map() callback that is invoked in the end of
iommu_map(). This new callback allows IOMMU drivers to avoid syncing
after mapping of each contiguous chunk and sync only when the whole
mapping is completed, optimizing performance of the mapping operation.
Signed-off-by: Dmitry
w clock
property also puts the tegra20-mc binding in line with the bindings of the
later Tegra generations.
Signed-off-by: Dmitry Osipenko
Reviewed-by: Rob Herring
Acked-by: Thierry Reding
---
.../bindings/iommu/nvidia,tegra20-gart.txt| 14 --
.../memory-controlle
Device tree binding of Memory Controller has been changed: GART has been
squashed into the MC, there are a new mandatory clock and #iommu-cells
properties, the compatible has been changed to 'tegra20-mc-gart'.
Signed-off-by: Dmitry Osipenko
Acked-by: Thierry Reding
---
arch/ar
The tegra20-mc device-tree binding has been changed, GART has been
squashed into Memory Controller and now the clock property is mandatory
for Tegra20, the DT compatible has been changed as well. Adapt driver to
the DT changes.
Signed-off-by: Dmitry Osipenko
Acked-by: Thierry Reding
This fixes irrelevant "tegra-mc 7000f000.memory-controller: no memory
timings for RAM code 0 registered" warning message during of kernels
boot-up on Tegra20.
Fixes: a8d502fd3348 ("memory: tegra: Squash tegra20-mc into common tegra-mc
driver")
Signed-off-by: Dmitry Osipenko
With the device tree binding changes, now Memory Controller has access to
GART registers. Hence it is now possible to read client ID on GART page
fault to get information about what memory client causes the fault.
Signed-off-by: Dmitry Osipenko
Acked-by: Thierry Reding
---
drivers/memory/tegra
There is no need to match device with the DT node since it was already
matched, use of_device_get_match_data() helper to get the match-data.
Signed-off-by: Dmitry Osipenko
Acked-by: Thierry Reding
---
drivers/memory/tegra/mc.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff
There is no need for inserting of memory barriers to access registers of
Memory Controller. Hence use the relaxed versions of the accessors.
Signed-off-by: Dmitry Osipenko
Acked-by: Thierry Reding
---
drivers/memory/tegra/mc.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
The device-tree binding has been changed. There is no separate GART device
anymore, it is squashed into the Memory Controller. Integrate GART module
with the MC in a way it is done for the SMMU on Tegra30+.
Signed-off-by: Dmitry Osipenko
---
drivers/iommu/Kconfig | 1 +
drivers/iommu
Tegra20 doesn't have SMMU. Move out checking of the SMMU presence from
the SMMU driver into the Memory Controller driver. This change makes code
consistent in regards to how GART/SMMU presence checking is performed.
Signed-off-by: Dmitry Osipenko
---
drivers/iommu/tegra-smmu.c | 4
dr
Fix spinlock recursion bug that happens on IOMMU domain destruction if
any of the allocated domains have devices attached to them.
Signed-off-by: Dmitry Osipenko
Acked-by: Thierry Reding
---
drivers/iommu/tegra-gart.c | 24
1 file changed, 16 insertions(+), 8 deletions
Memory Controller driver never shared IRQ with any other driver and very
unlikely that it will. Hence there is no need to request IRQ sharing and
the corresponding flag can be dropped safely.
Signed-off-by: Dmitry Osipenko
---
drivers/memory/tegra/mc.c | 2 +-
1 file changed, 1 insertion(+), 1
Fix NULL pointer dereference on IOMMU domain destruction that happens
because clients list is being iterated unsafely and its elements are
getting deleted during the iteration.
Signed-off-by: Dmitry Osipenko
Acked-by: Thierry Reding
---
drivers/iommu/tegra-gart.c | 4 ++--
1 file changed, 2
Make all messages to start with a lower case and don't unnecessarily go
over 80 chars in the code.
Signed-off-by: Dmitry Osipenko
---
drivers/memory/tegra/mc.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/
GART has a single address space that is shared by all devices, hence only
one domain could be active at a time.
Signed-off-by: Dmitry Osipenko
Acked-by: Thierry Reding
---
drivers/iommu/tegra-gart.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/iommu/tegra-gart.c b
GART is a part of the Memory Controller driver that is always built-in,
hence there is no benefit from the use of managed resources.
Signed-off-by: Dmitry Osipenko
Acked-by: Thierry Reding
---
drivers/iommu/tegra-gart.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff
f the IOMMU-core. Now the GART translation is kept
disabled while GART is suspended.
Signed-off-by: Dmitry Osipenko
Acked-by: Thierry Reding
---
drivers/iommu/tegra-gart.c | 253 +++--
1 file changed, 105 insertions(+), 148 deletions(-)
diff --git a/drivers/iommu/
iate them
from the MC.
Signed-off-by: Dmitry Osipenko
Acked-by: Thierry Reding
---
drivers/iommu/tegra-gart.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/iommu/tegra-gart.c b/drivers/iommu/tegra-gart.c
index 2e0e6aff8f70..a3ce6918577d 100644
--- a/drivers/iommu/tegra-gart.c
++
GART is a simple IOMMU provider that has single address space. There is
no need to setup global clients list and manage it for tracking of the
active domain, hence lot's of code could be safely removed and replaced
with a simpler alternative.
Signed-off-by: Dmitry Osipenko
Acked-by: Th
There could be unlimited number of allocated domains, but only one domain
can be active at a time. Hence devices must be detached only from the
active domain.
Signed-off-by: Dmitry Osipenko
Acked-by: Thierry Reding
---
drivers/iommu/tegra-gart.c | 8 +---
1 file changed, 5 insertions(+), 3
On 17.12.2018 12:14, Joerg Roedel wrote:
> On Wed, Dec 12, 2018 at 11:38:43PM +0300, Dmitry Osipenko wrote:
>> Dmitry Osipenko (24):
>> iommu/tegra: gart: Remove pr_fmt and clean up includes
>> iommu/tegra: gart: Clean up driver probe errors handling
>> iommu/
17.12.2018 12:14, Joerg Roedel пишет:
> On Wed, Dec 12, 2018 at 11:38:43PM +0300, Dmitry Osipenko wrote:
>> Dmitry Osipenko (24):
>> iommu/tegra: gart: Remove pr_fmt and clean up includes
>> iommu/tegra: gart: Clean up driver probe errors handling
>> iommu/tegra: g
16.01.2019 15:55, Joerg Roedel пишет:
> On Tue, Jan 15, 2019 at 07:33:54PM +0300, Dmitry Osipenko wrote:
>> Should I expect that the patches will appear in the IOMMU git and in
>> -next consequently? Please let me know if there is any problem with
>> the applying of the
16.01.2019 23:50, Navneet Kumar пишет:
> * Allocate dma iova cookie for a domain while adding dma iommu
> devices.
> * Perform a stricter check for domain type parameter.
>
Commit message should tell what exactly is getting "fixed". Apparently you're
trying to support T132 ARM64 here.
> Signed-
16.01.2019 23:50, Navneet Kumar пишет:
> Use PTB_ASID instead of SMMU_CONFIG to flush smmu.
> PTB_ASID can be accessed from non-secure mode, SMMU_CONFIG cannot be.
> Using SMMU_CONFIG could pose a problem when kernel doesn't have secure
> mode access enabled from boot.
>
> Signed-off-by: Navneet K
24.01.2019 21:29, navneet kumar пишет:
> On 1/17/19 7:25 AM, Dmitry Osipenko wrote:
>> 16.01.2019 23:50, Navneet Kumar пишет:
>>> Use PTB_ASID instead of SMMU_CONFIG to flush smmu.
>>> PTB_ASID can be accessed from non-secure mode, SMMU_CONFIG cannot be.
>>> Us
y it got lost after a rebase. The
kerneldoc comment is correct, thank you! BTW, for some reason gmail marked this
series as a spam, maybe you need to check the email headers and whatnot.
Reviewed-by: Dmitry Osipenko
___
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
Hello,
This small series primarily fixes a bug that affects Terga30 and
Terga114 platforms, it also carries two patches that improve SMMU
functionality and clean up code a tad.
Dmitry Osipenko (3):
iommu/tegra-smmu: Fix invalid ASID bits on Tegra30/114
iommu/tegra-smmu: Properly release
Set PTE read/write attributes accordingly to the the protections requested
by IOMMU API.
Signed-off-by: Dmitry Osipenko
---
drivers/iommu/tegra-smmu.c | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c
index
on Tegra30.
Cc: stable
Signed-off-by: Dmitry Osipenko
---
drivers/iommu/tegra-smmu.c | 25 ++---
1 file changed, 18 insertions(+), 7 deletions(-)
diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c
index 5182c7d6171e..8d30653cd13a 100644
--- a/drivers/iommu/teg
Release all memory allocations associated with a released domain and emit
warning if domain is in-use at the time of destruction.
Signed-off-by: Dmitry Osipenko
---
drivers/iommu/tegra-smmu.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra
;
> - size = iommu_map_sg(vde->domain, addr, sgt->sgl, sgt->nents,
> - IOMMU_READ | IOMMU_WRITE);
> + size = iommu_map_sgtable(vde->domain, addr, sgt,
> + IOMMU_READ | IOMMU_WRITE);
> if (!size) {
>
ppens while running multiple graphics tests in parallel on
Tegra30, i.e. by having multiple threads racing with each other in the
Host1x's submission and completion code paths, performing IOVA mappings
and unmappings in parallel.
Cc:
Signed-off-by: Dmitry Osipenko
---
drivers/iommu/tegra-s
25.05.2020 11:35, Thierry Reding пишет:
> On Sun, May 24, 2020 at 09:37:55PM +0300, Dmitry Osipenko wrote:
>> The mapping operations of the Tegra SMMU driver are subjected to a race
>> condition issues because SMMU Address Space isn't allocated and freed
>> atomically
25.05.2020 15:20, Thierry Reding пишет:
...
> Do we have a good way to find out how bad exactly the contention would
> be when using a mutex?
I'm now having a second thought about it. We don't need to care about
that scenario at all because it's a software-design defect of the
upstream Host1x driv
ppens while running multiple graphics tests in parallel on
Tegra30, i.e. by having multiple threads racing with each other in the
Host1x's submission and completion code paths, performing IOVA mappings
and unmappings in parallel.
Cc:
Signed-off-by: Dmitry Osipenko
---
Changelog:
v2: -
25.05.2020 22:54, Dmitry Osipenko пишет:
> The mapping operations of the Tegra SMMU driver are subjected to a race
> condition issues because SMMU Address Space isn't allocated and freed
> atomically, while it should be. This patch makes the mapping operations
> atomic, it fixe
Hello Yue,
26.08.2019 16:31, YueHaibing пишет:
> If COMPILE_TEST is y and IOMMU_SUPPORT is n, selecting TEGRA_VDE
> to m will set IOMMU_IOVA to m, this fails the building of
> TEGRA_HOST1X and DRM_TEGRA which is y like this:
>
> drivers/gpu/host1x/cdma.o: In function `host1x_cdma_init':
> cdma.c:
26.08.2019 18:18, Dmitry Osipenko пишет:
> Hello Yue,
>
> 26.08.2019 16:31, YueHaibing пишет:
>> If COMPILE_TEST is y and IOMMU_SUPPORT is n, selecting TEGRA_VDE
>> to m will set IOMMU_IOVA to m, this fails the building of
>> TEGRA_HOST1X and DRM_TEGRA which is y l
29.08.2019 15:40, Thierry Reding пишет:
> On Thu, Aug 29, 2019 at 01:39:32PM +0200, Hans Verkuil wrote:
>> On 8/26/19 3:31 PM, YueHaibing wrote:
>>> If COMPILE_TEST is y and IOMMU_SUPPORT is n, selecting TEGRA_VDE
>>> to m will set IOMMU_IOVA to m, this fails the building of
>>> TEGRA_HOST1X and DR
29.08.2019 18:49, Thierry Reding пишет:
> On Thu, Aug 29, 2019 at 04:58:22PM +0300, Dmitry Osipenko wrote:
>> 29.08.2019 15:40, Thierry Reding пишет:
>>> On Thu, Aug 29, 2019 at 01:39:32PM +0200, Hans Verkuil wrote:
>>>> On 8/26/19 3:31 PM, YueHaibing wrote:
20.09.2019 22:32, Arnd Bergmann пишет:
> On Thu, Jul 25, 2019 at 2:24 PM Dmitry Osipenko wrote:
>>
>> 25.07.2019 5:41, YueHaibing пишет:
>>> If IOMMU_SUPPORT is not set, and COMPILE_TEST is y,
>>> IOMMU_IOVA may be set to m. So building will fails:
>>>
&
15.10.2019 19:29, Thierry Reding пишет:
> From: Thierry Reding
>
> This new framework is currently nothing more than a registry of memory
> controllers, with the goal being to order device probing. One use-case
> where this is useful, for example, is a memory controller device which
> needs to pr
01.11.2019 13:18, Thierry Reding пишет:
> On Thu, Oct 31, 2019 at 06:11:33PM +0300, Dmitry Osipenko wrote:
>> 15.10.2019 19:29, Thierry Reding пишет:
>>> From: Thierry Reding
>>>
>>> This new framework is currently nothing more than a registry of memory
>
On 25.07.2017 17:43, Joerg Roedel wrote:
> On Wed, Jul 05, 2017 at 07:29:44PM +0300, Dmitry Osipenko wrote:
>> I've added an experimental support of the GART to the Tegra DRM driver
>> and it ended up with a very positive result. During the testing of the
>> GART driver
On 29.07.2017 14:04, Dmitry Osipenko wrote:
> On 25.07.2017 17:43, Joerg Roedel wrote:
>> On Wed, Jul 05, 2017 at 07:29:44PM +0300, Dmitry Osipenko wrote:
>>> I've added an experimental support of the GART to the Tegra DRM driver
>>> and it ended up with a very pos
del
> ---
> drivers/iommu/tegra-gart.c | 26 ++
> 1 file changed, 26 insertions(+)
>
Reviewed-by: Dmitry Osipenko
Tested-by: Dmitry Osipenko
> diff --git a/drivers/iommu/tegra-gart.c b/drivers/iommu/tegra-gart.c
> index 29bafc6..b62f790 100644
> --- a/
On 17.08.2017 16:52, Thierry Reding wrote:
> On Thu, Aug 17, 2017 at 01:21:52AM +0300, Dmitry Osipenko wrote:
>> Hello Joerg,
>>
>> On 10.08.2017 01:29, Joerg Roedel wrote:
>>> From: Joerg Roedel
>>>
>>> Add a struct iommu_device to each tegra-ga
On 26.09.2017 14:06, Thierry Reding wrote:
> On Wed, Jul 05, 2017 at 07:29:46PM +0300, Dmitry Osipenko wrote:
>> Due to a bug, multiple devices may try to map the same IOVA region. We can
>> catch that case by checking that 'VALID' bit of the GART's page entry is
&g
On 26.09.2017 14:19, Thierry Reding wrote:
> On Wed, Jul 05, 2017 at 07:29:45PM +0300, Dmitry Osipenko wrote:
>> GART looses it's state only in case of a deepest suspend level. Let's not
>> waste memory if machine doesn't support that suspend level.
>&g
On 26.09.2017 19:07, Thierry Reding wrote:
> On Tue, Sep 26, 2017 at 04:49:52PM +0300, Dmitry Osipenko wrote:
>> On 26.09.2017 14:06, Thierry Reding wrote:
>>> On Wed, Jul 05, 2017 at 07:29:46PM +0300, Dmitry Osipenko wrote:
>>>> Due to a bug, multiple devices may t
Validation of page frame number doesn't require protection with a spinlock,
let's move it out of spinlock for consistency.
Signed-off-by: Dmitry Osipenko
Acked-by: Thierry Reding
---
drivers/iommu/tegra-gart.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
icitly by a new CONFIG_TEGRA_IOMMU_GART_DEBUG
option.
Signed-off-by: Dmitry Osipenko
---
drivers/iommu/Kconfig | 9 +
drivers/iommu/tegra-gart.c | 16 +++-
2 files changed, 24 insertions(+), 1 deletion(-)
diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
index f3a21343e636..851156a489
t is not entirely correct.
- Replaced "Correct number of unmapped bytes" and "Check whether page
is already mapped" patches with a new GART debug Kconfig option
patch.
Dmitry Osipenko (2):
iommu/tegra: gart: Optionally check for overwriting of page mappings
icitly by a new CONFIG_TEGRA_IOMMU_GART_DEBUG
option.
Signed-off-by: Dmitry Osipenko
---
drivers/iommu/Kconfig | 9 +
drivers/iommu/tegra-gart.c | 16 +++-
2 files changed, 24 insertions(+), 1 deletion(-)
diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
index f3a21343e636..851156a489
On 04.10.2017 04:02, Dmitry Osipenko wrote:
> Due to a bug in IOVA allocator, page mapping could accidentally overwritten.
> We can catch this case by checking 'VALID' bit of GART's page entry prior to
> mapping of a page. Since that check introduces a noticeable performanc
On 10.10.2017 12:53, Joerg Roedel wrote:
> On Wed, Oct 04, 2017 at 04:02:31AM +0300, Dmitry Osipenko wrote:
>> Due to a bug in IOVA allocator, page mapping could accidentally overwritten.
>> We can catch this case by checking 'VALID' bit of GART's page entry prior
On 13.10.2017 11:38, Joerg Roedel wrote:
> On Thu, Oct 12, 2017 at 05:27:26PM +0300, Dmitry Osipenko wrote:
>> I'm not talking about any specific bug, but in general if allocator re-maps
>> already mapped region or unmaps the wrong-and-used region. I had those
>&
debug' parameter.
Signed-off-by: Dmitry Osipenko
---
drivers/iommu/tegra-gart.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/iommu/tegra-gart.c b/drivers/iommu/tegra-gart.c
index b62f790ad1ba..4c0abdcd1ad2 100644
--- a/drivers/iommu/tegra-gart.c
+++ b/drivers/iom
GART has a fixed aperture size, hence the number of pages is constant.
Signed-off-by: Dmitry Osipenko
---
drivers/iommu/tegra-gart.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/iommu/tegra-gart.c b/drivers/iommu/tegra-gart.c
index 89ec24c6952c
GART driver wasn't ever been utilized in upstream, but finally this should
change sometime soon with Tegra's DRM driver rework. In general GART driver
works fine, though there are couple things that could be improved.
Dmitry Osipenko (4):
iommu/tegra: gart: Add debugging facility
i
It must return the number of unmapped bytes on success, returning 0 means
that unmapping failed and in result only one page is unmapped.
Signed-off-by: Dmitry Osipenko
---
drivers/iommu/tegra-gart.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iommu/tegra-gart.c b
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