Re: [PATCH v2 1/3] iommu/io-pgtable: Add ARMv7 short descriptor support

2016-01-14 Thread Yong Wu
On Thu, 2015-12-17 at 20:50 +, Robin Murphy wrote: > Add a nearly-complete ARMv7 short descriptor implementation, omitting > only a few legacy and CPU-centric aspects which shouldn't be necessary > for IOMMU API use anyway. [...] > + > +#define ARM_V7S_BLOCK_SIZE(lvl) (1UL <<

Re: [PATCH v2 1/3] iommu/io-pgtable: Add ARMv7 short descriptor support

2016-01-17 Thread Yong Wu
On Fri, 2016-01-15 at 15:13 +, Robin Murphy wrote: > On 14/01/16 13:05, Yong Wu wrote: > > On Thu, 2015-12-17 at 20:50 +, Robin Murphy wrote: > >> Add a nearly-complete ARMv7 short descriptor implementation, omitting > >> only a few legacy and CPU-cent

Re: [PATCH v2 1/3] iommu/io-pgtable: Add ARMv7 short descriptor support

2016-01-17 Thread Yong Wu
On Fri, 2016-01-15 at 15:13 +, Robin Murphy wrote: > On 14/01/16 13:05, Yong Wu wrote: > > On Thu, 2015-12-17 at 20:50 +, Robin Murphy wrote: > >> Add a nearly-complete ARMv7 short descriptor implementation, omitting > >> only a few legacy and CPU-cent

Re: [PATCH 3/3] iommu/dma: Avoid unlikely high-order allocations

2016-01-18 Thread Yong Wu
On Fri, 2015-12-18 at 14:35 -0800, Doug Anderson wrote: > Robin, > > On Fri, Dec 18, 2015 at 9:01 AM, Robin Murphy wrote: > > Doug reports that the equivalent page allocator on 32-bit ARM exhibits > > particularly pathalogical behaviour under memory pressure when > >

Re: [PATCH v7 3/5] memory: mediatek: Add SMI driver

2016-01-19 Thread Yong Wu
On Mon, 2016-01-18 at 11:11 +0100, Matthias Brugger wrote: > > On 18/12/15 09:09, Yong Wu wrote: > > This patch add SMI(Smart Multimedia Interface) driver. This driver > > is responsible to enable/disable iommu and control the power domain > > and clocks of each local arb

Re: [PATCH] iommu: Drop the of_iommu_{set/get}_ops() interface

2017-01-05 Thread Yong Wu
On Wed, 2017-01-04 at 15:11 +, Robin Murphy wrote: > [+Yong Wu for mtk_iommu] > > On 03/01/17 17:34, Lorenzo Pieralisi wrote: > > With the introduction of the new iommu_{register/get}_instance() > > interface in commit e4f10ffe4c9b ("iommu: Make of_iommu_set/get_ops(

[PATCH 0/8] MT2712 IOMMU SUPPORT

2017-08-11 Thread Yong Wu
dds the support of MT2712 IOMMU support, the patch 3/4 improve the m4u flow for mt2712, the last patch 5/6/7/8 mainly fix bug or improve code. [1]:https://patchwork.kernel.org/patch/9828671/ [2]:https://patchwork.kernel.org/patch/9880223/ [3]:https://patchwork.kernel.org/patch/9892759/ Yong Wu (8):

[PATCH 7/8] memory: mtk-smi: Rearrange some function position alphabetically

2017-08-11 Thread Yong Wu
adl to readl_relaxed in gen1_config_port. 3) change the type "larbid" from "int" to "unsigned int" to meet the requirement of of_property_read_u32. Signed-off-by: Yong Wu <yong...@mediatek.com> --- drivers/memory/mtk-smi.c | 105 +++-

[PATCH 2/8] iommu/mediatek: Add mt2712 IOMMU support

2017-08-11 Thread Yong Wu
if there are 2 M4U HWs, there should be 2 iommu domains, each M4U has a iommu domain. Signed-off-by: Yong Wu <yong...@mediatek.com> --- This patch also include a minor issue: suspend while there is no iommu client. it will hang because there is no iommu domain at that time. --- drivers

[PATCH 1/8] dt-bindings: mediatek: Add binding for mt2712 IOMMU and SMI

2017-08-11 Thread Yong Wu
mdp3->larb names All the connections are HW fixed, SW can NOT adjust it. Signed-off-by: Yong Wu <yong...@mediatek.com> --- .../devicetree/bindings/iommu/mediatek,iommu.txt | 6 +- .../memory-controllers/mediatek,smi-common.txt | 6 +- .../memory-controllers/mediatek,smi-larb.txt

[PATCH 3/8] iommu/mediatek: Merge 2 M4U HWs into one iommu domain

2017-08-11 Thread Yong Wu
, They can share the iova address easily. Signed-off-by: Yong Wu <yong...@mediatek.com> --- drivers/iommu/mtk_iommu.c | 98 ++- drivers/iommu/mtk_iommu.h | 2 + 2 files changed, 73 insertions(+), 27 deletions(-) diff --git a/drivers/iommu/mtk_iom

[PATCH 4/8] iommu/mediatek: Move pgtable allocation into domain_alloc

2017-08-11 Thread Yong Wu
After adding the global list for M4U HW, We get a chance to move the pagetable allocation into the mtk_iommu_domain_alloc. Let the domain_alloc do the right thing. This patch is for fixing this problem[1]. [1]: https://patchwork.codeaurora.org/patch/53987/ Signed-off-by: Yong Wu <y

[PATCH 5/8] iommu/mediatek: Disable iommu clock when system suspend

2017-08-11 Thread Yong Wu
When system suspend, infra power domain may be off, and the iommu's clock must be disabled when system off, or the iommu's bclk clock maybe disabled after system resume. Signed-off-by: Honghui Zhang <honghui.zh...@mediatek.com> Signed-off-by: Yong Wu <yong...@mediatek.com> --- d

[PATCH 8/8] memory: mtk-smi: Degrade SMI init to module_init

2017-08-11 Thread Yong Wu
ttach_driver+0xb4/0x160 [] bus_for_each_drv+0x68/0xa8 [] __device_attach+0xd4/0x168 [] device_initial_probe+0x24/0x30 [] bus_probe_device+0xa0/0xa8 [] deferred_probe_work_func+0x94/0xf0 [] process_one_work+0x1d8/0x6e0 Signed-off-by: Yong Wu <yong...@mediatek.com> --- drivers/memory/mtk-smi.c | 11 +

[PATCH 6/8] iommu/mediatek: Enlarge the validate PA range for 4GB mode

2017-08-11 Thread Yong Wu
x1__ to 0x1__. Thus, the PA from iova_to_pa should also '|' BIT(32) Signed-off-by: Honghui Zhang <honghui.zh...@mediatek.com> Signed-off-by: Yong Wu <yong...@mediatek.com> --- this patch also include bug-fix for mt8173 and mt2712. I also don't split them. --- driver

Re: [PATCH 5/8] iommu/mediatek: Disable iommu clock when system suspend

2017-08-12 Thread Yong Wu
On Fri, 2017-08-11 at 16:39 +0530, Arvind Yadav wrote: > Hi Youn, > > > On Friday 11 August 2017 03:26 PM, Yong Wu wrote: > > When system suspend, infra power domain may be off, and the iommu's > > clock must be disabled when system off, or the iommu's bclk clock maybe &

Re: [PATCH 7/8] memory: mtk-smi: Rearrange some function position alphabetically

2017-08-12 Thread Yong Wu
On Fri, 2017-08-11 at 19:09 +0100, Robin Murphy wrote: > On 11/08/17 10:56, Yong Wu wrote: > > Only adjust some code position in Soc numerical order, from mt2701, > > mt2712 to mt8173. > > > > Besides, 3 minor changes: > > 1) fix a coding style issue: > >

Re: [PATCH 2/8] iommu/mediatek: Add mt2712 IOMMU support

2017-08-12 Thread Yong Wu
On Fri, 2017-08-11 at 18:24 +0100, Robin Murphy wrote: > On 11/08/17 10:56, Yong Wu wrote: > > The M4U IP blocks in mt2712 is MTK's generation2 M4U which use the > > Short-descriptor like mt8173, and most of the HW registers are the > > same. > > > > The diffe

Re: [PATCH 1/2] iommu/mtk: Avoid redundant TLB syncs locally

2017-07-06 Thread Yong Wu
lised under a lock, thus is no longer applicable to all io-pgtable > users. > > Since we're the only user actually relying on this flag for correctness, > let's reimplement it locally to avoid the headache of trying to make the > high-level version concurrency-safe for other users. >

Re: [PATCH v2 0/8] MT2712 IOMMU SUPPORT

2017-09-05 Thread Yong Wu
On Tue, 2017-08-22 at 22:38 +0800, Joerg Roedel wrote: > On Mon, Aug 21, 2017 at 07:00:13PM +0800, Yong Wu wrote: > > Yong Wu (8): > > dt-bindings: mediatek: Add binding for mt2712 IOMMU and SMI > > iommu/mediatek: Move MTK_M4U_TO_LARB/PORT into mtk_iommu.c > >

[PATCH] iommu/io-pgtable-arm-v7s: Need dma-sync while there is no QUIRK_NO_DMA

2017-09-25 Thread Yong Wu
Fix the commit 81b3c2521844 ("iommu/io-pgtable: Introduce explicit coherency"). If there is no IO_PGTABLE_QUIRK_NO_DMA, we should call dma_sync_single_for_device for cache synchronization. Signed-off-by: Yong Wu <yong...@mediatek.com> --- Rebased on v4.14-rc1. --- drivers/iomm

[PATCH] iommu/mediatek: Limit the physical address in 32bit for v7s

2017-09-25 Thread Yong Wu
lloc+0x238/0x3f8 [] __iommu_alloc_attrs+0xa8/0x260 [] mtk_drm_gem_create+0xac/0x180 [] mtk_drm_gem_dumb_create+0x54/0xc8 [] drm_mode_create_dumb_ioctl+0xa4/0xd8 [] drm_ioctl+0x1c0/0x490 In order to satify this, Limit the physical address to 32bit. Signed-off-by: Yong Wu <yong...@mediatek.com> --- Base on v

[PATCH v2 1/8] dt-bindings: mediatek: Add binding for mt2712 IOMMU and SMI

2017-08-21 Thread Yong Wu
larb5larb7 larb8 larb9 disp0 vdec cam venc jpg mdp1/disp1 mdp2/disp2 mdp3 vdo/nr tvd All the connections are HW fixed, SW can NOT adjust it. Signed-off-by: Yong Wu <yong...@mediatek.com> --- Hi Rob, Comparing with the v1, I add larb8 and larb9 in this version. So I don't ad

[PATCH v2 0/8] MT2712 IOMMU SUPPORT

2017-08-21 Thread Yong Wu
of F_MMU_TF_PROTECT_SEL. v1: https://lists.linuxfoundation.org/pipermail/iommu/2017-August/023664.html Yong Wu (8): dt-bindings: mediatek: Add binding for mt2712 IOMMU and SMI iommu/mediatek: Move MTK_M4U_TO_LARB/PORT into mtk_iommu.c iommu/mediatek: Add mt2712 IOMMU support iommu/mediatek: Merge

[PATCH v2 3/8] iommu/mediatek: Add mt2712 IOMMU support

2017-08-21 Thread Yong Wu
if there are 2 M4U HWs, there should be 2 iommu domains, each M4U has a iommu domain. Signed-off-by: Yong Wu <yong...@mediatek.com> --- drivers/iommu/mtk_iommu.c | 71 ++ drivers/iommu/mtk_iommu.h | 7 + drivers/memory/mtk-smi.c

[PATCH v2 2/8] iommu/mediatek: Move MTK_M4U_TO_LARB/PORT into mtk_iommu.c

2017-08-21 Thread Yong Wu
The definition of MTK_M4U_TO_LARB and MTK_M4U_TO_PORT are shared by all the gen2 M4U HWs. Thus, Move them out from mt8173-larb-port.h, and put them into the c file. Suggested-by: Honghui Zhang <honghui.zh...@mediatek.com> Signed-off-by: Yong Wu <yong...@mediatek.com> --- This patc

[PATCH v2 4/8] iommu/mediatek: Merge 2 M4U HWs into one iommu domain

2017-08-21 Thread Yong Wu
, They can share the iova address easily. Signed-off-by: Yong Wu <yong...@mediatek.com> --- drivers/iommu/mtk_iommu.c | 92 ++- drivers/iommu/mtk_iommu.h | 2 ++ 2 files changed, 70 insertions(+), 24 deletions(-) diff --git a/drivers/iommu/mtk_i

[PATCH v2 5/8] iommu/mediatek: Move pgtable allocation into domain_alloc

2017-08-21 Thread Yong Wu
After adding the global list for M4U HW, We get a chance to move the pagetable allocation into the mtk_iommu_domain_alloc. Let the domain_alloc do the right thing. This patch is for fixing this problem[1]. [1]: https://patchwork.codeaurora.org/patch/53987/ Signed-off-by: Yong Wu <y

[PATCH v2 7/8] iommu/mediatek: Enlarge the validate PA range for 4GB mode

2017-08-21 Thread Yong Wu
x1__ to 0x1__. Thus, the PA from iova_to_pa should also '|' BIT(32) Signed-off-by: Honghui Zhang <honghui.zh...@mediatek.com> Signed-off-by: Yong Wu <yong...@mediatek.com> --- drivers/iommu/mtk_iommu.c | 18 +++--- 1 file changed, 15 insertions(+), 3 deletions(-) di

[PATCH v2 6/8] iommu/mediatek: Disable iommu clock when system suspend

2017-08-21 Thread Yong Wu
When system suspend, infra power domain may be off, and the iommu's clock must be disabled when system off, or the iommu's bclk clock maybe disabled after system resume. Signed-off-by: Honghui Zhang <honghui.zh...@mediatek.com> Signed-off-by: Yong Wu <yong...@mediatek.com> --- d

[PATCH v2 8/8] memory: mtk-smi: Degrade SMI init to module_init

2017-08-21 Thread Yong Wu
robe_device+0x284/0x438 [] __device_attach_driver+0xb4/0x160 [] bus_for_each_drv+0x68/0xa8 [] __device_attach+0xd4/0x168 [] device_initial_probe+0x24/0x30 [] bus_probe_device+0xa0/0xa8 [] deferred_probe_work_func+0x94/0xf0 [] process_one_work+0x1d8/0x6e0 Signed-off-by: Yong Wu <yong...@mediatek.com> ---

[PATCH] iommu/mediatek: Fix a build fail of m4u_type

2017-08-23 Thread Yong Wu
e'; did you mean 'm4u_dom'? if (data->enable_4GB && data->m4u_type != M4U_MT8173) { This patch fix it, use "m4u_plat" instead of "m4u_type". Reported-by: kernel test robot <l...@intel.com> Signed-off-by: Yong Wu <yong...@mediatek.com> --- 1) In the v

[PATCH v2 2/2] iommu/mediatek: Fix a build warning of BIT(32) in ARM

2017-08-24 Thread Yong Wu
-by: kernel test robot <l...@intel.com> Signed-off-by: Yong Wu <yong...@mediatek.com> --- drivers/iommu/mtk_iommu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c index bc00e40..bd515be 100644 --- a/drivers/i

[PATCH v2 1/2] iommu/mediatek: Fix a build fail of m4u_type

2017-08-24 Thread Yong Wu
e'; did you mean 'm4u_dom'? if (data->enable_4GB && data->m4u_type != M4U_MT8173) { This patch fix it, use "m4u_plat" instead of "m4u_type". Reported-by: kernel test robot <l...@intel.com> Signed-off-by: Yong Wu <yong...@mediatek.com> --- 1) In the v

Re: FW: [PATCH 2/3] iommu: mtk: constify iommu_ops

2017-08-28 Thread Yong Wu
_ops' and 'bus_set_iommu' working with > const iommu_ops provided by . So mark the non-const > structs as const. > > Signed-off-by: Arvind Yadav <arvind.yadav...@gmail.com> Thanks. Reviewed-by: Yong Wu <yong...@mediatek.com> nit, the title should be: iommu/mediatek:x

[PATCH v2] iommu/mediatek: Move attach_device after iommu-group is ready for M4Uv1

2018-01-23 Thread Yong Wu
CC: Honghui Zhang <honghui.zh...@mediatek.com> Fixes: 05f80300dc8b ("iommu: Finish making iommu_group support mandatory") Reported-by: Ryder Lee <ryder....@mediatek.com> Tested-by: Bibby Hsieh <bibby.hs...@mediatek.com> Signed-off-by: Yong Wu <yong...@medi

Re: [PATCH v3] iommu/mediatek: Move attach_device after iommu-group is ready for M4Uv1

2018-01-26 Thread Yong Wu
On Thu, 2018-01-25 at 12:02 +, Robin Murphy wrote: > On 25/01/18 11:14, Yong Wu wrote: > > In the commit 05f80300dc8b, the iommu framework has supposed all the > > iommu drivers have their owner iommu-group, it get rid of the FIXME > > workarounds while the group

[PATCH v4] iommu/mediatek: Move attach_device after iommu-group is ready for M4Uv1

2018-01-25 Thread Yong Wu
er devices to fix this issue. CC: Robin Murphy <robin.mur...@arm.com> CC: Honghui Zhang <honghui.zh...@mediatek.com> Fixes: 05f80300dc8b ("iommu: Finish making iommu_group support mandatory") Reported-by: Ryder Lee <ryder....@mediatek.com> Signed-off-by: Yong Wu <yong...

[PATCH v3] iommu/mediatek: Move attach_device after iommu-group is ready for M4Uv1

2018-01-25 Thread Yong Wu
mur...@arm.com> CC: Honghui Zhang <honghui.zh...@mediatek.com> Fixes: 05f80300dc8b ('iommu: Finish making iommu_group support mandatory') Reported-by: Ryder Lee <ryder@mediatek.com> Signed-off-by: Yong Wu <yong...@mediatek.com> --- changes notes: v3: don't use the global variable

Re: [PATCH v2] iommu/mediatek: Move attach_device after iommu-group is ready for M4Uv1

2018-01-25 Thread Yong Wu
On Wed, 2018-01-24 at 14:55 +, Robin Murphy wrote: > On 23/01/18 08:39, Yong Wu wrote: > > In the commit 05f80300dc8b ("iommu: Finish making iommu_group support > > mandatory"), the iommu framework has supposed all the iommu drivers have > > their owner iommu

[PATCH] iommu/mediatek: Fix protect memory setting

2018-03-17 Thread Yong Wu
e physical address, and bit[1:0] in the register represents bit[33:32] of the physical address if it has. Fixes: e6dec9230862 ("iommu/mediatek: Add mt2712 IOMMU support") Reported-by: Honghui Zhang <honghui.zh...@mediatek.com> Signed-off-by: Yong Wu <yong...@mediatek.com> --

Re: [PATCH] iommu/mediatek: Fix protect memory setting

2018-03-20 Thread Yong Wu
Hi Joerg, On Tue, 2018-03-20 at 13:57 -0500, Joerg Roedel wrote: > On Sun, Mar 18, 2018 at 09:52:54AM +0800, Yong Wu wrote: > > To avoid adding this complex macro or a new function, I put > > it in the code and backup its value in the suspend registers. > > Missing Signe

Re: [PATCH] iommu/mediatek: Fix protect memory setting

2018-03-21 Thread Yong Wu
On Wed, 2018-03-21 at 06:14 -0500, Joerg Roedel wrote: > On Wed, Mar 21, 2018 at 01:18:24PM +0800, Yong Wu wrote: > > On Tue, 2018-03-20 at 13:57 -0500, Joerg Roedel wrote: > > > On Sun, Mar 18, 2018 at 09:52:54AM +0800, Yong Wu wrote: > > > > To avoid adding this c

Re: [PATCH v4] dt-bindings: mediatek: Add binding for mt2712 IOMMU and SMI

2018-06-21 Thread Yong Wu
Hi Matthias, A gentle ping on this. On Thu, 2018-05-24 at 20:35 +0800, Yong Wu wrote: > This patch adds decriptions for mt2712 IOMMU and SMI. > > In order to balance the bandwidth, mt2712 has two M4Us, two > smi-commons, 10 smi-larbs. and mt2712 is also MTK IOMMU gen2 whic

[PATCH v2] iommu/mediatek: Constify iommu_ops

2018-10-18 Thread Yong Wu
From: Arvind Yadav iommu_ops are not supposed to change at runtime. Functions 'iommu_device_set_ops' and 'bus_set_iommu' working with const iommu_ops provided by . So mark the non-const structs as const. Signed-off-by: Arvind Yadav Signed-off-by: Yong Wu (Change the title to iommu/mediatek

Re: [PATCH v2 04/14] iommu/io-pgtable-arm-v7s: Add paddr_to_iopte and iopte_to_paddr helpers

2018-11-02 Thread Yong Wu
Hi Robin, Thanks very much for your review. On Thu, 2018-11-01 at 16:34 +, Robin Murphy wrote: > [ apologies if anyone gets this twice, looks like our email's eaten > itself again... ] > > On 24/09/2018 09:58, Yong Wu wrote: > > Add two helper functions: paddr_to_iopte

Re: [PATCH v2 05/14] iommu/io-pgtable-arm-v7s: Extend MediaTek 4GB Mode

2018-11-02 Thread Yong Wu
On Thu, 2018-11-01 at 16:35 +, Robin Murphy wrote: > On 24/09/2018 09:58, Yong Wu wrote: > > MediaTek extend the arm v7s descriptor to support the dram over 4GB. > > > > In the mt2712 and mt8173, it's called "4GB mode", the physical address > > is from 0

iommu/io-pgtable-arm-v7s: About pagetable 33bit PA

2018-11-07 Thread Yong Wu
Hi Robin, After the commit ad67f5a6545f ("arm64: replace ZONE_DMA with ZONE_DMA32"), we don't have ZONE_DMA in aarch64, but __arm_v7s_alloc_table[1] use the GFP_DMA to expect the physical address of pagetable should be 32bit. Right now we meet a issue that the lvl1 pagetable PA is 0x1_3ab6_

Re: iommu/io-pgtable-arm-v7s: About pagetable 33bit PA

2018-11-08 Thread Yong Wu
On Thu, 2018-11-08 at 13:49 +, Robin Murphy wrote: > On 08/11/2018 07:31, Yong Wu wrote: > > Hi Robin, > > > > After the commit ad67f5a6545f ("arm64: replace ZONE_DMA with > > ZONE_DMA32"), we don't have ZONE_DMA in aarch64, but > > __arm_v

[PATCH 01/13] dt-bindings: mediatek: Add binding for mt8183 IOMMU and SMI

2018-09-03 Thread Yong Wu
quot;gals" clock for smi-larb. >From the diagram above, CCU(Camera Control Unit) is connected with smi-common directly, we can look it as "larb7" but its register space is different with the normal larb. Signed-off-by: Yong Wu --- .../devicetree/bindings/iommu/mediatek,iommu.

[PATCH 02/13] iommu/mediatek: Use a struct as the platform data

2018-09-03 Thread Yong Wu
Use a struct as the platform special data instead of the enumeration. This is a prepare patch for adding mt8183 iommu support. Signed-off-by: Yong Wu --- drivers/iommu/mtk_iommu.c | 24 drivers/iommu/mtk_iommu.h | 6 +- 2 files changed, 21 insertions(+), 9

[PATCH 04/13] iommu/io-pgtable-arm-v7s: Extend MediaTek 4GB mode

2018-09-03 Thread Yong Wu
Meanwhile the iova still is 32bits. In order to unify code, in the "4GB mode", we add the bit32 for the physical address manually in our driver. Correspondingly, Adding bit32 and bit33 for the PA in the iova_to_phys has to been moved into v7s. Signed-off-by: Yong Wu --- In mt

[PATCH 08/13] memory: mtk-smi: Use a struct for the platform data for smi-common

2018-09-03 Thread Yong Wu
g bus_sel for mt8183. Signed-off-by: Yong Wu --- drivers/memory/mtk-smi.c | 37 + 1 file changed, 25 insertions(+), 12 deletions(-) diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c index e6a7382..f306aa8 100644 --- a/drivers/memory/mtk-smi.c

[PATCH 05/13] iommu/mediatek: Add mt8183 IOMMU support

2018-09-03 Thread Yong Wu
larb2 larb3 larb4 larb5 larb6CCU disp vdec IPU0 IPU1 venc IPU1cam As above, larb0 connects with the id 0 in smi-common. larb1 connects with the id 7 in smi-common. ... Take a example, if the larb-id reported in the mtk_iommu_isr is 7, actually it is lar

[PATCH 09/13] memory: mtk-smi: Add bus_sel for mt8183

2018-09-03 Thread Yong Wu
. In mt8173 and mt2712, we don't get the performance issue, Keep its default value(0x0), that means all the larbs enter mmu0. Signed-off-by: Yong Wu --- drivers/memory/mtk-smi.c | 29 ++--- 1 file changed, 26 insertions(+), 3 deletions(-) diff --git a/drivers/memory/mtk-smi.c

[PATCH 07/13] memory: mtk-smi: Invoke pm runtime_callback to enable clocks

2018-09-03 Thread Yong Wu
a chance to get rid of mtk_smi_larb_get/put which could be a next topic. Signed-off-by: Yong Wu --- drivers/memory/mtk-smi.c | 113 ++- 1 file changed, 72 insertions(+), 41 deletions(-) diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c

[PATCH 06/13] iommu/mediatek: Add mmu1 support

2018-09-03 Thread Yong Wu
lue of that register is 0 which means all the larbs go to mmu0 defaultly. This is a prepare patch for adjust SMI_BUS_SEL for mt8183. Signed-off-by: Yong Wu --- drivers/iommu/mtk_iommu.c | 47 +-- 1 file changed, 29 insertions(+), 18 deletions(-) diff --

[PATCH 11/13] iommu/mediatek: Add shutdown callback

2018-09-03 Thread Yong Wu
In the reboot burning test, if some Multimedia HW has something wrong, It may keep send the invalid request to IOMMU. In order to avoid affect the reboot flow, we add the shutdown callback to disable M4U HW when shutdown. Signed-off-by: Yong Wu --- drivers/iommu/mtk_iommu.c | 6 ++ 1 file

[PATCH 10/13] iommu/mediatek: Add VLD_PA_RANGE register backup when suspend

2018-09-03 Thread Yong Wu
The register VLD_PA_RNG(0x118) was forgot to backup while adding 4GB mode support for mt2712. this patch add it. Fixes: 30e2fccf9512 ("iommu/mediatek: Enlarge the validate PA range for 4GB mode") Signed-off-by: Yong Wu --- drivers/iommu/mtk_iommu.c | 2 ++ drivers/iommu/mtk_iommu.

[PATCH 12/13] memory: mtk-smi: Get rid of need_larbid

2018-09-03 Thread Yong Wu
The "mediatek,larb-id" has already been parsed in MTK IOMMU driver. It's no need to parse it again in SMI driver. Only clean some codes. This patch is fit for all the current mt2701, mt2712, mt8173 and mt8183. Signed-off-by: Yong Wu --- drivers/memory/mtk-

[PATCH 13/13] iommu/mediatek: Switch to SPDX license identifier

2018-09-03 Thread Yong Wu
Switch to SPDX license identifier for MediaTek iommu/smi and their header files. Signed-off-by: Yong Wu --- drivers/iommu/mtk_iommu.c | 10 +- drivers/iommu/mtk_iommu.h | 10 +- drivers/iommu/mtk_iommu_v1.c | 10

[PATCH 00/13] MT8183 IOMMU SUPPORT

2018-09-03 Thread Yong Wu
't contain the dtsi part since it need depend on the ccf and power-domain nodes which has not been accepted. Yong Wu (13): dt-bindings: mediatek: Add binding for mt8183 IOMMU and SMI iommu/mediatek: Use a struct as the platform data memory: mtk-smi: Use a general config_port interface iommu/

[PATCH 03/13] memory: mtk-smi: Use a general config_port interface

2018-09-03 Thread Yong Wu
. In mt8183, CCU connects with smi-common directly, it's also not a normal larb. Hence, we add a "larb_special_mask" for these special larbs. This is also a prepare patch for adding mt8183 SMI support. Signed-off-by: Yong Wu --- drivers/memory/mtk-smi.c | 12 +--- 1 file changed, 5

Re: [PATCH 04/13] iommu/io-pgtable-arm-v7s: Extend MediaTek 4GB mode

2018-09-19 Thread Yong Wu
Hi Robin, Could you help take a look at this patch since I changed the v7s here? Thanks. On Mon, 2018-09-03 at 14:01 +0800, Yong Wu wrote: > MediaTek extend the arm v7s descriptor to support the dram over 4GB. > > In the mt2712 and mt8173, it's called "4GB mode", t

[PATCH v2 14/14] iommu/mediatek: Switch to SPDX license identifier

2018-09-24 Thread Yong Wu
Switch to SPDX license identifier for MediaTek iommu/smi and their header files. Signed-off-by: Yong Wu Reviewed-by: Rob Herring --- drivers/iommu/mtk_iommu.c | 10 +- drivers/iommu/mtk_iommu.h | 10 +- drivers/iommu/mtk_iommu_v1.c

[PATCH v2 12/14] iommu/mediatek: Add shutdown callback

2018-09-24 Thread Yong Wu
In the reboot burning test, if some Multimedia HW has something wrong, It may keep send the invalid request to IOMMU. In order to avoid affect the reboot flow, we add the shutdown callback to disable M4U HW when shutdown. Signed-off-by: Yong Wu --- drivers/iommu/mtk_iommu.c | 6 ++ 1 file

[PATCH v2 13/14] memory: mtk-smi: Get rid of need_larbid

2018-09-24 Thread Yong Wu
The "mediatek,larb-id" has already been parsed in MTK IOMMU driver. It's no need to parse it again in SMI driver. Only clean some codes. This patch is fit for all the current mt2701, mt2712, mt8173 and mt8183. Signed-off-by: Yong Wu --- drivers/memory/mtk-

[PATCH v2 03/14] memory: mtk-smi: Use a general config_port interface

2018-09-24 Thread Yong Wu
. In mt8183, IPU0/1 and CCU connect with smi-common directly, they also are not the normal larb. Hence, we add a "larb_special_mask" for these special larbs. This is also a prepare patch for adding mt8183 SMI support. Signed-off-by: Yong Wu --- drivers/memory/mtk-smi.c | 12 +--- 1 fi

[PATCH v2 05/14] iommu/io-pgtable-arm-v7s: Extend MediaTek 4GB Mode

2018-09-24 Thread Yong Wu
Meanwhile the iova still is 32bits. In order to unify code, in the "4GB mode", we add the bit32 for the physical address manually in our driver. Correspondingly, Adding bit32 and bit33 for the PA in the iova_to_phys has to been moved into v7s. Signed-off-by: Yong Wu --- drivers/

[PATCH v2 04/14] iommu/io-pgtable-arm-v7s: Add paddr_to_iopte and iopte_to_paddr helpers

2018-09-24 Thread Yong Wu
Add two helper functions: paddr_to_iopte and iopte_to_paddr. Signed-off-by: Yong Wu --- drivers/iommu/io-pgtable-arm-v7s.c | 45 -- 1 file changed, 33 insertions(+), 12 deletions(-) diff --git a/drivers/iommu/io-pgtable-arm-v7s.c b/drivers/iommu/io-pgtable

[PATCH v2 01/14] dt-bindings: mediatek: Add binding for mt8183 IOMMU and SMI

2018-09-24 Thread Yong Wu
for smi-common and add a "gals" clock for smi-larb. >From the diagram above, IPU0/IPU1(Image Processor Unit) and CCU(Camera Control Unit) is connected with smi-common directly, we can take them as "larb2", "larb3" and "larb7", and their register

[PATCH v2 00/14] MT8183 IOMMU SUPPORT

2018-09-24 Thread Yong Wu
larb2/larb3 to the special larbs. 3) Refactor the larb-id remapped array(larbid_remapped), then we don't need add the new function(mtk_iommu_get_larbid). 4) Add a new patch for v7s two helpers(paddr_to_iopte and iopte_to_paddr). 5) Change some comment for MTK 4GB mode. v1: http:

[PATCH v2 02/14] iommu/mediatek: Use a struct as the platform data

2018-09-24 Thread Yong Wu
Use a struct as the platform special data instead of the enumeration. This is a prepare patch for adding mt8183 iommu support. Signed-off-by: Yong Wu --- drivers/iommu/mtk_iommu.c | 24 drivers/iommu/mtk_iommu.h | 6 +- 2 files changed, 21 insertions(+), 9

[PATCH v2 06/14] iommu/mediatek: Add mt8183 IOMMU support

2018-09-24 Thread Yong Wu
larb5 larb6 CCU disp vdec img cam venc imgcam As above, larb0 connects with the id 0 in smi-common. larb1 connects with the id 7 in smi-common. ... Take a example, if the larb-id reported in the mtk_iommu_isr is 7, actually it is larb1(vdec). Signed-off-by: Yong Wu --

[PATCH v2 10/14] memory: mtk-smi: Add bus_sel for mt8183

2018-09-24 Thread Yong Wu
. In mt8173 and mt2712, we don't get the performance issue, Keep its default value(0x0), that means all the larbs enter mmu0. Signed-off-by: Yong Wu --- drivers/memory/mtk-smi.c | 29 ++--- 1 file changed, 26 insertions(+), 3 deletions(-) diff --git a/drivers/memory/mtk-smi.c

[PATCH v2 08/14] memory: mtk-smi: Invoke pm runtime_callback to enable clocks

2018-09-24 Thread Yong Wu
a chance to get rid of mtk_smi_larb_get/put which could be a next topic. Signed-off-by: Yong Wu --- drivers/memory/mtk-smi.c | 113 ++- 1 file changed, 72 insertions(+), 41 deletions(-) diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c

[PATCH v2 11/14] iommu/mediatek: Add VLD_PA_RANGE register backup when suspend

2018-09-24 Thread Yong Wu
The register VLD_PA_RNG(0x118) was forgot to backup while adding 4GB mode support for mt2712. this patch add it. Fixes: 30e2fccf9512 ("iommu/mediatek: Enlarge the validate PA range for 4GB mode") Signed-off-by: Yong Wu --- drivers/iommu/mtk_iommu.c | 2 ++ drivers/iommu/mtk_iommu.

[PATCH v2 09/14] memory: mtk-smi: Use a struct for the platform data for smi-common

2018-09-24 Thread Yong Wu
g bus_sel for mt8183. Signed-off-by: Yong Wu --- drivers/memory/mtk-smi.c | 37 + 1 file changed, 25 insertions(+), 12 deletions(-) diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c index 7cf4573..3e6e0a8 100644 --- a/drivers/memory/mtk-smi.c

[PATCH v2 07/14] iommu/mediatek: Add mmu1 support

2018-09-24 Thread Yong Wu
lue of that register is 0 which means all the larbs go to mmu0 defaultly. This is a prepare patch for adjust SMI_BUS_SEL for mt8183. Signed-off-by: Yong Wu --- drivers/iommu/mtk_iommu.c | 47 +-- 1 file changed, 29 insertions(+), 18 deletions(-) diff --

Re: [PATCH 04/13] iommu/io-pgtable-arm-v7s: Extend MediaTek 4GB mode

2018-09-24 Thread Yong Wu
On Thu, 2018-09-20 at 18:31 +0100, Robin Murphy wrote: > On 03/09/18 07:01, Yong Wu wrote: > > MediaTek extend the arm v7s descriptor to support the dram over 4GB. > > > > In the mt2712 and mt8173, it's called "4GB mode", the physical address > > is from 0x400

[PATCH 01/13] dt-binding: mediatek: Get rid of mediatek, larb for multimedia HW

2018-12-31 Thread Yong Wu
connects with from iommu id in the "iommus=" property. Signed-off-by: Yong Wu --- I guess it should go through Matthias's tree if the patch is ok, thus I don't separate to different patches. If it's really needed, please feel free to tell me. --- .../devicetree/bindings/display/mediate

[PATCH 03/13] iommu/mediatek: Add probe_defer for smi-larb

2018-12-31 Thread Yong Wu
consumer drivers run before smi-larb, the supplier link_status is DL_DEV_NO_DRIVER(0) in the device_link_add, then device_links_driver_bound will use WARN_ON to complain that the link_status of supplier is not right. This is a preparing patch for adding device_link. Signed-off-by: Yong Wu

[PATCH 02/13] driver core: Remove the link if there is no driver with AUTO flag

2018-12-31 Thread Yong Wu
DL_FLAG_AUTOREMOVE_CONSUMER/SUPPLIER means "Remove the link automatically on consumer/supplier driver unbind", that means we should remove whole the device_link when there is no this driver no matter what the ref_count of the link is. CC: Greg Kroah-Hartman Signed-off-b

[PATCH 00/13] Clean up "mediatek,larb" after adding device_link

2018-12-31 Thread Yong Wu
umer don't need call the mtk_smi_larb_get/put to enable the power and clock of smi-larb and smi-common. This patchset depends on "MT8183 IOMMU SUPPORT"[1]. [1] https://lists.linuxfoundation.org/pipermail/iommu/2019-January/032387.html Yong Wu (13): dt-binding: mediatek: Get rid of mediatek,larb f

[PATCH v5 08/20] iommu/mediatek: Add larb-id remapped support

2018-12-31 Thread Yong Wu
lso is a preparing patch for mt8183. Signed-off-by: Yong Wu --- drivers/iommu/mtk_iommu.c | 4 drivers/iommu/mtk_iommu.h | 2 ++ 2 files changed, 6 insertions(+) diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c index 847082c..eca1536 100644 --- a/drivers/iommu/mtk_iommu.c +++ b/driv

[PATCH v5 13/20] iommu/mediatek: Add mt8183 IOMMU support

2018-12-31 Thread Yong Wu
eans the S bit which is enabled defaultly, Hence, we add a mask. 5) mt8183 HW has a GALS modules, SMI should enable "has_gals" support. 6) mt8183 need reset_axi like mt8173. 7) the larb-id in smi-common is remapped. M4U should add its larbid_remap. Signed-off-by: Yong Wu ---

[PATCH v5 12/20] memory: mtk-smi: Add gals support

2018-12-31 Thread Yong Wu
add "gals0" and "gals1" clocks for smi-common and add a "gals" clock for smi-larb. This patch adds gals clock supporting in the SMI. Note that some larbs may still don't have the "gals" clock like larb1 and larb4 above. This is also a preparing patch for m

[PATCH v5 10/20] iommu/mediatek: Move reset_axi into plat_data

2018-12-31 Thread Yong Wu
In mt8173 and mt8183, 0x48 is REG_MMU_STANDARD_AXI_MODE while it is extended to REG_MMU_CTRL which contains _STANDARD_AXI_MODE in the other SoCs. I move this property to plat_data since both mt8173 and mt8183 use this property. It is a preparing patch for mt8183. Signed-off-by: Yong Wu

[PATCH v5 20/20] iommu/mediatek: Switch to SPDX license identifier

2018-12-31 Thread Yong Wu
Switch to SPDX license identifier for MediaTek iommu/smi and their header files. Signed-off-by: Yong Wu Reviewed-by: Rob Herring --- drivers/iommu/mtk_iommu.c | 10 +- drivers/iommu/mtk_iommu.h | 10 +- drivers/iommu/mtk_iommu_v1.c

[PATCH v5 18/20] iommu/mediatek: Fix VLD_PA_RANGE register backup when suspend

2018-12-31 Thread Yong Wu
The register VLD_PA_RNG(0x118) was forgot to backup while adding 4GB mode support for mt2712. this patch add it. Fixes: 30e2fccf9512 ("iommu/mediatek: Enlarge the validate PA range for 4GB mode") Signed-off-by: Yong Wu --- drivers/iommu/mtk_iommu.c | 2 ++ drivers/iommu/mtk_iommu.

[PATCH v5 16/20] memory: mtk-smi: Add bus_sel for mt8183

2018-12-31 Thread Yong Wu
. In mt8173 and mt2712, we don't get the performance issue, Keep its default value(0x0), that means all the larbs enter mmu0. Note: smi gen1(mt2701/mt7623) don't have this bus_sel. CC: Matthias Brugger Signed-off-by: Yong Wu --- drivers/memory/mtk-smi.c | 22 -- 1 file changed

[PATCH v5 14/20] iommu/mediatek: Add mmu1 support

2018-12-31 Thread Yong Wu
lue of that register is 0 which means all the larbs go to mmu0 defaultly. This is a preparing patch for adjusting SMI_BUS_SEL for mt8183. Signed-off-by: Yong Wu --- drivers/iommu/mtk_iommu.c | 47 +-- 1 file changed, 29 insertions(+), 18 deletions(-) diff --

[PATCH v5 17/20] memory: mtk-smi: Get rid of need_larbid

2018-12-31 Thread Yong Wu
mt2712 which have 2 M4Us. In the other SoCs, we can get the larb-id from M4U in which the larbs in the "mediatek,larbs" always are ordered. CC: Matthias Brugger Signed-off-by: Yong Wu --- drivers/memory/mtk-smi.c | 26 ++ 1 file changed, 2 insertions(+

[PATCH v5 15/20] memory: mtk-smi: Invoke pm runtime_callback to enable clocks

2018-12-31 Thread Yong Wu
it gives a chance to get rid of mtk_smi_larb_get/put which could be a next topic. CC: Matthias Brugger Signed-off-by: Yong Wu --- drivers/memory/mtk-smi.c | 113 ++- 1 file changed, 72 insertions(+), 41 deletions(-) diff --git a/drivers/memory/mtk-smi.c b

[PATCH v5 19/20] iommu/mediatek: Add shutdown callback

2018-12-31 Thread Yong Wu
In the reboot burning test, if some Multimedia HW has something wrong, It may keep send the invalid request to IOMMU. In order to avoid affect the reboot flow, we add the shutdown callback to disable M4U HW when shutdown. Signed-off-by: Yong Wu --- drivers/iommu/mtk_iommu.c| 6

[PATCH v5 11/20] iommu/mediatek: Move vld_pa_rng into plat_data

2018-12-31 Thread Yong Wu
Both mt8173 and mt8183 don't have this vld_pa_rng(valid physical address range) register while mt2712 have. Move it into the plat_data. Signed-off-by: Yong Wu --- drivers/iommu/mtk_iommu.c | 3 ++- drivers/iommu/mtk_iommu.h | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git

[PATCH v5 04/20] memory: mtk-smi: Use a struct for the platform data for smi-common

2018-12-31 Thread Yong Wu
mt8183. Signed-off-by: Yong Wu Reviewed-by: Matthias Brugger --- drivers/memory/mtk-smi.c | 35 --- 1 file changed, 24 insertions(+), 11 deletions(-) diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c index 9fd6b3d..8a2f968 100644 --- a/drivers/me

[PATCH v6 06/20] iommu/io-pgtable-arm-v7s: Extend MediaTek 4GB Mode

2018-12-31 Thread Yong Wu
ss could be over 4GB, the mt8183 support it while the previous mt8173 don't. thus keep it as is. Signed-off-by: Yong Wu Reviewed-by: Robin Murphy --- drivers/iommu/io-pgtable-arm-v7s.c | 31 --- drivers/iommu/io-pgtable.h | 7 +++ drivers/iommu/mtk_i

[PATCH v5 05/20] iommu/io-pgtable-arm-v7s: Add paddr_to_iopte and iopte_to_paddr helpers

2018-12-31 Thread Yong Wu
Add two helper functions: paddr_to_iopte and iopte_to_paddr. Signed-off-by: Yong Wu Reviewed-by: Robin Murphy --- drivers/iommu/io-pgtable-arm-v7s.c | 45 -- 1 file changed, 33 insertions(+), 12 deletions(-) diff --git a/drivers/iommu/io-pgtable-arm-v7s.c

[PATCH v5 01/20] dt-bindings: mediatek: Add binding for mt8183 IOMMU and SMI

2018-12-31 Thread Yong Wu
for smi-common and add a "gals" clock for smi-larb. >From the diagram above, IPU0/IPU1(Image Processor Unit) and CCU(Camera Control Unit) is connected with smi-common directly, we can take them as "larb2", "larb3" and "larb7", and their register

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