[PATCH v3 3/6] iommu/iova: adjust __cached_rbnode_insert_update

2017-05-18 Thread Zhen Lei
| cached32_node(new) cached32_node(old) Signed-off-by: Zhen Lei <thunder.leiz...@huawei.com> --- drivers/iommu/iova.c | 17 + 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/drivers/iommu/iova.c b/drivers/iommu/iova.c index d0c19ec..1b8e136 100644 --

[PATCH v3 0/6] iommu/iova: improve the allocation performance of dma64

2017-05-18 Thread Zhen Lei
4] 0.0-10.0 sec 1.09 GBytes 933 Mbits/sec [ 5] local 192.168.1.106 port 5001 connected with 192.168.1.198 port 36332 [ 5] 0.0-10.0 sec 1.10 GBytes 939 Mbits/sec [ 4] local 192.168.1.106 port 5001 connected with 192.168.1.198 port 36334 [ 4] 0.0-10.0 sec 1.10 GBytes 938 Mbits/sec

[PATCH v3 4/6] iommu/iova: to optimize the allocation performance of dma64

2017-05-18 Thread Zhen Lei
dma_32bit_pfn + 1 Signed-off-by: Zhen Lei <thunder.leiz...@huawei.com> --- drivers/iommu/iova.c | 46 +++--- include/linux/iova.h | 5 +++-- 2 files changed, 30 insertions(+), 21 deletions(-) diff --git a/drivers/iommu/iova.c b/drivers/iommu/iova.c index

[PATCH v3 1/6] iommu/iova: cut down judgement times

2017-05-18 Thread Zhen Lei
Below judgement can only be satisfied at the last time, which produced 2N judgements(suppose N times failed, 0 or 1 time successed) in vain. if ((pfn >= iova->pfn_lo) && (pfn <= iova->pfn_hi)) { return iova; } Signed-off-by: Zhen Lei <thunder.leiz...@huawei.com>

[PATCH v3 6/6] iommu/iova: fix iovad->dma_32bit_pfn as the last pfn of dma32

2017-05-18 Thread Zhen Lei
To make sure iovad->cached32_node and iovad->cached64_node can exactly control dma32 and dma64 area. It also help us to remove the parameter pfn_32bit of init_iova_domain. Signed-off-by: Zhen Lei <thunder.leiz...@huawei.com> --- drivers/iommu/amd_iommu.c| 7 ++- drive

[PATCH v3 5/6] iommu/iova: move the caculation of pad mask out of loop

2017-05-18 Thread Zhen Lei
I'm not sure whether the compiler can optimize it, but move it out will be better. At least, it does not require lock protection. Signed-off-by: Zhen Lei <thunder.leiz...@huawei.com> --- drivers/iommu/iova.c | 22 ++ 1 file changed, 10 insertions(+), 12 deletions(-)

[PATCH v3 2/6] iommu/iova: insert start_pfn boundary of dma32

2017-05-18 Thread Zhen Lei
Reserve the first granule size memory(start at start_pfn) as boundary iova, to make sure that iovad->cached32_node can not be NULL in future. Meanwhile, changed the assignment of iovad->cached32_node from rb_next to rb_prev of >node in function __cached_rbnode_delete_update. Signed-off

[PATCH 1/1] iommu/arm-smmu-v3: replace writel with writel_relaxed in queue_inc_prod

2017-06-20 Thread Zhen Lei
This function is protected by spinlock, and the latter will do memory barrier implicitly. So that we can safely use writel_relaxed. In fact, the dmb operation will lengthen the time protected by lock, which indirectly increase the locking confliction in the stress scene. Signed-off-by: Zhen Lei

[PATCH 5/5] iommu/io-pgtable: delete member tlb_sync_pending of struct io_pgtable

2017-06-26 Thread Zhen Lei
This member is unused now, because the previous patches ensured that each unmap will always be followed by tlb sync operation. By the way, ->tlb_flush_all executes tlb_sync by itself. Signed-off-by: Zhen Lei <thunder.leiz...@huawei.com> --- drivers/iommu/io-pgtable.h | 8 +--

[PATCH 2/5] iommu: add a new member unmap_tlb_sync into struct iommu_ops

2017-06-26 Thread Zhen Lei
doing right now. This ensures that: all TLBs of an iova-range have been invalidated before the iova reallocated. Signed-off-by: Zhen Lei <thunder.leiz...@huawei.com> --- drivers/iommu/iommu.c | 3 +++ include/linux/iommu.h | 1 + 2 files changed, 4 insertions(+) diff --git a/drivers/iommu/iommu.c b/

[PATCH 4/5] iommu/arm-smmu: add support for unmap a memory range with only one tlb sync

2017-06-26 Thread Zhen Lei
e-n tlb sync Signed-off-by: Zhen Lei <thunder.leiz...@huawei.com> --- drivers/iommu/arm-smmu.c | 10 ++ drivers/iommu/io-pgtable-arm-v7s.c | 32 +--- 2 files changed, 31 insertions(+), 11 deletions(-) diff --git a/drivers/iommu/arm-smmu.c

[PATCH 3/5] iommu/arm-smmu-v3: add support for unmap an iova range with only one tlb sync

2017-06-26 Thread Zhen Lei
e-n tlb sync Signed-off-by: Zhen Lei <thunder.leiz...@huawei.com> --- drivers/iommu/arm-smmu-v3.c| 10 ++ drivers/iommu/io-pgtable-arm.c | 30 -- drivers/iommu/io-pgtable.h | 1 + 3 files changed, 31 insertions(+), 10 deletions(-) diff --git a/d

[PATCH 0/5] arm-smmu: performance optimization

2017-06-26 Thread Zhen Lei
thought more than 3 whole days and got this one. This patchset is based on Robin Murphy's [PATCH v2 0/8] io-pgtable lock removal. Zhen Lei (5): iommu/arm-smmu-v3: put off the execution of TLBI* to reduce lock confliction iommu: add a new member unmap_tlb_sync into struct iommu_ops iommu/arm

[PATCH 1/5] iommu/arm-smmu-v3: put off the execution of TLBI* to reduce lock confliction

2017-06-26 Thread Zhen Lei
of too many commands have been delayed, restrict the max delayed number. According to my test, I got the same performance data as I replaced writel with writel_relaxed in queue_inc_prod. Signed-off-by: Zhen Lei <thunder.leiz...@huawei.com> --- drivers/iommu/arm-smmu-v3.

[PATCH v2 2/3] iommu/arm-smmu-v3: add support for unmap an iova range with only one tlb sync

2017-09-12 Thread Zhen Lei
This patch is base on: (add02cfdc9bc2 "iommu: Introduce Interface for IOMMU TLB Flushing") Because iotlb_sync is moved out of ".unmap = arm_smmu_unmap", some interval ".unmap" calls should explicitly followed by a iotlb_sync operation. Signed-off-by: Zhen L

[PATCH v2 3/3] iommu/arm-smmu: add support for unmap a memory range with only one tlb sync

2017-09-12 Thread Zhen Lei
This patch is base on: (add02cfdc9bc2 "iommu: Introduce Interface for IOMMU TLB Flushing") Because iotlb_sync is moved out of ".unmap = arm_smmu_unmap", some interval ".unmap" calls should explicitly followed by a iotlb_sync operation. Signed-off-by: Zhen L

[PATCH v2 1/3] iommu/arm-smmu-v3: put off the execution of TLBI* to reduce lock confliction

2017-09-12 Thread Zhen Lei
of too many commands have been delayed, restrict the max delayed number. According to my test, I got the same performance data as I replaced writel with writel_relaxed in queue_inc_prod. Signed-off-by: Zhen Lei <thunder.leiz...@huawei.com> --- drivers/iommu/arm-smmu-v3.

[PATCH v2 0/3] arm-smmu: performance optimization

2017-09-12 Thread Zhen Lei
v1 -> v2: base on (add02cfdc9bc2 "iommu: Introduce Interface for IOMMU TLB Flushing") Zhen Lei (3): iommu/arm-smmu-v3: put off the execution of TLBI* to reduce lock confliction iommu/arm-smmu-v3: add support for unmap an iova range with only one tlb sync iommu/arm-smmu

[PATCH 1/1] iommu/arm-smmu-v3: eliminate a potential memory corruption on Hi16xx soc

2018-10-15 Thread Zhen Lei
sure the 4 bytes padding is always exist. There is no functional change. Signed-off-by: Zhen Lei --- drivers/iommu/arm-smmu-v3.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index 5059d09..a07bc0d 100644 --- a/drivers/iommu/arm-smm

[PATCH v3 1/1] iommu/arm-smmu-v3: eliminate a potential memory corruption on hi1620 and earlier

2018-10-30 Thread Zhen Lei
s good to explicitly add a workaround. Let's enclose the "sync_count" into a union and companion with a new member "padding" of type u64. There is no functional change. Signed-off-by: Zhen Lei --- drivers/iommu/arm-smmu-v3.c | 18 +- 1 file changed, 17

[PATCH v2 1/1] iommu/arm-smmu-v3: eliminate a potential memory corruption on Hi16xx soc

2018-10-20 Thread Zhen Lei
s good to explicitly add a workaround: 1. Add gcc __attribute__((aligned(8))) to make sure that "sync_count" is always aligned by 8 bytes. 2. Add a "int" struct member to make sure the 4 bytes padding is always exist. There is no functional change. Signed-off-by: Zhen Le

[PATCH v8 0/7] iommu: enhance IOMMU default DMA mode build options

2019-05-29 Thread Zhen Lei
lazy(mapping but defer the IOTLB invalidation), strict. But currently each ARCHs defined their private boot options, different with each other. For example, to enable/disable "passthrough", ARM64 use iommu.passthrough=1/0, X86 use iommu=pt/nopt, PPC/POWERNV use iommu=nobypass. Zhen Lei (7):

[PATCH v8 4/7] powernv/iommu: add support for IOMMU default DMA mode build options

2019-05-29 Thread Zhen Lei
The default DMA mode is PASSTHROUGH on powernv, this patch make it can be set to STRICT at build time. It can be overridden by boot option. There is no functional change. Signed-off-by: Zhen Lei --- arch/powerpc/platforms/powernv/pci-ioda.c | 3 ++- drivers/iommu/Kconfig

[PATCH v8 2/7] x86/dma: use IS_ENABLED() to simplify the code

2019-05-29 Thread Zhen Lei
This patch removes the ifdefs around CONFIG_IOMMU_DEFAULT_PASSTHROUGH to improve readablity. Signed-off-by: Zhen Lei --- arch/x86/kernel/pci-dma.c | 7 ++- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c index

[PATCH v8 6/7] iommu/amd: add support for IOMMU default DMA mode build options

2019-05-29 Thread Zhen Lei
The default DMA mode of AMD IOMMU is LAZY, this patch make it can be set to STRICT at build time. It can be overridden by boot option. There is no functional change. Signed-off-by: Zhen Lei --- drivers/iommu/Kconfig | 2 +- drivers/iommu/amd_iommu_init.c | 3 ++- 2 files changed, 3

[PATCH v8 3/7] s390/pci: add support for IOMMU default DMA mode build options

2019-05-29 Thread Zhen Lei
The default DMA mode is LAZY on s390, this patch make it can be set to STRICT at build time. It can be overridden by boot option. There is no functional change. Signed-off-by: Zhen Lei --- arch/s390/pci/pci_dma.c | 2 +- drivers/iommu/Kconfig | 2 ++ 2 files changed, 3 insertions(+), 1

[PATCH v8 1/7] iommu: enhance IOMMU default DMA mode build options

2019-05-29 Thread Zhen Lei
First, add build option IOMMU_DEFAULT_{LAZY|STRICT}, so that we have the opportunity to set {lazy|strict} mode as default at build time. Then put the three config options in an choice, make people can only choose one of the three at a time. Signed-off-by: Zhen Lei --- drivers/iommu/Kconfig | 42

[PATCH v8 5/7] iommu/vt-d: add support for IOMMU default DMA mode build options

2019-05-29 Thread Zhen Lei
The default DMA mode of INTEL IOMMU is LAZY, this patch make it can be set to STRICT at build time. It can be overridden by boot option. There is no functional change. Signed-off-by: Zhen Lei --- drivers/iommu/Kconfig | 2 +- drivers/iommu/intel-iommu.c | 2 +- 2 files changed, 2

[PATCH v8 7/7] ia64: hide build option IOMMU_DEFAULT_PASSTHROUGH

2019-05-29 Thread Zhen Lei
The DMA mode PASSTHROUGH is not used on ia64. Signed-off-by: Zhen Lei --- drivers/iommu/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig index f6c030433d38048..f7400e35628dce4 100644 --- a/drivers/iommu/Kconfig +++ b

[PATCH v9 3/7] s390/pci: add support for IOMMU default DMA mode build options

2019-06-13 Thread Zhen Lei
The default DMA mode is LAZY on s390, this patch make it can be set to STRICT at build time. It can be overridden by boot option. There is no functional change. Signed-off-by: Zhen Lei Acked-by: Sebastian Ott --- arch/s390/pci/pci_dma.c | 2 +- drivers/iommu/Kconfig | 2 ++ 2 files changed

[PATCH v9 5/7] iommu/vt-d: add support for IOMMU default DMA mode build options

2019-06-13 Thread Zhen Lei
The default DMA mode of INTEL IOMMU is LAZY, this patch make it can be set to STRICT at build time. It can be overridden by boot option. There is no functional change. Signed-off-by: Zhen Lei --- drivers/iommu/Kconfig | 2 +- drivers/iommu/intel-iommu.c | 2 +- 2 files changed, 2

[PATCH v9 7/7] ia64: hide build option IOMMU_DEFAULT_PASSTHROUGH

2019-06-13 Thread Zhen Lei
The DMA mode PASSTHROUGH is not used on ia64. Signed-off-by: Zhen Lei --- drivers/iommu/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig index 70741fd73b07785..63506f1cad3d149 100644 --- a/drivers/iommu/Kconfig +++ b

[PATCH v9 4/7] powernv/iommu: add support for IOMMU default DMA mode build options

2019-06-13 Thread Zhen Lei
The default DMA mode is PASSTHROUGH on powernv, this patch make it can be set to STRICT at build time. It can be overridden by boot option. There is no functional change. Signed-off-by: Zhen Lei --- arch/powerpc/platforms/powernv/pci-ioda.c | 3 ++- drivers/iommu/Kconfig

[PATCH v9 1/7] iommu: enhance IOMMU default DMA mode build options

2019-06-13 Thread Zhen Lei
First, add build option IOMMU_DEFAULT_{LAZY|STRICT}, so that we have the opportunity to set {lazy|strict} mode as default at build time. Then put the three config options in an choice, make people can only choose one of the three at a time. Signed-off-by: Zhen Lei --- drivers/iommu/Kconfig | 44

[PATCH v9 0/7] iommu: enhance IOMMU default DMA mode build options

2019-06-13 Thread Zhen Lei
ed, there are 3 dma modes: paasthrough(bypass), lazy(mapping but defer the IOTLB invalidation), strict. But currently each ARCHs defined their private boot options, different with each other. For example, to enable/disable "passthrough", ARM64 use iommu.passthrough=1/0, X86 use iommu=pt/nopt, PPC/PO

[PATCH v9 2/7] x86/dma: use IS_ENABLED() to simplify the code

2019-06-13 Thread Zhen Lei
Remove the ifdefs around CONFIG_IOMMU_DEFAULT_PASSTHROUGH to improve readablity. Signed-off-by: Zhen Lei --- arch/x86/kernel/pci-dma.c | 6 +- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c index dcd272dbd0a9330

[PATCH v9 6/7] iommu/amd: add support for IOMMU default DMA mode build options

2019-06-13 Thread Zhen Lei
The default DMA mode of AMD IOMMU is LAZY, this patch make it can be set to STRICT at build time. It can be overridden by boot option. There is no functional change. Signed-off-by: Zhen Lei --- drivers/iommu/Kconfig | 2 +- drivers/iommu/amd_iommu_init.c | 2 +- 2 files changed, 2

[PATCH v7 0/1] iommu: enhance IOMMU dma mode build options

2019-05-20 Thread Zhen Lei
, to enable/disable "passthrough", ARM64 use iommu.passthrough=1/0, X86 use iommu=pt/nopt, PPC/POWERNV use iommu=nobypass. Zhen Lei (1): iommu: enhance IOMMU dma mode build options arch/ia64/kernel/pci-dma.c| 2 +- arch/powerpc/platforms/powernv/pci-ioda.c | 3

[PATCH v7 1/1] iommu: enhance IOMMU dma mode build options

2019-05-20 Thread Zhen Lei
. Signed-off-by: Zhen Lei --- arch/ia64/kernel/pci-dma.c| 2 +- arch/powerpc/platforms/powernv/pci-ioda.c | 3 ++- arch/s390/pci/pci_dma.c | 2 +- arch/x86/kernel/pci-dma.c | 7 ++--- drivers/iommu/Kconfig | 44

[PATCH v5 0/6] add generic boot option for IOMMU dma mode

2019-04-09 Thread Zhen Lei
ERNV use iommu=nobypass. Zhen Lei (6): iommu: add generic boot option iommu.dma_mode iommu: add build options corresponding to iommu.dma_mode iommu: add iommu_default_dma_mode_get/set() helper s390/pci: add support for generic boot option iommu.dma_mode powernv/iommu: add support

[PATCH v5 3/6] iommu: add iommu_default_dma_mode_get/set() helper

2019-04-09 Thread Zhen Lei
Also add IOMMU_DMA_MODE_IS_{STRICT|LAZT|PASSTHROUGH}() to make the code looks cleaner. There is no functional change, just prepare for the following patches. Signed-off-by: Zhen Lei --- drivers/iommu/iommu.c | 18 ++ include/linux/iommu.h | 18 ++ 2 files

[PATCH v5 2/6] iommu: add build options corresponding to iommu.dma_mode

2019-04-09 Thread Zhen Lei
-by: Zhen Lei --- Documentation/admin-guide/kernel-parameters.txt | 6 ++-- drivers/iommu/Kconfig | 43 + drivers/iommu/iommu.c | 4 ++- 3 files changed, 42 insertions(+), 11 deletions(-) diff --git a/Documentation/admin

[PATCH v5 1/6] iommu: add generic boot option iommu.dma_mode

2019-04-09 Thread Zhen Lei
are confused, such as: iommu.passthrough and iommu.strict, because they are no good to be coexist. So add iommu.dma_mode. Signed-off-by: Zhen Lei --- Documentation/admin-guide/kernel-parameters.txt | 19 drivers/iommu/iommu.c | 59

[PATCH v5 5/6] powernv/iommu: add support for generic boot option iommu.dma_mode

2019-04-09 Thread Zhen Lei
iommu=nobypass can be replaced with iommu.dma_mode=strict. Signed-off-by: Zhen Lei --- Documentation/admin-guide/kernel-parameters.txt | 2 +- arch/powerpc/platforms/powernv/pci-ioda.c | 5 ++--- drivers/iommu/Kconfig | 1 + 3 files changed, 4 insertions(+), 4

[PATCH v5 6/6] x86/iommu: add support for generic boot option iommu.dma_mode

2019-04-09 Thread Zhen Lei
The following equivalence or replacement relationship exists: iommu=pt <--> iommu.dma_mode=passthrough. iommu=nopt can be replaced with iommu.dma_mode=lazy. intel_iommu=strict <--> iommu.dma_mode=strict. amd_iommu=fullflush <--> iommu.dma_mode=strict. Signed-off-by: Zhen Lei

[PATCH v5 4/6] s390/pci: add support for generic boot option iommu.dma_mode

2019-04-09 Thread Zhen Lei
s390_iommu=strict is equivalent to iommu.dma_mode=strict. Signed-off-by: Zhen Lei --- Documentation/admin-guide/kernel-parameters.txt | 6 +++--- arch/s390/pci/pci_dma.c | 14 +++--- drivers/iommu/Kconfig | 1 + 3 files changed, 11

[PATCH v2 1/2] iommu/iova: introduce iova_magazine_compact_pfns()

2019-08-15 Thread Zhen Lei
iova_magazine_free_pfns() can only free the whole magazine buffer, add iova_magazine_compact_pfns() to support free part of it. Signed-off-by: Zhen Lei --- drivers/iommu/iova.c | 17 - 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/drivers/iommu/iova.c b/drivers

[PATCH v2 2/2] iommu/iova: enhance the rcache optimization

2019-08-15 Thread Zhen Lei
bs: 21 (f=21): [100.0% done] [10324M/0K /s] [2520K/0 iops] Jobs: 21 (f=21): [100.0% done] [10290M/0K /s] [2512K/0 iops] Jobs: 21 (f=21): [100.0% done] [10035M/0K /s] [2450K/0 iops] Jobs: 21 (f=21): [100.0% done] [10214M/0K /s] [2494K/0 iops] Signed-off-by: Zhen Lei --- drivers/iommu

[PATCH v2 0/2] iommu/iova: enhance the rcache optimization

2019-08-15 Thread Zhen Lei
hen the 2 4K IOVAs are continuous freed, the first 1 IOVAs can be quickly buffered, but the other 1 IOVAs can not. Zhen Lei (2): iommu/iova: introduce iova_magazine_compact_pfns() iommu/iova: enhance the rcache optimization drivers/iommu

[PATCH v2 0/2] add nr_ats_masters for quickly check

2019-08-14 Thread Zhen Lei
v1 --> v2: 1. change the type of nr_ats_masters from atomic_t to int, and move its ind/dec operation from arm_smmu_enable_ats()/arm_smmu_disable_ats() to arm_smmu_attach_dev()/arm_smmu_detach_dev(), and protected by "spin_lock_irqsave(_domain->devices_lock, flags);" Zhen

[PATCH v2 2/2] iommu/arm-smmu-v3: add nr_ats_masters for quickly check

2019-08-14 Thread Zhen Lei
mmu/arm-smmu-v3: Add support for PCI ATS") Signed-off-by: Zhen Lei --- drivers/iommu/arm-smmu-v3.c | 14 +- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index 29056d9bb12aa01..154334d3310c9b8 100644 --- a/dr

[PATCH v2 1/2] iommu/arm-smmu-v3: don't add a master into smmu_domain before it's ready

2019-08-14 Thread Zhen Lei
Once a master has been added into smmu_domain->devices, it may immediately be scaned in arm_smmu_unmap()-->arm_smmu_atc_inv_domain(). From a logical point of view, the master should be added into smmu_domain after it has been completely initialized. Signed-off-by: Zhen Lei --- drivers/iom

[PATCH v3 0/2] improve the concurrency of arm_smmu_atc_inv_domain()

2019-08-22 Thread Zhen Lei
ave(_domain->devices_lock, flags);" Zhen Lei (2): iommu/arm-smmu-v3: don't add a master into smmu_domain before it's ready iommu/arm-smmu-v3: change the lock type of arm_smmu_domain.devices_lock drivers/iommu/arm-smmu-v3.c | 20 ++-- 1 file changed, 10 insertio

[PATCH v3 1/2] iommu/arm-smmu-v3: don't add a master into smmu_domain before it's ready

2019-08-22 Thread Zhen Lei
Once a master has been added into smmu_domain->devices, it may immediately be scaned in arm_smmu_unmap()-->arm_smmu_atc_inv_domain(). From a logical point of view, the master should be added into smmu_domain after it has completely initialized. Signed-off-by: Zhen Lei --- drivers/iommu/ar

[PATCH v3 2/2] iommu/arm-smmu-v3: change the lock type of arm_smmu_domain.devices_lock

2019-08-22 Thread Zhen Lei
% done] [10817M/0K /s] [2641K/0 iops] [09h:59m:12s] Jobs: 24 (f=24): [0.2% done] [11083M/0K /s] [2706K/0 iops] [09h:59m:11s] Jobs: 24 (f=24): [0.2% done] [10603M/0K /s] [2589K/0 iops] [09h:59m:10s] Signed-off-by: Zhen Lei Suggested-by: Will Deacon --- drivers/iommu/arm-smmu-v3.

[PATCH] iommu/arm-smmu-v3: add nr_ats_masters to avoid unnecessary operations

2019-08-01 Thread Zhen Lei
rm-smmu-v3: Add support for PCI ATS") Signed-off-by: Zhen Lei --- drivers/iommu/arm-smmu-v3.c | 10 -- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index a9a9fabd396804a..1b370d9aca95f94 100644 --- a/drivers

[PATCH 1/2] iommu/iova: introduce iova_magazine_compact_pfns()

2019-08-01 Thread Zhen Lei
iova_magazine_free_pfns() can only free the whole magazine buffer, add iova_magazine_compact_pfns() to support free part of it. Signed-off-by: Zhen Lei --- drivers/iommu/iova.c | 17 - 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/drivers/iommu/iova.c b/drivers

[PATCH 2/2] iommu/iova: enhance the rcache optimization

2019-08-01 Thread Zhen Lei
bs: 21 (f=21): [100.0% done] [10324M/0K /s] [2520K/0 iops] Jobs: 21 (f=21): [100.0% done] [10290M/0K /s] [2512K/0 iops] Jobs: 21 (f=21): [100.0% done] [10035M/0K /s] [2450K/0 iops] Jobs: 21 (f=21): [100.0% done] [10214M/0K /s] [2494K/0 iops] Signed-off-by: Zhen Lei --- drivers/iommu

[PATCH 1/1] iommu/arm-smmu-v3: add support for BBML

2020-11-25 Thread Zhen Lei
the memory; If the address in the large block is not accessed before page table switching, the TLB has no cache. After the page table is switched, a new access is initiated to read the small block or page mapping from the memory. Signed-off-by: Zhen Lei --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

[PATCH 1/1] iommu/arm-smmu-v3: Use DEFINE_RES_MEM() to simplify code

2021-01-22 Thread Zhen Lei
No functional change. Signed-off-by: Zhen Lei --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 6 +- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index bca458c00e48a8b

[PATCH 0/2] Use another method to avoid resource conflicts between the SMMU and PMCG drivers

2021-01-18 Thread Zhen Lei
hat it can work properly. Zhen Lei (2): perf/smmuv3: Don't reserve the register space that overlaps with the SMMUv3 Revert "iommu/arm-smmu-v3: Don't reserve implementation defined register space" drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 32 +++--- drivers/i

[PATCH 1/2] perf/smmuv3: Don't reserve the register space that overlaps with the SMMUv3

2021-01-18 Thread Zhen Lei
not reserve the corresponding resource again. Otherwise, a resource reservation conflict is reported during boot. Signed-off-by: Zhen Lei --- drivers/perf/arm_smmuv3_pmu.c | 42 -- 1 file changed, 40 insertions(+), 2 deletions(-) diff --git a/drivers/perf

[PATCH 2/2] Revert "iommu/arm-smmu-v3: Don't reserve implementation defined register space"

2021-01-18 Thread Zhen Lei
This reverts commit 52f3fab0067d6fa9e99c1b7f63265dd48ca76046. This problem has been fixed by another patch. The original method had side effects, it was not mapped to the user-specified resource size. The code will become more complex when ECMDQ is supported later. Signed-off-by: Zhen Lei

[PATCH v5 0/1] perf/smmuv3: Don't reserve the PMCG register spaces

2021-02-01 Thread Zhen Lei
MCG register resources are located in the 64KB Page0 of the SMMU, the PMCG driver does not reserve the conflict resources when the SMMUv3 driver has reserved the conflict resources before. Instead, the PMCG driver only performs devm_ioremap() to ensure that it can work properly. Zhen Lei (1): perf

[PATCH v5 1/1] perf/smmuv3: Don't reserve the PMCG register spaces

2021-02-01 Thread Zhen Lei
register space. When both the SMMU and PMCG drivers reserve their own resources, a resource conflict occurs. To avoid this conflict, don't reserve the PMCG regions. Suggested-by: Robin Murphy Signed-off-by: Zhen Lei Reviewed-by: Robin Murphy --- drivers/perf/arm_smmuv3_pmu.c | 25

[PATCH v2 2/3] perf/smmuv3: Add a MODULE_SOFTDEP() to indicate dependency on SMMU

2021-01-26 Thread Zhen Lei
The MODULE_SOFTDEP() gives user space a hint of the loading sequence. And when command "modprobe arm_smmuv3_pmu" is executed, the arm_smmu_v3.ko is automatically loaded in advance. Signed-off-by: Zhen Lei --- drivers/perf/arm_smmuv3_pmu.c | 1 + 1 file changed, 1 insertion(+)

[PATCH v2 1/3] perf/smmuv3: Don't reserve the PMCG register spaces

2021-01-26 Thread Zhen Lei
register space. When both the SMMU and PMCG drivers reserve their own resources, a resource conflict occurs. To avoid this conflict, don't reserve the PMCG regions. Suggested-by: Robin Murphy Signed-off-by: Zhen Lei --- drivers/perf/arm_smmuv3_pmu.c | 27 +-- 1 file

[PATCH v2 0/3] perf/smmuv3: Don't reserve the PMCG register spaces

2021-01-26 Thread Zhen Lei
G driver does not reserve the conflict resources when the SMMUv3 driver has reserved the conflict resources before. Instead, the PMCG driver only performs devm_ioremap() to ensure that it can work properly. Zhen Lei (3): perf/smmuv3: Don't reserve the PMCG register spaces perf/smmuv3: Add a M

[PATCH v2 3/3] iommu/arm-smmu-v3: Reserving the entire SMMU register space

2021-01-26 Thread Zhen Lei
SMMU_IDR6.CMDQ_CONTROL_PAGE_LOG2NUMQ. Processing its resource reservation to avoid resource conflict with PMCG is a bit more complicated. Therefore, the resources of the PMCG are not reserved, and the entire SMMU resources are reserved. Suggested-by: Robin Murphy Signed-off-by: Zhen Lei --- drivers/iom

[PATCH v4 0/2] perf/smmuv3: Don't reserve the PMCG register spaces

2021-01-29 Thread Zhen Lei
e SMMUv3 driver has reserved the conflict resources before. Instead, the PMCG driver only performs devm_ioremap() to ensure that it can work properly. Zhen Lei (2): perf/smmuv3: Don't reserve the PMCG register spaces iommu/arm-smmu-v3: Reserving the entire SMMU register space drivers/iommu/arm/arm-

[PATCH v4 1/2] perf/smmuv3: Don't reserve the PMCG register spaces

2021-01-29 Thread Zhen Lei
register space. When both the SMMU and PMCG drivers reserve their own resources, a resource conflict occurs. To avoid this conflict, don't reserve the PMCG regions. Suggested-by: Robin Murphy Signed-off-by: Zhen Lei --- drivers/perf/arm_smmuv3_pmu.c | 25 +++-- 1 file changed

[PATCH v4 2/2] iommu/arm-smmu-v3: Reserving the entire SMMU register space

2021-01-29 Thread Zhen Lei
SMMU_IDR6.CMDQ_CONTROL_PAGE_LOG2NUMQ. Processing its resource reservation to avoid resource conflict with PMCG is a bit more complicated. Therefore, the resources of the PMCG are not reserved, and the entire SMMU resources are reserved. Signed-off-by: Zhen Lei --- drivers/iommu/arm/arm-smmu-v3/arm-smmu

[PATCH 1/1] Revert "iommu/iova: Retry from last rb tree node if iova search fails"

2021-01-29 Thread Zhen Lei
. fio bs=4k rw=read iodepth=128 cpus_allowed=0-127 Fixes: 4e89dce72521 ("iommu/iova: Retry from last rb tree node if iova search fails") Tested-by: Xiang Chen Signed-off-by: Zhen Lei --- drivers/iommu/iova.c | 23 ++- 1 file changed, 6 insertions(+), 17 deletion

[PATCH v3 1/2] iommu/iova: Fix spelling mistakes

2021-06-09 Thread Zhen Lei
Fix some spelling mistakes in comments found by "codespell": detroyed ==> destroyed defered ==> deferred entrie ==> entry alloced ==> allocated regularily ==> regularly Signed-off-by: Zhen Lei --- drivers/iommu/iova.c | 2 +- include/linux/iova.h | 10 +- 2 fi

[PATCH v3 2/2] iommu: Fix spelling mistakes

2021-06-09 Thread Zhen Lei
ally by John Garry and Will Deacon: appropriatley ==> appropriately Additionally, The ==> Additionally, the Signed-off-by: Zhen Lei --- drivers/iommu/amd/amd_iommu_types.h | 2 +- drivers/iommu/amd/init.c | 2 +- drivers/iommu/amd/iommu.c | 2 +- drivers/iommu/

[PATCH v3 0/2] iommu: Fix spelling mistakes

2021-06-09 Thread Zhen Lei
ommu*.h include/linux/iova.h include/uapi/linux/iommu.h 4) Changes to files "iova.h" and "iova.c" are grouped into a new patch. v1 --> v2: 1. Merge into one patch 2. Add a new fix "appropriatley --> appropriately" in iommu.c, discovered by John Garry Zhen Lei (2):

[PATCH 1/1] iommu/arm-smmu-v3: remove unnecessary oom message

2021-06-09 Thread Zhen Lei
Fixes scripts/checkpatch.pl warning: WARNING: Possible unnecessary 'out of memory' message Remove it can help us save a bit of memory. Signed-off-by: Zhen Lei --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 8 ++-- 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers

[PATCH 1/1] iommu/ipmmu-vmsa: remove unnecessary oom message

2021-06-09 Thread Zhen Lei
Fixes scripts/checkpatch.pl warning: WARNING: Possible unnecessary 'out of memory' message Remove it can help us save a bit of memory. Signed-off-by: Zhen Lei --- drivers/iommu/ipmmu-vmsa.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/iommu/ipmmu-vmsa.c b

[PATCH 1/1] iommu/arm-smmu: remove unnecessary oom message

2021-06-09 Thread Zhen Lei
Fixes scripts/checkpatch.pl warning: WARNING: Possible unnecessary 'out of memory' message Remove it can help us save a bit of memory. Signed-off-by: Zhen Lei --- drivers/iommu/arm/arm-smmu/arm-smmu.c | 8 ++-- 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/iommu/arm

[PATCH 1/1] iommu/vt-d: remove unnecessary oom message

2021-06-09 Thread Zhen Lei
Fixes scripts/checkpatch.pl warning: WARNING: Possible unnecessary 'out of memory' message Remove it can help us save a bit of memory. Signed-off-by: Zhen Lei --- drivers/iommu/intel/dmar.c | 2 -- drivers/iommu/intel/iommu.c | 6 +- 2 files changed, 1 insertion(+), 7 deletions(-) diff

[PATCH 1/1] dma-mapping: remove trailing spaces and tabs

2021-06-08 Thread Zhen Lei
Run the following command to find and remove the trailing spaces and tabs: find kernel/dma/ -type f | xargs sed -r -i 's/[ \t]+$//' Signed-off-by: Zhen Lei --- kernel/dma/coherent.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/kernel/dma/coherent.c b/kernel/dma

[PATCH v2 1/1] iommu: Clear a lot of spelling mistakes

2021-05-09 Thread Zhen Lei
All spelling mistakes are in the comments, no functional change. Signed-off-by: Zhen Lei --- drivers/iommu/amd/amd_iommu_types.h | 2 +- drivers/iommu/amd/init.c | 2 +- drivers/iommu/amd/iommu.c | 2 +- drivers/iommu/arm/arm-smmu/arm-smmu.c | 2 +- drivers/iommu

[PATCH v2 0/1] iommu: Clear a lot of spelling mistakes

2021-05-09 Thread Zhen Lei
v1 --> v2: 1. Merge into one patch 2. Add a new fix "appropriatley --> appropriately" in iommu.c, discovered by John Garry Zhen Lei (1): iommu: Clear a lot of spelling mistakes drivers/iommu/amd/amd_iommu_types.h | 2 +- drivers/iommu/amd/init.c | 2 +- d

[PATCH 1/1] iommu: Delete a duplicate check in iommu_change_dev_def_domain()

2021-05-13 Thread Zhen Lei
Function iommu_group_store_type() is the only caller of the static function iommu_change_dev_def_domain() and has performed "if (WARN_ON(!group))" detection before calling it. So the one here is redundant. Signed-off-by: Zhen Lei --- drivers/iommu/iommu.c | 3 --- 1 file changed, 3

[PATCH 1/1] iommu/arm-smmu-v3: Decrease the queue size of evtq and priq

2021-05-31 Thread Zhen Lei
MMU driver is the consumer. Instead, memory resources are wasted. Therefore, the queue size of evtq and priq is restored to the original setting, one page. Fixes: d25f6ead162e ("iommu/arm-smmu-v3: Increase maximum size of queues") Signed-off-by: Zhen Lei --- drivers/iommu/arm/arm-smmu-

[PATCH RFC 0/8] iommu/arm-smmu-v3: add support for ECMDQ register mode

2021-06-26 Thread Zhen Lei
ithout competition with other cores to replace arm_smmu_cmdq_issue_cmdlist() when a core can have an ECMDQ. I'm guessing it might get better performance results. Because the EMU is too slow, it will take a while before the relevant data is available. Zhen Lei (8): iommu/arm-smmu-v3: Use command

[PATCH RFC 6/8] iommu/arm-smmu-v3: Ensure that a set of associated commands are inserted in the same ECMDQ

2021-06-26 Thread Zhen Lei
, after the SYNC execution is complete, the execution of all preceded commands can not be ensured. Prevent the process that performs a set of associated commands insertion from being migrated to other cores ensures that all commands are inserted into the same ECMDQ. Signed-off-by: Zhen Lei

[PATCH RFC 1/8] iommu/arm-smmu-v3: Use command queue batching helpers to improve performance

2021-06-26 Thread Zhen Lei
ssible can reduce the number of times the mutex contention participates, thereby improving the overall performance. At least it reduces the number of calls to function arm_smmu_cmdq_issue_cmdlist(). Therefore, use command queue batching helpers to insert multiple commands at a time. Signed-off-by

[PATCH RFC 3/8] iommu/arm-smmu-v3: Add and use static helper function arm_smmu_get_cmdq()

2021-06-26 Thread Zhen Lei
ot;>cmdq" or ">cmdq.q" directly. To support ECMDQ, they need to call the newly added function arm_smmu_get_cmdq() instead. Note that normal CMDQ is still required until ECMDQ is available. Signed-off-by: Zhen Lei --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 22

[PATCH RFC 8/8] iommu/arm-smmu-v3: Add support for less than one ECMDQ per core

2021-06-26 Thread Zhen Lei
may result in better command filling and insertion performance. The current ECMDQ implementation reuses the command insertion function arm_smmu_cmdq_issue_cmdlist() of the normal CMDQ. This function already supports multiple cores concurrent insertion commands. Signed-off-by: Zhen Lei --- drivers

[PATCH RFC 4/8] iommu/arm-smmu-v3: Extract reusable function __arm_smmu_cmdq_skip_err()

2021-06-26 Thread Zhen Lei
as the CMDQ error handling. This common processing part is extracted as a new function __arm_smmu_cmdq_skip_err(). Signed-off-by: Zhen Lei --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu

[PATCH RFC 5/8] iommu/arm-smmu-v3: Add support for ECMDQ register mode

2021-06-26 Thread Zhen Lei
operation to bit 'ERRACK' during command insertion. Signed-off-by: Zhen Lei --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 210 +++- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 36 2 files changed, 245 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/arm/arm-smmu-v3

[PATCH RFC 2/8] iommu/arm-smmu-v3: Add and use static helper function arm_smmu_cmdq_issue_cmd_with_sync()

2021-06-26 Thread Zhen Lei
at a time. Signed-off-by: Zhen Lei --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 33 + 1 file changed, 21 insertions(+), 12 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 2433d3c29b49ff2..a5361

[PATCH RFC 7/8] iommu/arm-smmu-v3: Add arm_smmu_ecmdq_issue_cmdlist() for non-shared ECMDQ

2021-06-26 Thread Zhen Lei
arm_smmu_ecmdq_issue_cmdlist(). Signed-off-by: Zhen Lei --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 85 + drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 1 + 2 files changed, 86 insertions(+) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3

[PATCH v3 3/3] iommu/arm-smmu-v3: Reserving the entire SMMU register space

2021-01-27 Thread Zhen Lei
SMMU_IDR6.CMDQ_CONTROL_PAGE_LOG2NUMQ. Processing its resource reservation to avoid resource conflict with PMCG is a bit more complicated. Therefore, the resources of the PMCG are not reserved, and the entire SMMU resources are reserved. Suggested-by: Robin Murphy Signed-off-by: Zhen Lei --- drivers/iom

[PATCH v3 1/3] perf/smmuv3: Don't reserve the PMCG register spaces

2021-01-27 Thread Zhen Lei
register space. When both the SMMU and PMCG drivers reserve their own resources, a resource conflict occurs. To avoid this conflict, don't reserve the PMCG regions. Suggested-by: Robin Murphy Signed-off-by: Zhen Lei --- drivers/perf/arm_smmuv3_pmu.c | 27 +-- 1 file

[PATCH v3 2/3] perf/smmuv3: Add a MODULE_SOFTDEP() to indicate dependency on SMMU

2021-01-27 Thread Zhen Lei
The MODULE_SOFTDEP() gives user space a hint of the loading sequence. And when command "modprobe arm_smmuv3_pmu" is executed, the arm_smmu_v3.ko is automatically loaded in advance. Signed-off-by: Zhen Lei --- drivers/perf/arm_smmuv3_pmu.c | 1 + 1 file changed, 1 insertion(+)

[PATCH v3 0/3] perf/smmuv3: Don't reserve the PMCG register spaces

2021-01-27 Thread Zhen Lei
proper solution is: If the PMCG register resources are located in the 64KB Page0 of the SMMU, the PMCG driver does not reserve the conflict resources when the SMMUv3 driver has reserved the conflict resources before. Instead, the PMCG driver only performs devm_ioremap() to ensure that it can work

[PATCH 1/1] iommu/arm-smmu-v3: add bit field SFM into GERROR_ERR_MASK

2021-03-24 Thread Zhen Lei
: Add initial driver support for ARM SMMUv3 devices") Reported-by: Rui Zhu Signed-off-by: Zhen Lei --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/a

[PATCH 0/8] iommu: fix a couple of spelling mistakes detected by codespell tool

2021-03-26 Thread Zhen Lei
This detection and correction covers the entire driver/iommu directory. Zhen Lei (8): iommu/pamu: fix a couple of spelling mistakes iommu/omap: Fix spelling mistake "alignement" -> "alignment" iommu/mediatek: Fix spelling mistake "phyiscal" -> "physi

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