Re: [PATCH] iommu/vt-d: Add Scalable Mode fault information

2019-09-11 Thread j...@8bytes.org 
On Tue, Sep 10, 2019 at 05:30:09PM +, Mehta, Sohil wrote:
> On Tue, 2019-09-10 at 10:08 +0200, Joerg Roedel wrote:
> > > + "Unknown", "Unknown", "Unknown", "Unknown", "Unknown",
> > "Unknown", "Unknown", /* 0x49-0x4F */
> > 
> > Maybe add the number (0x49-0x4f) to the respecting "Unknown" fields?
> > If
> > we can't give a reason we should give the number for easier debugging
> > in
> > the future. Same for the "Unknown" fields below.
> 
> I believe a fault number is always printed in dmar_fault_do_one() even
> if the reason is unknown.
> 
> DMAR: [DMA Write] Request device [00:02.0] fault addr 108a000 [fault
> reason 23] Unknown

Right, applied the patch, thanks.
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Re: [PATCH] iommu/vt-d: Add Scalable Mode fault information

2019-09-10 Thread Mehta, Sohil 
On Tue, 2019-09-10 at 10:08 +0200, Joerg Roedel wrote:
> > + "Unknown", "Unknown", "Unknown", "Unknown", "Unknown",
> "Unknown", "Unknown", /* 0x49-0x4F */
> 
> Maybe add the number (0x49-0x4f) to the respecting "Unknown" fields?
> If
> we can't give a reason we should give the number for easier debugging
> in
> the future. Same for the "Unknown" fields below.

I believe a fault number is always printed in dmar_fault_do_one() even
if the reason is unknown.

DMAR: [DMA Write] Request device [00:02.0] fault addr 108a000 [fault
reason 23] Unknown

--Sohil

Re: [PATCH] iommu/vt-d: Add Scalable Mode fault information

2019-09-10 Thread Joerg Roedel 
On Fri, Sep 06, 2019 at 11:14:02AM -0700, Kyung Min Park wrote:
> Intel VT-d specification revision 3 added support for Scalable Mode
> Translation for DMA remapping. Add the Scalable Mode fault reasons to
> show detailed fault reasons when the translation fault happens.
> 
> Link: 
> https://software.intel.com/sites/default/files/managed/c5/15/vt-directed-io-spec.pdf
> 
> Reviewed-by: Sohil Mehta 
> Signed-off-by: Kyung Min Park 
> ---
>  drivers/iommu/dmar.c| 77 
> ++---
>  include/linux/intel-iommu.h |  2 ++
>  2 files changed, 75 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/iommu/dmar.c b/drivers/iommu/dmar.c
> index 1207e05..5cb63c5 100644
> --- a/drivers/iommu/dmar.c
> +++ b/drivers/iommu/dmar.c
> @@ -1532,6 +1532,64 @@ static const char *dma_remap_fault_reasons[] =
>   "PCE for translation request specifies blocking",
>  };
>  
> +static const char * const dma_remap_sm_fault_reasons[] = {
> + "SM: Invalid Root Table Address",
> + "SM: TTM 0 for request with PASID",
> + "SM: TTM 0 for page group request",
> + "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", /* 0x33-0x37 */
> + "SM: Error attempting to access Root Entry",
> + "SM: Present bit in Root Entry is clear",
> + "SM: Non-zero reserved field set in Root Entry",
> + "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", /* 0x3B-0x3F */
> + "SM: Error attempting to access Context Entry",
> + "SM: Present bit in Context Entry is clear",
> + "SM: Non-zero reserved field set in the Context Entry",
> + "SM: Invalid Context Entry",
> + "SM: DTE field in Context Entry is clear",
> + "SM: PASID Enable field in Context Entry is clear",
> + "SM: PASID is larger than the max in Context Entry",
> + "SM: PRE field in Context-Entry is clear",
> + "SM: RID_PASID field error in Context-Entry",
> + "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", 
> "Unknown", /* 0x49-0x4F */

Maybe add the number (0x49-0x4f) to the respecting "Unknown" fields? If
we can't give a reason we should give the number for easier debugging in
the future. Same for the "Unknown" fields below.

Other than that, the patch looks good.

Regards,

Joerg
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[PATCH] iommu/vt-d: Add Scalable Mode fault information

2019-09-06 Thread Kyung Min Park 
Intel VT-d specification revision 3 added support for Scalable Mode
Translation for DMA remapping. Add the Scalable Mode fault reasons to
show detailed fault reasons when the translation fault happens.

Link: 
https://software.intel.com/sites/default/files/managed/c5/15/vt-directed-io-spec.pdf

Reviewed-by: Sohil Mehta 
Signed-off-by: Kyung Min Park 
---
 drivers/iommu/dmar.c| 77 ++---
 include/linux/intel-iommu.h |  2 ++
 2 files changed, 75 insertions(+), 4 deletions(-)

diff --git a/drivers/iommu/dmar.c b/drivers/iommu/dmar.c
index 1207e05..5cb63c5 100644
--- a/drivers/iommu/dmar.c
+++ b/drivers/iommu/dmar.c
@@ -1532,6 +1532,64 @@ static const char *dma_remap_fault_reasons[] =
"PCE for translation request specifies blocking",
 };
 
+static const char * const dma_remap_sm_fault_reasons[] = {
+   "SM: Invalid Root Table Address",
+   "SM: TTM 0 for request with PASID",
+   "SM: TTM 0 for page group request",
+   "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", /* 0x33-0x37 */
+   "SM: Error attempting to access Root Entry",
+   "SM: Present bit in Root Entry is clear",
+   "SM: Non-zero reserved field set in Root Entry",
+   "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", /* 0x3B-0x3F */
+   "SM: Error attempting to access Context Entry",
+   "SM: Present bit in Context Entry is clear",
+   "SM: Non-zero reserved field set in the Context Entry",
+   "SM: Invalid Context Entry",
+   "SM: DTE field in Context Entry is clear",
+   "SM: PASID Enable field in Context Entry is clear",
+   "SM: PASID is larger than the max in Context Entry",
+   "SM: PRE field in Context-Entry is clear",
+   "SM: RID_PASID field error in Context-Entry",
+   "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", 
"Unknown", /* 0x49-0x4F */
+   "SM: Error attempting to access the PASID Directory Entry",
+   "SM: Present bit in Directory Entry is clear",
+   "SM: Non-zero reserved field set in PASID Directory Entry",
+   "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", /* 0x53-0x57 */
+   "SM: Error attempting to access PASID Table Entry",
+   "SM: Present bit in PASID Table Entry is clear",
+   "SM: Non-zero reserved field set in PASID Table Entry",
+   "SM: Invalid Scalable-Mode PASID Table Entry",
+   "SM: ERE field is clear in PASID Table Entry",
+   "SM: SRE field is clear in PASID Table Entry",
+   "Unknown", "Unknown",/* 0x5E-0x5F */
+   "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", 
"Unknown", "Unknown", /* 0x60-0x67 */
+   "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", 
"Unknown", "Unknown", /* 0x68-0x6F */
+   "SM: Error attempting to access first-level paging entry",
+   "SM: Present bit in first-level paging entry is clear",
+   "SM: Non-zero reserved field set in first-level paging entry",
+   "SM: Error attempting to access FL-PML4 entry",
+   "SM: First-level entry address beyond MGAW in Nested translation",
+   "SM: Read permission error in FL-PML4 entry in Nested translation",
+   "SM: Read permission error in first-level paging entry in Nested 
translation",
+   "SM: Write permission error in first-level paging entry in Nested 
translation",
+   "SM: Error attempting to access second-level paging entry",
+   "SM: Read/Write permission error in second-level paging entry",
+   "SM: Non-zero reserved field set in second-level paging entry",
+   "SM: Invalid second-level page table pointer",
+   "SM: A/D bit update needed in second-level entry when set up in no 
snoop",
+   "Unknown", "Unknown", "Unknown", /* 0x7D-0x7F */
+   "SM: Address in first-level translation is not canonical",
+   "SM: U/S set 0 for first-level translation with user privilege",
+   "SM: No execute permission for request with PASID and ER=1",
+   "SM: Address beyond the DMA hardware max",
+   "SM: Second-level entry address beyond the max",
+   "SM: No write permission for Write/AtomicOp request",
+   "SM: No read permission for Read/AtomicOp request",
+   "SM: Invalid address-interrupt address",
+   "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", 
"Unknown", "Unknown", /* 0x88-0x8F */
+   "SM: A/D bit update needed in first-level entry when set up in no 
snoop",
+};
+
 static const char *irq_remap_fault_reasons[] =
 {
"Detected reserved fields in the decoded interrupt-remapped request",
@@ -1549,6 +1607,10 @@ static const char *dmar_get_fault_reason(u8 
fault_reason, int *fault_type)
ARRAY_SIZE(irq_remap_fault_reasons))) {
*fault_type = INTR_REMAP;
return irq_remap_fault_reasons[fault_reason - 0x20];
+   } else if (fault_reason >= 0x30 && (fault_reason - 0x30 <
+