>> The Tegra Next Generation SOC uses arm-smmu-v3, but it doesn't have support
>> for BTM.
>> Do you have plan to get your earlier patch to handle invalidate
>> notifications into upstream sometime soon?
>> Can the dependency on BTM be relaxed with the patch?
>>
>> PATCH v9 13/13]
On Wed, Dec 09, 2020 at 07:49:09PM +, Krishna Reddy wrote:
> Hi Jean,
> > > Why is BTM mandated for SVA? I couldn't find this requirement in
> > > SMMU spec (Sorry if I missed it or this got discussed earlier). But
> > > if performance is the
> > only concern here,
> > > is it better just to
> > The Tegra Next Generation SOC uses arm-smmu-v3, but it doesn't have support
> > for BTM.
> > Do you have plan to get your earlier patch to handle invalidate
> > notifications into upstream sometime soon?
>Is that a limitation of the SMMU implementation, the interconnect or the
On Wed, Dec 09, 2020 at 07:49:09PM +, Krishna Reddy wrote:
> > > Why is BTM mandated for SVA? I couldn't find this requirement in
> > > SMMU spec (Sorry if I missed it or this got discussed earlier). But
> > > if performance is the
> > only concern here,
> > > is it better just to allow it
Hi Jean,
> > Why is BTM mandated for SVA? I couldn't find this requirement in
> > SMMU spec (Sorry if I missed it or this got discussed earlier). But
> > if performance is the
> only concern here,
> > is it better just to allow it with a warning rather than limiting
> > SMMUs without
> BTM?
>
>
.com; catalin.mari...@arm.com;
> Suzuki K Poulose ; robin.mur...@arm.com;
> zhangfei@linaro.org; w...@kernel.org
> Subject: Re: [PATCH v10 10/13] iommu/arm-smmu-v3: Check for SVA features
>
> Hi Shameer,
>
> On Mon, Sep 21, 2020 at 08:59:39AM +, Shameer
Hi Shameer,
On Mon, Sep 21, 2020 at 08:59:39AM +, Shameerali Kolothum Thodi wrote:
> > +bool arm_smmu_sva_supported(struct arm_smmu_device *smmu)
> > +{
> > + unsigned long reg, fld;
> > + unsigned long oas;
> > + unsigned long asid_bits;
> > + u32 feat_mask = ARM_SMMU_FEAT_BTM |
> >
fenghua...@intel.com; Jean-Philippe Brucker ;
> catalin.mari...@arm.com; Suzuki K Poulose ;
> robin.mur...@arm.com; zhangfei@linaro.org; w...@kernel.org
> Subject: [PATCH v10 10/13] iommu/arm-smmu-v3: Check for SVA features
>
> Aggregate all sanity-checks for sharing CPU page t
Aggregate all sanity-checks for sharing CPU page tables with the SMMU
under a single ARM_SMMU_FEAT_SVA bit. For PCIe SVA, users also need to
check FEAT_ATS and FEAT_PRI. For platform SVA, they will have to check
FEAT_STALLS.
Introduce ARM_SMMU_FEAT_BTM (Broadcast TLB Maintenance), but don't