Re: [RFC Design Doc v3] Enable Shared Virtual Memory feature in pass-through scenarios

2017-03-01 Thread Raj, Ashok
On Wed, Mar 01, 2017 at 04:09:38PM -0500, Konrad Rzeszutek Wilk wrote:
> .snip..
> > 
> > No. SVM is purely about sharing CPU address space with device. Command
> > submission is still through kernel driver which controls rings (with SVM 
> > then
> > you can put VA into those commands). There are other vendor specific 
> > features to enable direct user space submission which is orthogonal to SVM.
> 
> Apologies for my ignorance but how is this beneficial? As in
> currently you would put in bus addresses on the ring, but now you
> can put VA addresses.
> 
> The obvious benefit I see is that you omit the DMA ops which means there is
> less of 'lookup' (VA->bus address) in software - but I would have thought this
> would be negligible performance impact? And now the IOMMU alongside with
> the CPU would do this lookup.
> 
> Or are there some other improvements in this?
Other benefits include,

- Application can simply pass its pointers to the SVM capable devices. which
  means no memory registration overhead to get IO Virtual Addresses. 
- No need to pin memory for DMA, since the devices can handle faults and
  can request pages to be paged-in on demand.
> 
> > 
> > Thanks
> > Kevin
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Re: [RFC Design Doc v3] Enable Shared Virtual Memory feature in pass-through scenarios

2017-03-01 Thread Konrad Rzeszutek Wilk
.snip..
> > > Shared Virtual Memory feature in pass-through scenarios is actually SVM
> > > virtualization. It is to let application programs(running in guest)share 
> > > their
> > > virtual address with assigned device(e.g. graphics processors or 
> > > accelerators).
> > 
> > I think I am missing something obvious, but the current way that DRM
> > works is that the kernel sets up its VA addresses for the GPU and it uses
> > that for its ring. It also setups an user level mapping for the GPU if the
> > application (Xorg) really wants it - but most of the time the kernel is
> > in charge of poking at the ring, and the memory that is shared with the
> > Xorg is normal RAM allocated via alloc_pages (see
> > drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
> > and drivers/gpu/drm/ttm/ttm_page_alloc.c).
> > 
> > So are talking about the guest applications having access to the
> > ring of the GPU?
> 
> No. SVM is purely about sharing CPU address space with device. Command
> submission is still through kernel driver which controls rings (with SVM then
> you can put VA into those commands). There are other vendor specific 
> features to enable direct user space submission which is orthogonal to SVM.

Apologies for my ignorance but how is this beneficial? As in
currently you would put in bus addresses on the ring, but now you
can put VA addresses.

The obvious benefit I see is that you omit the DMA ops which means there is
less of 'lookup' (VA->bus address) in software - but I would have thought this
would be negligible performance impact? And now the IOMMU alongside with
the CPU would do this lookup.

Or are there some other improvements in this?

> 
> Thanks
> Kevin
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RE: [RFC Design Doc v3] Enable Shared Virtual Memory feature in pass-through scenarios

2017-02-28 Thread Tian, Kevin
> From: Konrad Rzeszutek Wilk [mailto:konrad.w...@oracle.com]
> Sent: Wednesday, March 01, 2017 6:07 AM
> 
> On Wed, Nov 30, 2016 at 08:49:24AM +, Liu, Yi L wrote:
> > What's changed from v2:
> > a) Detailed feature description
> > b) refine description in "Address translation in virtual SVM"
> > b) "Terms" is added
> >
> > Content
> > ===
> > 1. Feature description
> > 2. Why use it?
> > 3. How to enable it
> > 4. How to test
> > 5. Terms
> >
> > Details
> > ===
> > 1. Feature description
> > Shared virtual memory(SVM) is to let application program share its virtual
> > address with SVM capable devices.
> >
> > Shared virtual memory details:
> > a) SVM feature requires ATS/PRQ/PASID support on both device side and
> > IOMMU side.
> > b) SVM capable devices could send DMA requests with PASID, the address
> > in the request would be a virtual address within a program's virtual address
> > space.
> > c) IOMMU would use first level page table to translate the address in the
> > request.
> > d) First level page table is a HVA->HPA mapping on bare metal.
> >
> > Shared Virtual Memory feature in pass-through scenarios is actually SVM
> > virtualization. It is to let application programs(running in guest)share 
> > their
> > virtual address with assigned device(e.g. graphics processors or 
> > accelerators).
> 
> I think I am missing something obvious, but the current way that DRM
> works is that the kernel sets up its VA addresses for the GPU and it uses
> that for its ring. It also setups an user level mapping for the GPU if the
> application (Xorg) really wants it - but most of the time the kernel is
> in charge of poking at the ring, and the memory that is shared with the
> Xorg is normal RAM allocated via alloc_pages (see
> drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
> and drivers/gpu/drm/ttm/ttm_page_alloc.c).
> 
> So are talking about the guest applications having access to the
> ring of the GPU?

No. SVM is purely about sharing CPU address space with device. Command
submission is still through kernel driver which controls rings (with SVM then
you can put VA into those commands). There are other vendor specific 
features to enable direct user space submission which is orthogonal to SVM.

Thanks
Kevin
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Re: [RFC Design Doc v3] Enable Shared Virtual Memory feature in pass-through scenarios

2017-02-28 Thread Konrad Rzeszutek Wilk
On Wed, Nov 30, 2016 at 08:49:24AM +, Liu, Yi L wrote:
> What's changed from v2:
> a) Detailed feature description
> b) refine description in "Address translation in virtual SVM"
> b) "Terms" is added
> 
> Content
> ===
> 1. Feature description
> 2. Why use it?
> 3. How to enable it
> 4. How to test
> 5. Terms
> 
> Details
> ===
> 1. Feature description
> Shared virtual memory(SVM) is to let application program share its virtual
> address with SVM capable devices. 
> 
> Shared virtual memory details:
> a) SVM feature requires ATS/PRQ/PASID support on both device side and
> IOMMU side.
> b) SVM capable devices could send DMA requests with PASID, the address
> in the request would be a virtual address within a program's virtual address
> space.
> c) IOMMU would use first level page table to translate the address in the
> request.
> d) First level page table is a HVA->HPA mapping on bare metal.
> 
> Shared Virtual Memory feature in pass-through scenarios is actually SVM
> virtualization. It is to let application programs(running in guest)share their
> virtual address with assigned device(e.g. graphics processors or 
> accelerators).

I think I am missing something obvious, but the current way that DRM
works is that the kernel sets up its VA addresses for the GPU and it uses
that for its ring. It also setups an user level mapping for the GPU if the
application (Xorg) really wants it - but most of the time the kernel is
in charge of poking at the ring, and the memory that is shared with the
Xorg is normal RAM allocated via alloc_pages (see 
drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
and drivers/gpu/drm/ttm/ttm_page_alloc.c).

So are talking about the guest applications having access to the 
ring of the GPU?

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