Hi Jean,

On 8/21/20 3:15 PM, Jean-Philippe Brucker wrote:
> Add struct definitions for describing endpoints managed by the
> virtio-iommu. When VIRTIO_IOMMU_F_TOPOLOGY is offered, an array of
> virtio_iommu_topo_* structures in config space describes the endpoints,
> identified either by their PCI BDF or their physical MMIO address.
> 
> Signed-off-by: Jean-Philippe Brucker <jean-phili...@linaro.org>
Reviewed-by: Eric Auger <eric.au...@redhat.com>

Thanks

Eric

> ---
>  include/uapi/linux/virtio_iommu.h | 44 +++++++++++++++++++++++++++++++
>  1 file changed, 44 insertions(+)
> 
> diff --git a/include/uapi/linux/virtio_iommu.h 
> b/include/uapi/linux/virtio_iommu.h
> index 237e36a280cb..70cba30644d5 100644
> --- a/include/uapi/linux/virtio_iommu.h
> +++ b/include/uapi/linux/virtio_iommu.h
> @@ -16,6 +16,7 @@
>  #define VIRTIO_IOMMU_F_BYPASS                        3
>  #define VIRTIO_IOMMU_F_PROBE                 4
>  #define VIRTIO_IOMMU_F_MMIO                  5
> +#define VIRTIO_IOMMU_F_TOPOLOGY                      6
>  
>  struct virtio_iommu_range_64 {
>       __le64                                  start;
> @@ -27,6 +28,17 @@ struct virtio_iommu_range_32 {
>       __le32                                  end;
>  };
>  
> +struct virtio_iommu_topo_config {
> +     /* Number of topology description structures */
> +     __le16                                  count;
> +     /*
> +      * Offset to the first topology description structure
> +      * (virtio_iommu_topo_*) from the start of the virtio_iommu config
> +      * space. Aligned on 8 bytes.
> +      */
> +     __le16                                  offset;
> +};
> +
>  struct virtio_iommu_config {
>       /* Supported page sizes */
>       __le64                                  page_size_mask;
> @@ -36,6 +48,38 @@ struct virtio_iommu_config {
>       struct virtio_iommu_range_32            domain_range;
>       /* Probe buffer size */
>       __le32                                  probe_size;
> +     struct virtio_iommu_topo_config         topo_config;
> +};
> +
> +#define VIRTIO_IOMMU_TOPO_PCI_RANGE          0x1
> +#define VIRTIO_IOMMU_TOPO_MMIO                       0x2
> +
> +struct virtio_iommu_topo_pci_range {
> +     /* VIRTIO_IOMMU_TOPO_PCI_RANGE */
> +     __u8                                    type;
> +     __u8                                    reserved;
> +     /* Length of this structure */
> +     __le16                                  length;
> +     /* First endpoint ID in the range */
> +     __le32                                  endpoint_start;
> +     /* PCI domain number */
> +     __le16                                  segment;
> +     /* PCI Bus:Device.Function range */
> +     __le16                                  bdf_start;
> +     __le16                                  bdf_end;
> +     __le16                                  padding;
> +};
> +
> +struct virtio_iommu_topo_mmio {
> +     /* VIRTIO_IOMMU_TOPO_MMIO */
> +     __u8                                    type;
> +     __u8                                    reserved;
> +     /* Length of this structure */
> +     __le16                                  length;
> +     /* Endpoint ID */
> +     __le32                                  endpoint;
> +     /* Address of the first MMIO region */
> +     __le64                                  address;
>  };
>  
>  /* Request types */
> 

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