To make it absolutely clear using an example: even with it
is still that the two fields are independent of each other.
This particular combination means “apply BART 1” to “Flexible-Algo 200”, where
“Flexible-Algo 200” could be “exclude red links”, while “BART 1” could be “skip
BIER incapable
Jeffrey,
To make it absolutely clear using an example: even with it
is still that the two fields are independent of each other.
This particular combination means “apply BART 1” to “Flexible-Algo 200”, where
“Flexible-Algo 200” could be “exclude red links”, while “BART 1” could be “skip
BIER
First, I greatly appreciate the rapid education I have gotten on why the
different aspects of this are important.
Let us explore some details on the plan for an 8-bit BART and an 8-bit BARM
that are independent. Jeffrey,
I really appreciate your bringing this option to the list. It simplifies
Hi Jeffrey,
Yes, I was rushing & may have mangled the terminology in the final bit.
The routing layer 8-bit field can be from the IGP Algorithm registry.
Thanks for catching it & for your willingness to write this up more clearly!
Regards,
Aka
On Feb 21, 2018 10:05 AM, "Jeffrey (Zhaohui)
Hi Alia,
Thanks for articulating it very clearly, and bring out the issue of having a
clear specification on the interaction.
I need one clarification from you though – is it possible that the you actually
meant BART when you said BARM, and vice versa, in the following?
--
Ice: No, BART is not being slaved here. If BARM is 0, BART is all yours.
Zzh> BART is BIER’s no matter what BARM is; not only when BARM is 0.
Ice: Yes, sorry, I agree, BART is always BIER and BARM is always IGP.
Ice: What I meant to clarify is that BART is not slaved to BARM (IGP) and v.s.,
Hi Ice,
From: IJsbrand Wijnands (iwijnand) [mailto:iwijn...@cisco.com]
Sent: Wednesday, February 21, 2018 8:16 AM
To: Tony Przygienda
Cc: IJsbrand Wijnands ; Jeffrey (Zhaohui) Zhang
; ext-arkadiy.gu...@thomsonreuters.com
Inline.
Future specifications may specify BART values that change the
interpretation of the BARM octet. Those specifications must handle backwards
ICE: This creates a potential dependency which I think we should avoid. I think
there are possible use-cases where the combination of the two