Re: GIC Interrupts on AXI Gpio

2018-05-17 Thread Jan Kiszka
On 2018-05-17 12:25, iallende wrote:
> Hi,
> 
> I am using ZynqMP with the FPGA. I have designed an AXI Gpio in the FPGA and 
> I am able to control it through non-root cell Linux. Nevertheless, I want to 
> assign an IRQ to the Input GPIO. However, I do not know how pin_base and 
> pin_bitmap works in GIC configuration. The AXI Gpio DTS part is:
> 
>   axi_gpio_0: gpio@a000 {
>   #gpio-cells = <2>;
>   #interrupt-cells = <2>;
>   compatible = "xlnx,xps-gpio-1.00.a";
>   gpio-controller ;
>   interrupt-controller ;
>   interrupt-parent = <>;
>   interrupts = <0 89 4>;

The second cell holds the SPI number of this device. SPI is GIC
interrupt number minus 32. So you need to permit the cell to use GIC
interrupt 121.

>   reg = <0x0 0xa000 0x0 0x1000>;
>   xlnx,all-inputs = <0x0>;
>   xlnx,all-inputs-2 = <0x0>;
>   xlnx,all-outputs = <0x0>;
>   xlnx,all-outputs-2 = <0x0>;
>   xlnx,dout-default = <0x>;
>   xlnx,dout-default-2 = <0x>;
>   xlnx,gpio-width = <0x2>;
>   xlnx,gpio2-width = <0x20>;
>   xlnx,interrupt-present = <0x1>;
>   xlnx,is-dual = <0x0>;
>   xlnx,tri-default = <0x>;
>   xlnx,tri-default-2 = <0x>; 
>   };
> 
> How do I need to assign the IRQ in the GIC conf. The default GIC conf is:
> .irqchips = {
> /* GIC */ {
> .address = 0xf901,
> .pin_base = 32,

An entry in the irqchips list manages GIC interrupt number from this
base onward, up to 32 * 4 = 128 lines.

> .pin_bitmap = {
> 1 << (54 - 32),
> 0,
> 0,

So you need a "(1 << (121 - 96))" in this line to grant access to GIC
IRQ 121.

> (1 << (140 - 128)) | (1 << (142 - 128))
> },
> },
> },
> 
> 
> PD: I do not know why, but in order to put the GPIOs working I had to delete 
> the ".pci_devices" data from the root cell conf file. 

Your config file might have been inconsistent. Any compiler warnings?
Check struct sizes an declared array sizes again.

Jan

-- 
Siemens AG, Corporate Technology, CT RDA IOT SES-DE
Corporate Competence Center Embedded Linux

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Re: Inter-cell communication on BPM1

2018-05-17 Thread Assila Belhouichet

Hi Hennig,

i started over with the patches you provides from this link :

https://github.com/henning-schild-work/jailhouse/commits/henning/staging

and now i get this error when i execute : jailhouse enable bananapi.cell 

[ 1299.460472] jailhouse: mem_region_request failed for hypervisor memory.
[ 1299.467431] jailhouse: Did you reserve the memory with "memmap=" or "mem="?
JAILHOUSE_ENABLE: Invalid argument


please can you help me to solve this problem?

Best regards,
Assila

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GIC Interrupts on AXI Gpio

2018-05-17 Thread iallende
Hi,

I am using ZynqMP with the FPGA. I have designed an AXI Gpio in the FPGA and I 
am able to control it through non-root cell Linux. Nevertheless, I want to 
assign an IRQ to the Input GPIO. However, I do not know how pin_base and 
pin_bitmap works in GIC configuration. The AXI Gpio DTS part is:

axi_gpio_0: gpio@a000 {
#gpio-cells = <2>;
#interrupt-cells = <2>;
compatible = "xlnx,xps-gpio-1.00.a";
gpio-controller ;
interrupt-controller ;
interrupt-parent = <>;
interrupts = <0 89 4>;
reg = <0x0 0xa000 0x0 0x1000>;
xlnx,all-inputs = <0x0>;
xlnx,all-inputs-2 = <0x0>;
xlnx,all-outputs = <0x0>;
xlnx,all-outputs-2 = <0x0>;
xlnx,dout-default = <0x>;
xlnx,dout-default-2 = <0x>;
xlnx,gpio-width = <0x2>;
xlnx,gpio2-width = <0x20>;
xlnx,interrupt-present = <0x1>;
xlnx,is-dual = <0x0>;
xlnx,tri-default = <0x>;
xlnx,tri-default-2 = <0x>; 
};

How do I need to assign the IRQ in the GIC conf. The default GIC conf is:
.irqchips = {
/* GIC */ {
.address = 0xf901,
.pin_base = 32,
.pin_bitmap = {
1 << (54 - 32),
0,
0,
(1 << (140 - 128)) | (1 << (142 - 128))
},
},
},


PD: I do not know why, but in order to put the GPIOs working I had to delete 
the ".pci_devices" data from the root cell conf file. 

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[PATCH] Documentation: Step-by-step instructions on how to setup Jailhouse on ZCU102 based on Xilinx ZynqMP Ultrascale+

2018-05-17 Thread Imanol Allende
Signed-off-by: Imanol Allende 
---
 Documentation/setup-on-zynqmp-zcu102.md | 177 
 1 file changed, 177 insertions(+)
 create mode 100644 Documentation/setup-on-zynqmp-zcu102.md

diff --git a/Documentation/setup-on-zynqmp-zcu102.md 
b/Documentation/setup-on-zynqmp-zcu102.md
new file mode 100644
index 000..8c286b9
--- /dev/null
+++ b/Documentation/setup-on-zynqmp-zcu102.md
@@ -0,0 +1,177 @@
+Setup on ZCU102 ZynqMP Ultrascale+
+
+The ZCU102 target is a Xilinx target based on ZynqMP Ultrascale+. The SoC is a 
quad-core Cortex-A53 and a dual-core R5 real-time processor. Further 
information can be found on 
https://www.xilinx.com/products/boards-and-kits/ek-u1-zcu102-g.html
+
+The Linux Image which runs Jailhouse has been built with Petalinux 2017.4. 
Petalinux uses linux-xlnx repository, and in this case it uses the 
xilinx-v2017.4 one, which is based on 4.9 kernel.
+
+
+Image build
+---
+In order to build the Linux image with Petalinux it is necessary to set all 
the environmental variables. 
+
+$ source /opt/pkg/settings.sh
+
+Once petalinux environments are set, the Petalinux project is created with the 
name lnx_jailhouse. The bsp has to be downloaded.
+
+$ petalinux-create -t project --template zynqMP -s 
../xilinx-zcu102-v2017.4-final.bsp -n lnx_jailhouse
+
+The Linux project is configured by:
+
+$ petalinux-config 
+
+A menuconfig window is opened and just enable `Root filesystem type (SD card)`:
+
+Image Packaging Configuration--->Root filesystem type-->SD card
+
+Save project and exit. It will take some to time to configure the project. 
Once it has finished configuring, the Linux kenel needs to be configured 
enabling `CONFIG_OF_OVERLAY` and `CONFIG_KALLSYMS_ALL`
+
+$ petalinux-config -c kernel
+
+Once modified, save the changes and build the project.
+
+$ petalinux-build
+$ petalinux-package --boot --u-boot
+
+
+Jailhouse build
+---
+In the Jailhouse source directory, create a file include/jailhouse/config.h 
with the following lines:
+
+#define CONFIG_TRACE_ERROR 1
+#define CONFIG_ARM_GIC_V2  1
+#define CONFIG_MACH_ZYNQMP_ZCU102  1
+
+After that, it is possible to build the project. It is necessary to set the 
variables `ARCH=` with arm64, `KDIR=` with the kernel directory inside the 
Petalinux project, `CROSS_COMPILE=` with the compiler and `DESTDIR=` with the 
rootfs directory.
+
+$ make ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- 
KDIR=../lnx_jailhouse/build/tmp/work/plnx_aarch64-xilinx-linux/linux-xlnx/4.9-xilinx-v2017.4+gitAUTOINC+b450e900fd-r0/linux-plnx_aarch64-standard-build/
 DESTDIR=/media/user/rootfs install
+
+This command will add the jailhouse module and its binary. 
+
+
+U-Boot
+--
+Jailhouse needs the Linux kernel boot parameters `mem=`  to be set in order to 
reserve memory for other cells.
+In this case we chose `mem=1536M`. This can be done through U-Boot:
+
+ZynqMP> setenv bootargs "earlycon clk_ignore_unused earlyprintk mem=1536M 
root=/dev/mmcblk0p2 rw rootwait"
+ZynqMP> setenv uenvcmd "fatload mmc 0 0x300 Image && fatload mmc 0 
0x2A0 system.dtb && booti 0x300 - 0x2A0"
+ZynqMP> setenv bootcmd "run uenvcmd"
+ZynqMP> saveenv
+ZynqMP> boot
+
+
+Testing Jailhouse GIC Demo
+---
+Copy the `configs/arm64/zynqmp-zcu102*.cell` to the rootfs. To test Jailhouse 
it is also interesting to copy `inmates/demos/arm64/gic-demo.bin`. This demo 
creates a periodic timer interrupt and calculates its jitter. Once Linux is 
running:
+
+# modprobe jailhouse
+[   24.309597] jailhouse: loading out-of-tree module taints kernel.
+
+# jailhouse enable zynqmp-zcu102.cell
+Initializing Jailhouse hypervisor v0.8 on CPU 2
+Code location: 0xc0200060
+Page pool usage after early setup: mem 33/993, remap 64/131072
+Initializing processors:
+ CPU 2... OK
+ CPU 0... OK
+ CPU 3... OK
+ CPU 1... OK
+Initializing unit: irqchip
+Initializing unit: PCI
+Adding virtual PCI device 00:00.0 to cell "ZynqMP-ZCU102"
+Adding virtual PCI device 00:01.0 to cell "ZynqMP-ZCU102"
+Page pool usage after late setup: mem 42/993, remap 69/131072
+Activating hypervisor
+[   39.844953] The Jailhouse is opening.
+
+# jailhouse cell create zynqmp-zcu102-gic-demo.cell
+[   55.351670] CPU3: shutdown
+[   55.354303] psci: CPU3 killed.
+Created cell "gic-demo"
+Page pool usage after cell creation: mem 56/993, remap 69/131072
+[   55.388029] Created Jailhouse cell "gic-demo"
+
+# jailhouse cell load 1 gic-demo.bin
+Cell "gic-demo" can be loaded
+# jailhouse cell start 1
+
+Second UART starts showing jitter data:
+
+Timer fired, jitter:   2212 ns, min:   2101 ns,