While technically doable, re-injecting NMIs from the hypervisor into a
guest is far from being simple. On Intel, we need to take care of
various cases where injection could have failed. On AMD, it even takes
single-stepping over the IRET instruction in order to get to the end of
an NMI-blocking window.
So, remove the to-do note, replacing it with a hint that NMI IPIs will
likely remain unsupported for a longer time. At this chance augment the
printed message with the target CPU of the IPI. This may help to
correlate the effect of a missing NMI or the reason for the injection
(stalled CPU).
Signed-off-by: Jan Kiszka <jan.kis...@siemens.com>
---
hypervisor/arch/x86/apic.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/hypervisor/arch/x86/apic.c b/hypervisor/arch/x86/apic.c
index a762569c..0de8ceb1 100644
--- a/hypervisor/arch/x86/apic.c
+++ b/hypervisor/arch/x86/apic.c
@@ -382,8 +382,11 @@ static void apic_send_ipi(unsigned int target_cpu_id, u32
orig_icr_hi,
switch (icr_lo & APIC_ICR_DLVR_MASK) {
case APIC_ICR_DLVR_NMI:
- /* TODO: must be sent via hypervisor */
- printk("Ignoring NMI IPI\n");
+ /*
+ * Correctly virtualized NMI injection is a non-trivial task,
+ * specifically on AMD. Therefore, we ignore NMI IPIs for now.
+ */
+ printk("Ignoring NMI IPI to CPU %d\n", target_cpu_id);
break;
case APIC_ICR_DLVR_INIT:
x86_send_init_sipi(target_cpu_id, X86_INIT, -1);
--
2.16.4
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