Access to those registers is not only trap-related.
Signed-off-by: Jan Kiszka <jan.kis...@siemens.com>
---
hypervisor/arch/arm/include/asm/processor.h | 6 ++++++
hypervisor/arch/arm/include/asm/traps.h | 6 ------
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/hypervisor/arch/arm/include/asm/processor.h
b/hypervisor/arch/arm/include/asm/processor.h
index 1dcc3da..2bf944a 100644
--- a/hypervisor/arch/arm/include/asm/processor.h
+++ b/hypervisor/arch/arm/include/asm/processor.h
@@ -182,6 +182,12 @@ struct registers {
#define wfi() asm volatile("wfi")
#define sev() asm volatile("sev")
+#define arm_read_banked_reg(reg, val) \
+ asm volatile ("mrs %0, " #reg "\n" : "=r" (val))
+
+#define arm_write_banked_reg(reg, val) \
+ asm volatile ("msr " #reg ", %0\n" : : "r" (val))
+
unsigned int smc(unsigned int r0, ...);
unsigned int hvc(unsigned int r0, ...);
diff --git a/hypervisor/arch/arm/include/asm/traps.h
b/hypervisor/arch/arm/include/asm/traps.h
index 53684c0..b6e1db4 100644
--- a/hypervisor/arch/arm/include/asm/traps.h
+++ b/hypervisor/arch/arm/include/asm/traps.h
@@ -33,12 +33,6 @@ struct trap_context {
typedef int (*trap_handler)(struct trap_context *ctx);
-#define arm_read_banked_reg(reg, val) \
- asm volatile ("mrs %0, " #reg "\n" : "=r" (val))
-
-#define arm_write_banked_reg(reg, val) \
- asm volatile ("msr " #reg ", %0\n" : : "r" (val))
-
#define _access_banked(reg, val, is_read) \
do { \
if (is_read) \
--
2.1.4
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