drm:gen8_irq_handler [i915]] *ERROR* Fault errors on pipe A 0x00000080

2018-10-08 Thread Ashok kumar
Hi, After enabling jailhouse I get the following message in syslog sudo tools/jailhouse enable configs/x86/sysconfig.cell *drm:gen8_irq_handler [i915]] *ERROR* Fault errors on pipe A0x0080* I am using the mother board details sudo dmidecode --string baseboard-product-name # SMBIOS

drm:gen8_irq_handler [i915]] *ERROR* Fault errors on pipe A

2018-10-08 Thread Ashok kumar
Hi, After enabling jailhouse I get the following message in syslog sudo tools/jailhouse enable configs/x86/sysconfig.cell drm:gen8_irq_handler [i915]] *ERROR* Fault errors on pipe A 0x0080 kindly help me to solve this problem Thank you -- You received this message because you are

Re: Remaping IRQ of ttyS0

2018-10-08 Thread Jan Kiszka
On 05.10.18 09:52, Chung-Fan Yang wrote: 2018年10月5日金曜日 16時18分41秒 UTC+9 Chung-Fan Yang: 2018年10月4日木曜日 18時13分50秒 UTC+9 Jan Kiszka: On 04.10.18 10:46, Chung-Fan Yang wrote: Hello, I am using jailhouse to run a RTOS(nuttx) on a Xeon E5-2630 v4 machine. I am currently trying to implement

Re: Configuration generation: scope of concern with respect to hardware

2018-10-08 Thread Jan Kiszka
On 07.10.18 00:59, christopher.goldsworthy wrote: Hey there, I'm interested in extending the configuration generator to accommodate the creation of non-root configuration files (on x86). To proceed, I need to find That would be warmly welcome! out more about the scope of concern with

Re: [PATCH] core: statistics: x86: account for MSR_ICR

2018-10-08 Thread Ralf Ramsauer
On 10/8/18 12:21 PM, Jan Kiszka wrote: > On 05.10.18 20:06, Ralf Ramsauer wrote: >> In some configurations, MSR_ICR is the most frequently accessed MSR. >> Accounting it allows for getting an overview of the noise introduced by >> it. >> >> Achieve this by splitting up the MSR count to msr_icr

Re: drm:gen8_irq_handler [i915]] *ERROR* Fault errors on pipe A 0x00000080

2018-10-08 Thread Jan Kiszka
On 08.10.18 09:16, Ashok kumar wrote: Hi, After enabling jailhouse I get the following message in syslog sudo tools/jailhouse enable configs/x86/sysconfig.cell *drm:gen8_irq_handler [i915]] *ERROR* Fault errors on pipe A 0x0080* What does the hypervisor report along this on its own

Re: IVSHMEM interrupt not working (x86 demo)

2018-10-08 Thread Jan Kiszka
On 05.10.18 14:38, jasperkuijs...@gmail.com wrote: Hi, When running jailhouse on an Intel Xeon D-1527 I have a problem getting the ivshmem demo to work. After some investigation it seems that no iommu callbacks are generated for the memory region in which the ivshmem pci device is located.

Re: [PATCH] core: statistics: x86: account for MSR_ICR

2018-10-08 Thread Jan Kiszka
On 05.10.18 20:06, Ralf Ramsauer wrote: In some configurations, MSR_ICR is the most frequently accessed MSR. Accounting it allows for getting an overview of the noise introduced by it. Achieve this by splitting up the MSR count to msr_icr and msr_other. The sum of msr_icr and msr_other denotes

how to run the script ./build-images.sh for 1: QEMU/KVM Intel-x86 virtual target

2018-10-08 Thread Ashok kumar
Hi, I am using the below link to download the image `https://github.com/siemens/jailhouse-images and my docker --version Docker version 17.09.0-ce, build afdb6d4 when l run the script ./build-images.sh

[PATCH v2] core: statistics: x86: account for MSR_X2APIC_ICR

2018-10-08 Thread Ralf Ramsauer
In some configurations, MSR_X2APIC_ICR is the most frequently accessed MSR. Accounting it allows for getting an overview of its noise. Achieve this by splitting up the MSR count to msr_x2apic_icr and msr_other. The sum of msr_x2apic_icr and msr_other denotes the sum of all MSRs. Instead of

Re: [PATCH v2] core: statistics: x86: account for MSR_X2APIC_ICR

2018-10-08 Thread Jan Kiszka
On 08.10.18 13:36, Ralf Ramsauer wrote: > In some configurations, MSR_X2APIC_ICR is the most frequently accessed MSR. > Accounting it allows for getting an overview of its noise. > > Achieve this by splitting up the MSR count to msr_x2apic_icr and > msr_other. The sum of msr_x2apic_icr and

Re: [PATCH v2] core: statistics: x86: account for MSR_X2APIC_ICR

2018-10-08 Thread Ralf Ramsauer
On 10/8/18 2:48 PM, Jan Kiszka wrote: > On 08.10.18 13:36, Ralf Ramsauer wrote: >> In some configurations, MSR_X2APIC_ICR is the most frequently accessed MSR. >> Accounting it allows for getting an overview of its noise. >> >> Achieve this by splitting up the MSR count to msr_x2apic_icr and >>

[jh-images][PATCH] README: Improve QEMU/KVM host setup description

2018-10-08 Thread Jan Kiszka
We only support Intel so far, and the user needs to ensure that nested mode is enabled. Signed-off-by: Jan Kiszka --- README.md | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/README.md b/README.md index 3a4854c..1b426d9 100644 --- a/README.md +++ b/README.md @@ -19,8

Re: how to run the script ./build-images.sh for 1: QEMU/KVM Intel-x86 virtual target

2018-10-08 Thread Jan Kiszka
On 08.10.18 13:56, Ashok kumar wrote: Hi, I am using the below link to download the image `https://github.com/siemens/jailhouse-images and my docker --version Docker version 17.09.0-ce, build

[siemens/jailhouse] dd6269: driver: x86: Catch unsupported assignment of CPU 0...

2018-10-08 Thread GitHub
Branch: refs/heads/next Home: https://github.com/siemens/jailhouse Commit: dd6269a94a50d091d5a76fe4011e5fc491e5bcc6 https://github.com/siemens/jailhouse/commit/dd6269a94a50d091d5a76fe4011e5fc491e5bcc6 Author: Jan Kiszka Date: 2018-10-08 (Mon, 08 Oct 2018) Changed paths:

[PATCH] driver: x86: Catch unsupported assignment of CPU 0 to non-root cells

2018-10-08 Thread Jan Kiszka
Due to the way how CPU 0 is offlined on x86, we cannot "steal" it from the root cell and give it to a different owner. Catch any configuration that tries to do so and reject this attempt. Signed-off-by: Jan Kiszka --- driver/cell.c | 13 + 1 file changed, 13 insertions(+) diff

[PATCH] x86: Clarify and improve rejection of NMI IPIs

2018-10-08 Thread Jan Kiszka
While technically doable, re-injecting NMIs from the hypervisor into a guest is far from being simple. On Intel, we need to take care of various cases where injection could have failed. On AMD, it even takes single-stepping over the IRET instruction in order to get to the end of an NMI-blocking