From: Jan Kiszka <jan.kis...@siemens.com>
This adds the system config, an inmate demo and a linux demo with dts
for running Jailhouse on the Raspberry Pi 4. Configs are designed for
the smallest, 1 GB variant. Models with more memory needs adjustments
or have to like like having 1 GB only.
Signed-off-by: Jan Kiszka <jan.kis...@siemens.com>
---
Note that some integration work of ATF with the RPi boot process is
needed before you can create cells. This will be provided via
jailhouse-images.
configs/arm64/dts/inmate-rpi4.dts | 103 +++++++++++++++++++++++
configs/arm64/rpi4-inmate-demo.c | 133 ++++++++++++++++++++++++++++++
configs/arm64/rpi4-linux-demo.c | 163 +++++++++++++++++++++++++++++++++++++
configs/arm64/rpi4.c | 166 ++++++++++++++++++++++++++++++++++++++
4 files changed, 565 insertions(+)
create mode 100644 configs/arm64/dts/inmate-rpi4.dts
create mode 100644 configs/arm64/rpi4-inmate-demo.c
create mode 100644 configs/arm64/rpi4-linux-demo.c
create mode 100644 configs/arm64/rpi4.c
diff --git a/configs/arm64/dts/inmate-rpi4.dts
b/configs/arm64/dts/inmate-rpi4.dts
new file mode 100644
index 00000000..52fd3ac2
--- /dev/null
+++ b/configs/arm64/dts/inmate-rpi4.dts
@@ -0,0 +1,103 @@
+/*
+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Device tree for Linux inmate test on Raspberry Pi 4,
+ * corresponds to configs/arm64/rpi4-linux-demo.c
+ *
+ * Copyright (c) Siemens AG, 2020
+ *
+ * Authors:
+ * Jan Kiszka <jan.kis...@siemens.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/dts-v1/;
+
+/ {
+ model = "Jailhouse cell on Raspberry Pi 4";
+
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ interrupt-parent = <&gic>;
+
+ hypervisor {
+ compatible = "jailhouse,cell";
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu2: cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <2>;
+ enable-method = "psci";
+ };
+
+ cpu3: cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <3>;
+ enable-method = "psci";
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ gic: interrupt-controller@ff841000 {
+ compatible = "arm,gic-400";
+ reg = <0x0 0xff841000 0x0 0x1000>,
+ <0x0 0xff842000 0x0 0x2000>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ };
+
+ fixed: clk500mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <500000000>;
+ clock-output-names = "clk500mhz";
+ };
+
+ uart1: serial@fe215040 {
+ compatible = "brcm,bcm2835-aux-uart";
+ reg = <0x0 0xfe215040 0x0 0x40>;
+ interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&fixed>;
+ status = "okay";
+ };
+
+ pci@e0000000 {
+ compatible = "pci-host-ecam-generic";
+ device_type = "pci";
+ bus-range = <0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &gic GIC_SPI 153 IRQ_TYPE_EDGE_RISING>,
+ <0 0 0 2 &gic GIC_SPI 154 IRQ_TYPE_EDGE_RISING>,
+ <0 0 0 3 &gic GIC_SPI 155 IRQ_TYPE_EDGE_RISING>,
+ <0 0 0 4 &gic GIC_SPI 156 IRQ_TYPE_EDGE_RISING>;
+ reg = <0x0 0xe0000000 0x0 0x100000>;
+ ranges =
+ <0x02000000 0x00 0x10000000 0x0 0x10000000 0x00
0x10000>;
+ };
+};
diff --git a/configs/arm64/rpi4-inmate-demo.c b/configs/arm64/rpi4-inmate-demo.c
new file mode 100644
index 00000000..62442e7c
--- /dev/null
+++ b/configs/arm64/rpi4-inmate-demo.c
@@ -0,0 +1,133 @@
+/*
+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Configuration for demo inmate on Raspberry Pi 4:
+ * 1 CPU, 64K RAM, serial port 0
+ *
+ * Copyright (c) Siemens AG, 2020
+ *
+ * Authors:
+ * Jan Kiszka <jan.kis...@siemens.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <jailhouse/types.h>
+#include <jailhouse/cell-config.h>
+
+struct {
+ struct jailhouse_cell_desc cell;
+ __u64 cpus[1];
+ struct jailhouse_memory mem_regions[8];
+ struct jailhouse_irqchip irqchips[1];
+ struct jailhouse_pci_device pci_devices[1];
+} __attribute__((packed)) config = {
+ .cell = {
+ .signature = JAILHOUSE_CELL_DESC_SIGNATURE,
+ .revision = JAILHOUSE_CONFIG_REVISION,
+ .name = "inmate-demo",
+ .flags = JAILHOUSE_CELL_PASSIVE_COMMREG,
+
+ .cpu_set_size = sizeof(config.cpus),
+ .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+ .num_irqchips = ARRAY_SIZE(config.irqchips),
+ .num_pci_devices = ARRAY_SIZE(config.pci_devices),
+
+ .vpci_irq_base = 184-32,
+
+ .console = {
+ .address = 0xfe215040,
+ .type = JAILHOUSE_CON_TYPE_8250,
+ .flags = JAILHOUSE_CON_ACCESS_MMIO |
+ JAILHOUSE_CON_REGDIST_4,
+ },
+ },
+
+ .cpus = {
+ 0b0010,
+ },
+
+ .mem_regions = {
+ /* IVSHMEM shared memory regions (demo) */
+ {
+ .phys_start = 0x3faf0000,
+ .virt_start = 0x3faf0000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0x3faf1000,
+ .virt_start = 0x3faf1000,
+ .size = 0x9000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0x3fafa000,
+ .virt_start = 0x3fafa000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0x3fafc000,
+ .virt_start = 0x3fafc000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0x3fafe000,
+ .virt_start = 0x3fafe000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* UART */ {
+ .phys_start = 0xfe215040,
+ .virt_start = 0xfe215040,
+ .size = 0x40,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_8 |
+ JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* RAM */ {
+ .phys_start = 0x3fa00000,
+ .virt_start = 0,
+ .size = 0x00010000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
+ },
+ /* communication region */ {
+ .virt_start = 0x80000000,
+ .size = 0x00001000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_COMM_REGION,
+ },
+ },
+
+ .irqchips = {
+ /* GIC */ {
+ .address = 0xff841000,
+ .pin_base = 160,
+ .pin_bitmap = {
+ 1 << (184 - 160),
+ 0,
+ 0,
+ 0
+ },
+ },
+ },
+
+ .pci_devices = {
+ { /* IVSHMEM (demo) */
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .domain = 1,
+ .bdf = 0 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 0,
+ .shmem_dev_id = 1,
+ .shmem_peers = 3,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
+ },
+ },
+};
diff --git a/configs/arm64/rpi4-linux-demo.c b/configs/arm64/rpi4-linux-demo.c
new file mode 100644
index 00000000..9e7fad26
--- /dev/null
+++ b/configs/arm64/rpi4-linux-demo.c
@@ -0,0 +1,163 @@
+/*
+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Configuration for linux-demo inmate on Raspberry Pi 4:
+ * 2 CPUs, 128M RAM, serial port
+ *
+ * Copyright (c) Siemens AG, 2014-2020
+ *
+ * Authors:
+ * Jan Kiszka <jan.kis...@siemens.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <jailhouse/types.h>
+#include <jailhouse/cell-config.h>
+
+struct {
+ struct jailhouse_cell_desc cell;
+ __u64 cpus[1];
+ struct jailhouse_memory mem_regions[13];
+ struct jailhouse_irqchip irqchips[2];
+ struct jailhouse_pci_device pci_devices[2];
+} __attribute__((packed)) config = {
+ .cell = {
+ .signature = JAILHOUSE_CELL_DESC_SIGNATURE,
+ .revision = JAILHOUSE_CONFIG_REVISION,
+ .name = "rpi4-linux-demo",
+ .flags = JAILHOUSE_CELL_PASSIVE_COMMREG |
+ JAILHOUSE_CELL_VIRTUAL_CONSOLE_PERMITTED,
+
+ .cpu_set_size = sizeof(config.cpus),
+ .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+ .num_irqchips = ARRAY_SIZE(config.irqchips),
+ .num_pci_devices = ARRAY_SIZE(config.pci_devices),
+
+ .vpci_irq_base = 185-32,
+
+ .console = {
+ .address = 0xfe215040,
+ .type = JAILHOUSE_CON_TYPE_8250,
+ .flags = JAILHOUSE_CON_ACCESS_MMIO |
+ JAILHOUSE_CON_REGDIST_4,
+ },
+ },
+
+ .cpus = {
+ 0b1100,
+ },
+
+ .mem_regions = {
+ /* IVSHMEM shared memory regions (demo) */
+ {
+ .phys_start = 0x3faf0000,
+ .virt_start = 0x3faf0000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0x3faf1000,
+ .virt_start = 0x3faf1000,
+ .size = 0x9000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0x3fafa000,
+ .virt_start = 0x3fafa000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0x3fafc000,
+ .virt_start = 0x3fafc000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0x3fafe000,
+ .virt_start = 0x3fafe000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* IVSHMEM shared memory region */
+ JAILHOUSE_SHMEM_NET_REGIONS(0x3fb00000, 1),
+ /* UART */ {
+ .phys_start = 0xfe215040,
+ .virt_start = 0xfe215040,
+ .size = 0x40,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_8 |
+ JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* RAM */ {
+ .phys_start = 0x3f900000,
+ .virt_start = 0,
+ .size = 0x10000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
+ },
+ /* RAM */ {
+ .phys_start = 0x30000000,
+ .virt_start = 0x30000000,
+ .size = 0x8000000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA |
+ JAILHOUSE_MEM_LOADABLE,
+ },
+ /* communication region */ {
+ .virt_start = 0x80000000,
+ .size = 0x00001000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_COMM_REGION,
+ },
+ },
+
+ .irqchips = {
+ /* GIC */ {
+ .address = 0xff841000,
+ .pin_base = 32,
+ .pin_bitmap = {
+ 0,
+ 0,
+ 1 << (125 - 96),
+ 0,
+ },
+ },
+ /* GIC */ {
+ .address = 0xff841000,
+ .pin_base = 160,
+ .pin_bitmap = {
+ (1 << (185 - 160)) | (1 << (186 - 160)),
+ 0,
+ 0,
+ 0
+ },
+ },
+ },
+
+ .pci_devices = {
+ { /* IVSHMEM 00:00.0 (demo) */
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .domain = 1,
+ .bdf = 0 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 0,
+ .shmem_dev_id = 2,
+ .shmem_peers = 3,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
+ },
+ { /* IVSHMEM 00:01.0 (networking) */
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .bdf = 1 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 5,
+ .shmem_dev_id = 1,
+ .shmem_peers = 2,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
+ },
+ },
+};
diff --git a/configs/arm64/rpi4.c b/configs/arm64/rpi4.c
new file mode 100644
index 00000000..92463184
--- /dev/null
+++ b/configs/arm64/rpi4.c
@@ -0,0 +1,166 @@
+/*
+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Test configuration for Raspberry Pi 4 (32-bit, quad-core Cortex-A72, 1GB
RAM)
+ *
+ * Copyright (c) Siemens AG, 2020
+ *
+ * Authors:
+ * Jan Kiszka <jan.kis...@siemens.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <jailhouse/types.h>
+#include <jailhouse/cell-config.h>
+
+struct {
+ struct jailhouse_system header;
+ __u64 cpus[1];
+ struct jailhouse_memory mem_regions[12];
+ struct jailhouse_irqchip irqchips[2];
+ struct jailhouse_pci_device pci_devices[2];
+} __attribute__((packed)) config = {
+ .header = {
+ .signature = JAILHOUSE_SYSTEM_SIGNATURE,
+ .revision = JAILHOUSE_CONFIG_REVISION,
+ .flags = JAILHOUSE_SYS_VIRTUAL_DEBUG_CONSOLE,
+ .hypervisor_memory = {
+ .phys_start = 0x3fc00000,
+ .size = 0x00400000,
+ },
+ .debug_console = {
+ .address = 0xfe215040,
+ .size = 0x40,
+ .type = JAILHOUSE_CON_TYPE_8250,
+ .flags = JAILHOUSE_CON_ACCESS_MMIO |
+ JAILHOUSE_CON_REGDIST_4,
+ },
+ .platform_info = {
+ .pci_mmconfig_base = 0xe0000000,
+ .pci_mmconfig_end_bus = 0,
+ .pci_is_virtual = 1,
+ .pci_domain = 1,
+ .arm = {
+ .gic_version = 2,
+ .gicd_base = 0xff841000,
+ .gicc_base = 0xff842000,
+ .gich_base = 0xff844000,
+ .gicv_base = 0xff846000,
+ .maintenance_irq = 25,
+ },
+ },
+ .root_cell = {
+ .name = "Raspberry-Pi4",
+
+ .cpu_set_size = sizeof(config.cpus),
+ .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+ .num_irqchips = ARRAY_SIZE(config.irqchips),
+ .num_pci_devices = ARRAY_SIZE(config.pci_devices),
+
+ .vpci_irq_base = 182 - 32,
+ },
+ },
+
+ .cpus = {
+ 0b1111,
+ },
+
+ .mem_regions = {
+ /* IVSHMEM shared memory regions for 00:00.0 (demo) */
+ {
+ .phys_start = 0x3faf0000,
+ .virt_start = 0x3faf0000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ,
+ },
+ {
+ .phys_start = 0x3faf1000,
+ .virt_start = 0x3faf1000,
+ .size = 0x9000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
+ },
+ {
+ .phys_start = 0x3fafa000,
+ .virt_start = 0x3fafa000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
+ },
+ {
+ .phys_start = 0x3fafc000,
+ .virt_start = 0x3fafc000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ,
+ },
+ {
+ .phys_start = 0x3fafe000,
+ .virt_start = 0x3fafe000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ,
+ },
+ /* IVSHMEM shared memory regions for 00:01.0 (networking) */
+ JAILHOUSE_SHMEM_NET_REGIONS(0x3fb00000, 0),
+ /* MMIO 1 (permissive) */ {
+ .phys_start = 0xfd500000,
+ .virt_start = 0xfd500000,
+ .size = 0x1b00000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* MMIO 2 (permissive) */ {
+ .phys_start = 0x600000000,
+ .virt_start = 0x600000000,
+ .size = 0x4000000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* RAM */ {
+ .phys_start = 0x0,
+ .virt_start = 0x0,
+ .size = 0x3fa10000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE,
+ },
+ },
+
+ .irqchips = {
+ /* GIC */ {
+ .address = 0xff841000,
+ .pin_base = 32,
+ .pin_bitmap = {
+ 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
+ },
+ },
+ /* GIC */ {
+ .address = 0xff841000,
+ .pin_base = 160,
+ .pin_bitmap = {
+ 0xffffffff, 0xffffffff
+ },
+ },
+ },
+
+ .pci_devices = {
+ { /* IVSHMEM 0001:00:00.0 (demo) */
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .domain = 1,
+ .bdf = 0 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 0,
+ .shmem_dev_id = 0,
+ .shmem_peers = 3,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
+ },
+ { /* IVSHMEM 0001:00:01.0 (networking) */
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .domain = 1,
+ .bdf = 1 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 5,
+ .shmem_dev_id = 0,
+ .shmem_peers = 2,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
+ },
+ },
+};
--
2.16.4
--
Siemens AG, Corporate Technology, CT RDA IOT SES-DE
Corporate Competence Center Embedded Linux
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