From: Antonios Motakis <antonios.mota...@huawei.com> Add the cell configuration files, and some helper scripts and device tree for the AMD Seattle development board. These can be used to load a linux inmate on a cell on that target.
Signed-off-by: Antonios Motakis <antonios.mota...@huawei.com> [Jan: adjust to new irqchip configuration, adjust include] Signed-off-by: Jan Kiszka <jan.kis...@siemens.com> --- configs/amd-seattle-linux-demo.c | 100 +++++++++++++++++++++++ samples/kernel-inmate-amd-seattle.dts | 149 ++++++++++++++++++++++++++++++++++ 2 files changed, 249 insertions(+) create mode 100644 configs/amd-seattle-linux-demo.c create mode 100644 samples/kernel-inmate-amd-seattle.dts diff --git a/configs/amd-seattle-linux-demo.c b/configs/amd-seattle-linux-demo.c new file mode 100644 index 0000000..768695d --- /dev/null +++ b/configs/amd-seattle-linux-demo.c @@ -0,0 +1,100 @@ +/* + * Jailhouse AArch64 support + * + * Copyright (C) 2015 Huawei Technologies Duesseldorf GmbH + * + * Authors: + * Antonios Motakis <antonios.mota...@huawei.com> + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + */ + +#include <jailhouse/types.h> +#include <jailhouse/cell-config.h> + +#define ARRAY_SIZE(a) sizeof(a) / sizeof(a[0]) + +struct { + struct jailhouse_cell_desc cell; + __u64 cpus[1]; + struct jailhouse_memory mem_regions[6]; + struct jailhouse_irqchip irqchips[1]; +} __attribute__((packed)) config = { + .cell = { + .signature = JAILHOUSE_CELL_DESC_SIGNATURE, + .name = "linux-inmate-demo", + .flags = JAILHOUSE_CELL_PASSIVE_COMMREG, + + .cpu_set_size = sizeof(config.cpus), + .num_memory_regions = ARRAY_SIZE(config.mem_regions), + .num_irqchips = 1, + .pio_bitmap_size = 0, + .num_pci_devices = 0, + }, + + .cpus = { + 0xc0, + }, + + .mem_regions = { + /* UART */ { + .phys_start = 0xe1010000, + .virt_start = 0xe1010000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED, + }, + /* xgmac */ { + .phys_start = 0xe0900000, + .virt_start = 0xe0900000, + .size = 0x100000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* phy */ { + .phys_start = 0xe1240000, + .virt_start = 0xe1240000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* phy */ { + .phys_start = 0xe1250000, + .virt_start = 0xe1250000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* RAM */ { + .phys_start = 0x82d0000000, + .virt_start = 0x0, + .size = 0x10000000, /* 256 MiB */ + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE, + }, + /* RAM */ { + .phys_start = 0x82e0000000, + .virt_start = 0x82e0000000, + .size = 0x10000000, /* 256 MiB */ + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE, + }, + }, + + .irqchips = { + /* GIC */ { + .address = 0xe1110000, + .pin_base = 352, + .pin_bitmap = { + (1 << (354 - 352)) | /* xgmac1 */ + (1 << (356 - 352)) | /* xgmac1 */ + (1 << (360 - 352)) | /* uart */ + (1 << (373 - 352)) | /* xgmac1 */ + (1 << (374 - 352)) | /* xgmac1 */ + (1 << (375 - 352)) | /* xgmac1 */ + (1 << (376 - 352)) /* xgmac1 */ + }, + }, + } +}; diff --git a/samples/kernel-inmate-amd-seattle.dts b/samples/kernel-inmate-amd-seattle.dts new file mode 100644 index 0000000..fae73e7 --- /dev/null +++ b/samples/kernel-inmate-amd-seattle.dts @@ -0,0 +1,149 @@ +/* + * Jailhouse AArch64 support + * + * Copyright (C) 2015 Huawei Technologies Duesseldorf GmbH + * + * Authors: + * Antonios Motakis <antonios.mota...@huawei.com> + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + * + */ + +/dts-v1/; + +/ { + model = "Jailhouse cell on AMD Seattle"; + compatible = "amd,seattle-overdrive", "amd,seattle"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + chosen { + stdout-path = "serial0:115200n8"; + bootargs = "earlycon"; + }; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu@300 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x300>; + enable-method = "psci"; + next-level-cache = <&L2_0>; + }; + + cpu@301 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x301>; + enable-method = "psci"; + next-level-cache = <&L2_0>; + }; + + L2_0: l2-cache0 { + compatible = "cache"; + }; + }; + + aliases { + serial0 = &serial0; + }; + + memory@82e0000000 { + device_type = "memory"; + reg = <0x82 0xe0000000 0x0 0x10000000>; /* 256 MiB */ + }; + + gic: interrupt-controller@e1110000 { + compatible = "arm,gic-400", "arm,cortex-a15-gic"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0x0 0xe1110000 0 0x1000>, + <0x0 0xe112f000 0 0x2000>; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <1 13 0xff04>, + <1 14 0xff04>, + <1 11 0xff04>; + }; + + uartspiclk_100mhz: clk100mhz_1 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + clock-output-names = "uartspiclk_100mhz"; + }; + + serial0: uart@e1010000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0 0xe1010000 0x0 0x1000>; + interrupts = <0 328 4>; + clocks = <&uartspiclk_100mhz>, <&uartspiclk_100mhz>; + clock-names = "uartclk", "apb_pclk"; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + smb0: smb { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + xgmacclk1_dma_250mhz: clk250mhz_2 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <250000000>; + clock-output-names = "xgmacclk1_dma_250mhz"; + }; + + xgmacclk1_ptp_250mhz: clk250mhz_3 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <250000000>; + clock-output-names = "xgmacclk1_ptp_250mhz"; + }; + + xgmac1_phy: phy@e1240c00 { + compatible = "amd,xgbe-phy-seattle-v1a"; + reg = <0 0xe1240c00 0 0x00400>, /* SERDES RX/TX1 */ + <0 0xe1250080 0 0x00060>, /* SERDES IR 1/2 */ + <0 0xe12500fc 0 0x00004>; /* SERDES IR 2/2 */ + interrupts = <0 322 4>; + amd,speed-set = <0>; + amd,serdes-blwc = <1>, <1>, <0>; + amd,serdes-cdr-rate = <2>, <2>, <7>; + amd,serdes-pq-skew = <10>, <10>, <18>; + amd,serdes-tx-amp = <15>, <15>, <10>; + amd,serdes-dfe-tap-config = <3>, <3>, <1>; + amd,serdes-dfe-tap-enable = <0>, <0>, <127>; + }; + + xgmac1: xgmac@e0900000 { + compatible = "amd,xgbe-seattle-v1a"; + reg = <0 0xe0900000 0 0x80000>, + <0 0xe0980000 0 0x80000>; + interrupts = <0 324 4>, + <0 341 1>, <0 342 1>, <0 343 1>, <0 344 1>; + amd,per-channel-interrupt; + mac-address = [ 02 B1 B2 B3 B4 B5 ]; + clocks = <&xgmacclk1_dma_250mhz>, <&xgmacclk1_ptp_250mhz>; + clock-names = "dma_clk", "ptp_clk"; + phy-handle = <&xgmac1_phy>; + phy-mode = "xgmii"; + #stream-id-cells = <24>; + dma-coherent; + }; + }; +}; -- 2.1.4 -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. 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