Re: GIC Interrupts on AXI Gpio

2018-05-17 Thread Jan Kiszka
On 2018-05-17 12:25, iallende wrote:
> Hi,
> 
> I am using ZynqMP with the FPGA. I have designed an AXI Gpio in the FPGA and 
> I am able to control it through non-root cell Linux. Nevertheless, I want to 
> assign an IRQ to the Input GPIO. However, I do not know how pin_base and 
> pin_bitmap works in GIC configuration. The AXI Gpio DTS part is:
> 
>   axi_gpio_0: gpio@a000 {
>   #gpio-cells = <2>;
>   #interrupt-cells = <2>;
>   compatible = "xlnx,xps-gpio-1.00.a";
>   gpio-controller ;
>   interrupt-controller ;
>   interrupt-parent = <>;
>   interrupts = <0 89 4>;

The second cell holds the SPI number of this device. SPI is GIC
interrupt number minus 32. So you need to permit the cell to use GIC
interrupt 121.

>   reg = <0x0 0xa000 0x0 0x1000>;
>   xlnx,all-inputs = <0x0>;
>   xlnx,all-inputs-2 = <0x0>;
>   xlnx,all-outputs = <0x0>;
>   xlnx,all-outputs-2 = <0x0>;
>   xlnx,dout-default = <0x>;
>   xlnx,dout-default-2 = <0x>;
>   xlnx,gpio-width = <0x2>;
>   xlnx,gpio2-width = <0x20>;
>   xlnx,interrupt-present = <0x1>;
>   xlnx,is-dual = <0x0>;
>   xlnx,tri-default = <0x>;
>   xlnx,tri-default-2 = <0x>; 
>   };
> 
> How do I need to assign the IRQ in the GIC conf. The default GIC conf is:
> .irqchips = {
> /* GIC */ {
> .address = 0xf901,
> .pin_base = 32,

An entry in the irqchips list manages GIC interrupt number from this
base onward, up to 32 * 4 = 128 lines.

> .pin_bitmap = {
> 1 << (54 - 32),
> 0,
> 0,

So you need a "(1 << (121 - 96))" in this line to grant access to GIC
IRQ 121.

> (1 << (140 - 128)) | (1 << (142 - 128))
> },
> },
> },
> 
> 
> PD: I do not know why, but in order to put the GPIOs working I had to delete 
> the ".pci_devices" data from the root cell conf file. 

Your config file might have been inconsistent. Any compiler warnings?
Check struct sizes an declared array sizes again.

Jan

-- 
Siemens AG, Corporate Technology, CT RDA IOT SES-DE
Corporate Competence Center Embedded Linux

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GIC Interrupts on AXI Gpio

2018-05-17 Thread iallende
Hi,

I am using ZynqMP with the FPGA. I have designed an AXI Gpio in the FPGA and I 
am able to control it through non-root cell Linux. Nevertheless, I want to 
assign an IRQ to the Input GPIO. However, I do not know how pin_base and 
pin_bitmap works in GIC configuration. The AXI Gpio DTS part is:

axi_gpio_0: gpio@a000 {
#gpio-cells = <2>;
#interrupt-cells = <2>;
compatible = "xlnx,xps-gpio-1.00.a";
gpio-controller ;
interrupt-controller ;
interrupt-parent = <>;
interrupts = <0 89 4>;
reg = <0x0 0xa000 0x0 0x1000>;
xlnx,all-inputs = <0x0>;
xlnx,all-inputs-2 = <0x0>;
xlnx,all-outputs = <0x0>;
xlnx,all-outputs-2 = <0x0>;
xlnx,dout-default = <0x>;
xlnx,dout-default-2 = <0x>;
xlnx,gpio-width = <0x2>;
xlnx,gpio2-width = <0x20>;
xlnx,interrupt-present = <0x1>;
xlnx,is-dual = <0x0>;
xlnx,tri-default = <0x>;
xlnx,tri-default-2 = <0x>; 
};

How do I need to assign the IRQ in the GIC conf. The default GIC conf is:
.irqchips = {
/* GIC */ {
.address = 0xf901,
.pin_base = 32,
.pin_bitmap = {
1 << (54 - 32),
0,
0,
(1 << (140 - 128)) | (1 << (142 - 128))
},
},
},


PD: I do not know why, but in order to put the GPIOs working I had to delete 
the ".pci_devices" data from the root cell conf file. 

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