tree: git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
topic/rockchip
head: 1b21572f8fd791f5b54e5989bc8e0cc5308d2e6c
commit: 4495c89fcf2624d542a27f1ecd70aa3524c54195 [2/3] ASoC: add driver for
Rockchip RK3xxx I2S controller
>> sound/soc/rockchip/rockchip_i2s.c:145:8-19: duplicated argument to & or |
>> sound/soc/rockchip/rockchip_i2s.c:146:8-19: duplicated argument to & or |
>> sound/soc/rockchip/rockchip_i2s.c:101:8-19: duplicated argument to & or |
>> sound/soc/rockchip/rockchip_i2s.c:102:8-19: duplicated argument to & or |
git remote add asoc
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
git remote update asoc
git checkout 4495c89fcf2624d542a27f1ecd70aa3524c54195
vim +145 sound/soc/rockchip/rockchip_i2s.c
4495c89f Jianqun Xu 2014-07-05 95
I2S_XFER_TXS_START |
4495c89f Jianqun Xu 2014-07-05 96
I2S_XFER_RXS_START,
4495c89f Jianqun Xu 2014-07-05 97
I2S_XFER_TXS_STOP |
4495c89f Jianqun Xu 2014-07-05 98
I2S_XFER_RXS_STOP);
4495c89f Jianqun Xu 2014-07-05 99
4495c89f Jianqun Xu 2014-07-05 100
regmap_update_bits(i2s->regmap, I2S_CLR,
4495c89f Jianqun Xu 2014-07-05 @101
I2S_CLR_TXC | I2S_CLR_TXC,
4495c89f Jianqun Xu 2014-07-05 @102
I2S_CLR_TXC | I2S_CLR_TXC);
4495c89f Jianqun Xu 2014-07-05 103
4495c89f Jianqun Xu 2014-07-05 104
regmap_read(i2s->regmap, I2S_CLR, &val);
4495c89f Jianqun Xu 2014-07-05 105
4495c89f Jianqun Xu 2014-07-05 106 /* Should wait for
clear operation to finish */
4495c89f Jianqun Xu 2014-07-05 107 while (val) {
4495c89f Jianqun Xu 2014-07-05 108
regmap_read(i2s->regmap, I2S_CLR, &val);
4495c89f Jianqun Xu 2014-07-05 109 retry--;
4495c89f Jianqun Xu 2014-07-05 110 if (!retry)
4495c89f Jianqun Xu 2014-07-05 111
dev_warn(i2s->dev, "fail to clear\n");
4495c89f Jianqun Xu 2014-07-05 112 }
4495c89f Jianqun Xu 2014-07-05 113 }
4495c89f Jianqun Xu 2014-07-05 114 }
4495c89f Jianqun Xu 2014-07-05 115 }
4495c89f Jianqun Xu 2014-07-05 116
4495c89f Jianqun Xu 2014-07-05 117 static void rockchip_snd_rxctrl(struct
rk_i2s_dev *i2s, int on)
4495c89f Jianqun Xu 2014-07-05 118 {
4495c89f Jianqun Xu 2014-07-05 119 unsigned int val = 0;
4495c89f Jianqun Xu 2014-07-05 120 int retry = 10;
4495c89f Jianqun Xu 2014-07-05 121
4495c89f Jianqun Xu 2014-07-05 122 if (on) {
4495c89f Jianqun Xu 2014-07-05 123 regmap_update_bits(i2s->regmap,
I2S_DMACR,
4495c89f Jianqun Xu 2014-07-05 124
I2S_DMACR_RDE_ENABLE, I2S_DMACR_RDE_ENABLE);
4495c89f Jianqun Xu 2014-07-05 125
4495c89f Jianqun Xu 2014-07-05 126 regmap_update_bits(i2s->regmap,
I2S_XFER,
4495c89f Jianqun Xu 2014-07-05 127
I2S_XFER_TXS_START | I2S_XFER_RXS_START,
4495c89f Jianqun Xu 2014-07-05 128
I2S_XFER_TXS_START | I2S_XFER_RXS_START);
4495c89f Jianqun Xu 2014-07-05 129
4495c89f Jianqun Xu 2014-07-05 130 i2s->rx_start = true;
4495c89f Jianqun Xu 2014-07-05 131 } else {
4495c89f Jianqun Xu 2014-07-05 132 i2s->rx_start = false;
4495c89f Jianqun Xu 2014-07-05 133
4495c89f Jianqun Xu 2014-07-05 134 regmap_update_bits(i2s->regmap,
I2S_DMACR,
4495c89f Jianqun Xu 2014-07-05 135
I2S_DMACR_RDE_ENABLE, I2S_DMACR_RDE_DISABLE);
4495c89f Jianqun Xu 2014-07-05 136
4495c89f Jianqun Xu 2014-07-05 137 if (!i2s->tx_start) {
4495c89f Jianqun Xu 2014-07-05 138
regmap_update_bits(i2s->regmap, I2S_XFER,
4495c89f Jianqun Xu 2014-07-05 139
I2S_XFER_TXS_START |
4495c89f Jianqun Xu 2014-07-05 140
I2S_XFER_RXS_START,
4495c89f Jianqun Xu 2014-07-05 141
I2S_XFER_TXS_STOP |
4495c89f Jianqun Xu 2014-07-05 142
I2S_XFER_RXS_STOP);
4495c89f Jianqun Xu 2014-07-05 143
4495c89f Jianqun Xu 2014-07-05 144
regmap_update_bits(i2s->regmap, I2S_CLR,
4495c89f Jianqun Xu 2014-07-05 @145
I2S_CLR_TXC | I2S_CLR_TXC,
4495c89f Jianqun Xu 2014-07-05 @146
I2S_CLR_TXC | I2S_CLR_TXC);
4495c89f Jianqun Xu 2014-07-05 147
4495c89f Jianqun Xu 2014-07-05 148
regmap_read(i2s->regmap, I2S_CLR, &val);
4495c89f Jianqun Xu 2014-07-05 149
---
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