Hi Laurent, FYI, there are new smatch warnings show up in
tree: git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc.git mmc-next head: 259245a845a173124bfe768fa1a2ac88e034b5b8 commit: 0111fc4646a6e84a432dda3e6398a8a69319e617 [35/36] mmc: sh_mmcif: Enable driver compilation with COMPILE_TEST drivers/mmc/host/sh_mmcif.c:824 sh_mmcif_set_cmd() error: we previously assumed 'data' could be null (see line 789) drivers/mmc/host/sh_mmcif.c:1124 sh_mmcif_end_cmd() error: we previously assumed 'host->chan_rx' could be null (see line 1107) drivers/mmc/host/sh_mmcif.c:1128 sh_mmcif_end_cmd() error: we previously assumed 'host->chan_tx' could be null (see line 1110) git remote add mmc git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc.git git remote update mmc git checkout 0111fc4646a6e84a432dda3e6398a8a69319e617 vim +/data +824 drivers/mmc/host/sh_mmcif.c fdc50a94 Yusuke Goda 2010-05-26 783 case MMC_CLR_WRITE_PROT: fdc50a94 Yusuke Goda 2010-05-26 784 case MMC_ERASE: fdc50a94 Yusuke Goda 2010-05-26 785 tmp |= CMD_SET_RBSY; fdc50a94 Yusuke Goda 2010-05-26 786 break; fdc50a94 Yusuke Goda 2010-05-26 787 } fdc50a94 Yusuke Goda 2010-05-26 788 /* WDAT / DATW */ 69983404 Guennadi Liakhovetski 2011-12-26 @789 if (data) { fdc50a94 Yusuke Goda 2010-05-26 790 tmp |= CMD_SET_WDAT; fdc50a94 Yusuke Goda 2010-05-26 791 switch (host->bus_width) { fdc50a94 Yusuke Goda 2010-05-26 792 case MMC_BUS_WIDTH_1: fdc50a94 Yusuke Goda 2010-05-26 793 tmp |= CMD_SET_DATW_1; fdc50a94 Yusuke Goda 2010-05-26 794 break; fdc50a94 Yusuke Goda 2010-05-26 795 case MMC_BUS_WIDTH_4: fdc50a94 Yusuke Goda 2010-05-26 796 tmp |= CMD_SET_DATW_4; fdc50a94 Yusuke Goda 2010-05-26 797 break; fdc50a94 Yusuke Goda 2010-05-26 798 case MMC_BUS_WIDTH_8: fdc50a94 Yusuke Goda 2010-05-26 799 tmp |= CMD_SET_DATW_8; fdc50a94 Yusuke Goda 2010-05-26 800 break; fdc50a94 Yusuke Goda 2010-05-26 801 default: e47bf32a Guennadi Liakhovetski 2010-11-24 802 dev_err(&host->pd->dev, "Unsupported bus width.\n"); fdc50a94 Yusuke Goda 2010-05-26 803 break; fdc50a94 Yusuke Goda 2010-05-26 804 } 555061f9 Teppei Kamijou 2012-12-12 805 switch (host->timing) { 555061f9 Teppei Kamijou 2012-12-12 806 case MMC_TIMING_UHS_DDR50: 555061f9 Teppei Kamijou 2012-12-12 807 /* 555061f9 Teppei Kamijou 2012-12-12 808 * MMC core will only set this timing, if the host 555061f9 Teppei Kamijou 2012-12-12 809 * advertises the MMC_CAP_UHS_DDR50 capability. MMCIF 555061f9 Teppei Kamijou 2012-12-12 810 * implementations with this capability, e.g. sh73a0, 555061f9 Teppei Kamijou 2012-12-12 811 * will have to set it in their platform data. 555061f9 Teppei Kamijou 2012-12-12 812 */ 555061f9 Teppei Kamijou 2012-12-12 813 tmp |= CMD_SET_DARS; 555061f9 Teppei Kamijou 2012-12-12 814 break; 555061f9 Teppei Kamijou 2012-12-12 815 } fdc50a94 Yusuke Goda 2010-05-26 816 } fdc50a94 Yusuke Goda 2010-05-26 817 /* DWEN */ fdc50a94 Yusuke Goda 2010-05-26 818 if (opc == MMC_WRITE_BLOCK || opc == MMC_WRITE_MULTIPLE_BLOCK) fdc50a94 Yusuke Goda 2010-05-26 819 tmp |= CMD_SET_DWEN; fdc50a94 Yusuke Goda 2010-05-26 820 /* CMLTE/CMD12EN */ fdc50a94 Yusuke Goda 2010-05-26 821 if (opc == MMC_READ_MULTIPLE_BLOCK || opc == MMC_WRITE_MULTIPLE_BLOCK) { fdc50a94 Yusuke Goda 2010-05-26 822 tmp |= CMD_SET_CMLTE | CMD_SET_CMD12EN; fdc50a94 Yusuke Goda 2010-05-26 823 sh_mmcif_bitset(host, MMCIF_CE_BLOCK_SET, 69983404 Guennadi Liakhovetski 2011-12-26 @824 data->blocks << 16); fdc50a94 Yusuke Goda 2010-05-26 825 } fdc50a94 Yusuke Goda 2010-05-26 826 /* RIDXC[1:0] check bits */ fdc50a94 Yusuke Goda 2010-05-26 827 if (opc == MMC_SEND_OP_COND || opc == MMC_ALL_SEND_CID || --- 0-DAY kernel build testing backend Open Source Technology Center http://lists.01.org/mailman/listinfo/kbuild Intel Corporation _______________________________________________ kbuild mailing list kbuild@lists.01.org https://lists.01.org/mailman/listinfo/kbuild