tree: git://anongit.freedesktop.org/drm/drm-intel drm-intel-next-queued
head: 9f172f6fbd243759c808d97bd83c95e49325b2c9
commit: f4ecfbfc32ed0cb502374164638d14c4fb03e916 [2/3] drm/i915: Check
whitelist registers across resets
smatch warnings:
drivers/gpu/drm/i915/selftests/intel_workarounds.c:58 read_nonprivs() error:
'cs' dereferencing possible ERR_PTR()
git remote add drm-drm-intel git://anongit.freedesktop.org/drm/drm-intel
git remote update drm-drm-intel
git checkout f4ecfbfc32ed0cb502374164638d14c4fb03e916
vim +/cs +58 drivers/gpu/drm/i915/selftests/intel_workarounds.c
f4ecfbfc Chris Wilson 2018-04-14 10
f4ecfbfc Chris Wilson 2018-04-14 11 static struct drm_i915_gem_object *
f4ecfbfc Chris Wilson 2018-04-14 12 read_nonprivs(struct i915_gem_context
*ctx, struct intel_engine_cs *engine)
f4ecfbfc Chris Wilson 2018-04-14 13 {
f4ecfbfc Chris Wilson 2018-04-14 14 struct drm_i915_gem_object *result;
f4ecfbfc Chris Wilson 2018-04-14 15 struct i915_request *rq;
f4ecfbfc Chris Wilson 2018-04-14 16 struct i915_vma *vma;
f4ecfbfc Chris Wilson 2018-04-14 17 const u32 base = engine->mmio_base;
f4ecfbfc Chris Wilson 2018-04-14 18 u32 srm, *cs;
f4ecfbfc Chris Wilson 2018-04-14 19 int err;
f4ecfbfc Chris Wilson 2018-04-14 20 int i;
f4ecfbfc Chris Wilson 2018-04-14 21
f4ecfbfc Chris Wilson 2018-04-14 22 result =
i915_gem_object_create_internal(engine->i915, PAGE_SIZE);
f4ecfbfc Chris Wilson 2018-04-14 23 if (IS_ERR(result))
f4ecfbfc Chris Wilson 2018-04-14 24 return result;
f4ecfbfc Chris Wilson 2018-04-14 25
f4ecfbfc Chris Wilson 2018-04-14 26 i915_gem_object_set_cache_level(result,
I915_CACHE_LLC);
f4ecfbfc Chris Wilson 2018-04-14 27
f4ecfbfc Chris Wilson 2018-04-14 28 cs = i915_gem_object_pin_map(result,
I915_MAP_WB);
f4ecfbfc Chris Wilson 2018-04-14 29 if (IS_ERR(cs)) {
f4ecfbfc Chris Wilson 2018-04-14 30 err = PTR_ERR(cs);
f4ecfbfc Chris Wilson 2018-04-14 31 goto err_obj;
f4ecfbfc Chris Wilson 2018-04-14 32 }
f4ecfbfc Chris Wilson 2018-04-14 33 memset(cs, 0xc5, PAGE_SIZE);
f4ecfbfc Chris Wilson 2018-04-14 34 i915_gem_object_unpin_map(result);
f4ecfbfc Chris Wilson 2018-04-14 35
f4ecfbfc Chris Wilson 2018-04-14 36 vma = i915_vma_instance(result,
&engine->i915->ggtt.base, NULL);
f4ecfbfc Chris Wilson 2018-04-14 37 if (IS_ERR(vma)) {
f4ecfbfc Chris Wilson 2018-04-14 38 err = PTR_ERR(vma);
f4ecfbfc Chris Wilson 2018-04-14 39 goto err_obj;
f4ecfbfc Chris Wilson 2018-04-14 40 }
f4ecfbfc Chris Wilson 2018-04-14 41
f4ecfbfc Chris Wilson 2018-04-14 42 err = i915_vma_pin(vma, 0, 0,
PIN_GLOBAL);
f4ecfbfc Chris Wilson 2018-04-14 43 if (err)
f4ecfbfc Chris Wilson 2018-04-14 44 goto err_obj;
f4ecfbfc Chris Wilson 2018-04-14 45
f4ecfbfc Chris Wilson 2018-04-14 46 rq = i915_request_alloc(engine, ctx);
f4ecfbfc Chris Wilson 2018-04-14 47 if (IS_ERR(rq)) {
f4ecfbfc Chris Wilson 2018-04-14 48 err = PTR_ERR(rq);
f4ecfbfc Chris Wilson 2018-04-14 49 goto err_pin;
f4ecfbfc Chris Wilson 2018-04-14 50 }
f4ecfbfc Chris Wilson 2018-04-14 51
f4ecfbfc Chris Wilson 2018-04-14 52 srm = MI_STORE_REGISTER_MEM |
MI_SRM_LRM_GLOBAL_GTT;
f4ecfbfc Chris Wilson 2018-04-14 53 if (INTEL_GEN(ctx->i915) >= 8)
f4ecfbfc Chris Wilson 2018-04-14 54 srm++;
f4ecfbfc Chris Wilson 2018-04-14 55
f4ecfbfc Chris Wilson 2018-04-14 56 cs = intel_ring_begin(rq, 4 *
RING_MAX_NONPRIV_SLOTS);
f4ecfbfc Chris Wilson 2018-04-14 57 for (i = 0; i < RING_MAX_NONPRIV_SLOTS;
i++) {
f4ecfbfc Chris Wilson 2018-04-14 @58 *cs++ = srm;
f4ecfbfc Chris Wilson 2018-04-14 59 *cs++ =
i915_mmio_reg_offset(RING_FORCE_TO_NONPRIV(base, i));
f4ecfbfc Chris Wilson 2018-04-14 60 *cs++ = i915_ggtt_offset(vma) +
sizeof(u32) * i;
f4ecfbfc Chris Wilson 2018-04-14 61 *cs++ = 0;
f4ecfbfc Chris Wilson 2018-04-14 62 }
f4ecfbfc Chris Wilson 2018-04-14 63 intel_ring_advance(rq, cs);
f4ecfbfc Chris Wilson 2018-04-14 64
f4ecfbfc Chris Wilson 2018-04-14 65 i915_vma_move_to_active(vma, rq,
EXEC_OBJECT_WRITE);
f4ecfbfc Chris Wilson 2018-04-14 66 reservation_object_lock(vma->resv,
NULL);
f4ecfbfc Chris Wilson 2018-04-14 67
reservation_object_add_excl_fence(vma->resv, &rq->fence);
f4ecfbfc Chris Wilson 2018-04-14 68 reservation_object_unlock(vma->resv);
f4ecfbfc Chris Wilson 2018-04-14 69
f4ecfbfc Chris Wilson 2018-04-14 70 i915_gem_object_get(result);
f4ecfbfc Chris Wilson 2018-04-14 71
i915_gem_object_set_active_reference(result);
f4ecfbfc Chris Wilson 2018-04-14 72
f4ecfbfc Chris Wilson 2018-04-14 73 __i915_request_add(rq, true);
f4ecfbfc Chris Wilson 2018-04-14 74 i915_vma_unpin(vma);
f4ecfbfc Chris Wilson 2018-04-14 75
f4ecfbfc Chris Wilson 2018-04-14 76 return result;
f4ecfbfc Chris Wilson 2018-04-14 77
f4ecfbfc Chris Wilson 2018-04-14 78 err_pin:
f4ecfbfc Chris Wilson 2018-04-14 79 i915_vma_unpin(vma);
f4ecfbfc Chris Wilson 2018-04-14 80 err_obj:
f4ecfbfc Chris Wilson 2018-04-14 81 i915_gem_object_put(result);
f4ecfbfc Chris Wilson 2018-04-14 82 return ERR_PTR(err);
f4ecfbfc Chris Wilson 2018-04-14 83 }
f4ecfbfc Chris Wilson 2018-04-14 84
---
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