[Kernel-packages] [Bug 1770231] Re: Expose arm64 CPU topology to userspace
This bug was fixed in the package linux - 4.15.0-29.31 --- linux (4.15.0-29.31) bionic; urgency=medium * linux: 4.15.0-29.31 -proposed tracker (LP: #1782173) * [SRU Bionic][Cosmic] kernel panic in ipmi_ssif at msg_done_handler (LP: #116) - ipmi_ssif: Fix kernel panic at msg_done_handler * Update to ocxl driver for 18.04.1 (LP: #1775786) - misc: ocxl: use put_device() instead of device_unregister() - powerpc: Add TIDR CPU feature for POWER9 - powerpc: Use TIDR CPU feature to control TIDR allocation - powerpc: use task_pid_nr() for TID allocation - ocxl: Rename pnv_ocxl_spa_remove_pe to clarify it's action - ocxl: Expose the thread_id needed for wait on POWER9 - ocxl: Add an IOCTL so userspace knows what OCXL features are available - ocxl: Document new OCXL IOCTLs - ocxl: Fix missing unlock on error in afu_ioctl_enable_p9_wait() * Critical upstream bugfix missing in Ubuntu 18.04 - frequent Xorg crash after suspend (LP: #1776887) - ocxl: Document the OCXL_IOCTL_GET_METADATA IOCTL * Hard LOCKUP observed on stressing Ubuntu 18 04 (LP: #1777194) - powerpc: use NMI IPI for smp_send_stop - powerpc: Fix smp_send_stop NMI IPI handling * IPL: ppc64_cpu --frequency hang with INFO: rcu_sched detected stalls on CPUs/tasks on w34 and wsbmc016 with 920.1714.20170330n (LP: #1773964) - rtc: opal: Fix OPAL RTC driver OPAL_BUSY loops * [Regression] EXT4-fs error (device sda2): ext4_validate_block_bitmap:383: comm stress-ng: bg 4705: bad block bitmap checksum (LP: #1781709) - SAUCE: Revert "UBUNTU: SAUCE: ext4: fix ext4_validate_inode_bitmap: comm stress-ng: Corrupt inode bitmap" - SAUCE: ext4: check for allocation block validity with block group locked linux (4.15.0-28.30) bionic; urgency=medium * linux: 4.15.0-28.30 -proposed tracker (LP: #1781433) * Cannot set MTU higher than 1500 in Xen instance (LP: #1781413) - xen-netfront: Fix mismatched rtnl_unlock - xen-netfront: Update features after registering netdev linux (4.15.0-27.29) bionic; urgency=medium * linux: 4.15.0-27.29 -proposed tracker (LP: #1781062) * [Regression] EXT4-fs error (device sda1): ext4_validate_inode_bitmap:99: comm stress-ng: Corrupt inode bitmap (LP: #1780137) - SAUCE: ext4: fix ext4_validate_inode_bitmap: comm stress-ng: Corrupt inode bitmap linux (4.15.0-26.28) bionic; urgency=medium * linux: 4.15.0-26.28 -proposed tracker (LP: #1780112) * failure to boot with linux-image-4.15.0-24-generic (LP: #1779827) // Cloud- init causes potentially huge boot delays with 4.15 kernels (LP: #1780062) - random: Make getrandom() ready earlier linux (4.15.0-25.27) bionic; urgency=medium * linux: 4.15.0-25.27 -proposed tracker (LP: #1779354) * hisi_sas_v3_hw: internal task abort: timeout and not done. (LP: #136) - scsi: hisi_sas: Update a couple of register settings for v3 hw * hisi_sas: Add missing PHY spinlock init (LP: #134) - scsi: hisi_sas: Add missing PHY spinlock init * hisi_sas: improve read performance by pre-allocating slot DMA buffers (LP: #127) - scsi: hisi_sas: use dma_zalloc_coherent() - scsi: hisi_sas: Use dmam_alloc_coherent() - scsi: hisi_sas: Pre-allocate slot DMA buffers * hisi_sas: Failures during host reset (LP: #1777696) - scsi: hisi_sas: Only process broadcast change in phy_bcast_v3_hw() - scsi: hisi_sas: Fix the conflict between dev gone and host reset - scsi: hisi_sas: Adjust task reject period during host reset - scsi: hisi_sas: Add a flag to filter PHY events during reset - scsi: hisi_sas: Release all remaining resources in clear nexus ha * Fake SAS addresses for SATA disks on HiSilicon D05 are non-unique (LP: #1776750) - scsi: hisi_sas: make SAS address of SATA disks unique * Vcs-Git header on bionic linux source package points to zesty git tree (LP: #1766055) - [Packaging]: Update Vcs-Git * large KVM instances run out of IRQ routes (LP: #1778261) - SAUCE: kvm -- increase KVM_MAX_IRQ_ROUTES to 2048 on x86 -- Stefan Bader Tue, 17 Jul 2018 10:57:50 +0200 ** Changed in: linux (Ubuntu) Status: In Progress => Fix Released -- You received this bug notification because you are a member of Kernel Packages, which is subscribed to linux in Ubuntu. https://bugs.launchpad.net/bugs/1770231 Title: Expose arm64 CPU topology to userspace Status in linux package in Ubuntu: Fix Released Status in linux source package in Bionic: Fix Released Bug description: [Impact] Applications, particularly those in the HPC domain (e.g. openmpi), can be optimized for the processor and cache topology. However, the ARM CPU topology isn't correctly exposed to userspace. The kernel's scheduler also uses this information to optimize task placement. [Fix] The ACPI 6.2 specification introduced a Processor Properties Topology Table (PPTT). This is what ARM server vendors are
[Kernel-packages] [Bug 1770231] Re: Expose arm64 CPU topology to userspace
This bug was fixed in the package linux - 4.15.0-24.26
---
linux (4.15.0-24.26) bionic; urgency=medium
* linux: 4.15.0-24.26 -proposed tracker (LP: #1776338)
* Bionic update: upstream stable patchset 2018-06-06 (LP: #1775483)
- drm: bridge: dw-hdmi: Fix overflow workaround for Amlogic Meson GX SoCs
- i40e: Fix attach VF to VM issue
- tpm: cmd_ready command can be issued only after granting locality
- tpm: tpm-interface: fix tpm_transmit/_cmd kdoc
- tpm: add retry logic
- Revert "ath10k: send (re)assoc peer command when NSS changed"
- bonding: do not set slave_dev npinfo before slave_enable_netpoll in
bond_enslave
- ipv6: add RTA_TABLE and RTA_PREFSRC to rtm_ipv6_policy
- ipv6: sr: fix NULL pointer dereference in seg6_do_srh_encap()- v4 pkts
- KEYS: DNS: limit the length of option strings
- l2tp: check sockaddr length in pppol2tp_connect()
- net: validate attribute sizes in neigh_dump_table()
- llc: delete timers synchronously in llc_sk_free()
- tcp: don't read out-of-bounds opsize
- net: af_packet: fix race in PACKET_{R|T}X_RING
- tcp: md5: reject TCP_MD5SIG or TCP_MD5SIG_EXT on established sockets
- net: fix deadlock while clearing neighbor proxy table
- team: avoid adding twice the same option to the event list
- net/smc: fix shutdown in state SMC_LISTEN
- team: fix netconsole setup over team
- packet: fix bitfield update race
- tipc: add policy for TIPC_NLA_NET_ADDR
- pppoe: check sockaddr length in pppoe_connect()
- vlan: Fix reading memory beyond skb->tail in skb_vlan_tagged_multi
- amd-xgbe: Add pre/post auto-negotiation phy hooks
- sctp: do not check port in sctp_inet6_cmp_addr
- amd-xgbe: Improve KR auto-negotiation and training
- strparser: Do not call mod_delayed_work with a timeout of LONG_MAX
- amd-xgbe: Only use the SFP supported transceiver signals
- strparser: Fix incorrect strp->need_bytes value.
- net: sched: ife: signal not finding metaid
- tcp: clear tp->packets_out when purging write queue
- net: sched: ife: handle malformed tlv length
- net: sched: ife: check on metadata length
- llc: hold llc_sap before release_sock()
- llc: fix NULL pointer deref for SOCK_ZAPPED
- net: ethernet: ti: cpsw: fix tx vlan priority mapping
- virtio_net: split out ctrl buffer
- virtio_net: fix adding vids on big-endian
- KVM: s390: force bp isolation for VSIE
- s390: correct module section names for expoline code revert
- microblaze: Setup dependencies for ASM optimized lib functions
- commoncap: Handle memory allocation failure.
- scsi: mptsas: Disable WRITE SAME
- cdrom: information leak in cdrom_ioctl_media_changed()
- m68k/mac: Don't remap SWIM MMIO region
- block/swim: Check drive type
- block/swim: Don't log an error message for an invalid ioctl
- block/swim: Remove extra put_disk() call from error path
- block/swim: Rename macros to avoid inconsistent inverted logic
- block/swim: Select appropriate drive on device open
- block/swim: Fix array bounds check
- block/swim: Fix IO error at end of medium
- tracing: Fix missing tab for hwlat_detector print format
- s390/cio: update chpid descriptor after resource accessibility event
- s390/dasd: fix IO error for newly defined devices
- s390/uprobes: implement arch_uretprobe_is_alive()
- ACPI / video: Only default only_lcd to true on Win8-ready _desktops_
- docs: ip-sysctl.txt: fix name of some ipv6 variables
- net: mvpp2: Fix DMA address mask size
- net: stmmac: Disable ACS Feature for GMAC >= 4
- l2tp: hold reference on tunnels in netlink dumps
- l2tp: hold reference on tunnels printed in pppol2tp proc file
- l2tp: hold reference on tunnels printed in l2tp/tunnels debugfs file
- l2tp: fix {pppol2tp, l2tp_dfs}_seq_stop() in case of seq_file overflow
- s390/qeth: fix error handling in adapter command callbacks
- s390/qeth: avoid control IO completion stalls
- s390/qeth: handle failure on workqueue creation
- bnxt_en: Fix memory fault in bnxt_ethtool_init()
- virtio-net: add missing virtqueue kick when flushing packets
- VSOCK: make af_vsock.ko removable again
- hwmon: (k10temp) Add temperature offset for Ryzen 2700X
- hwmon: (k10temp) Add support for AMD Ryzen w/ Vega graphics
- s390/cpum_cf: rename IBM z13/z14 counter names
- kprobes: Fix random address output of blacklist file
- Revert "pinctrl: intel: Initialize GPIO properly when used through
irqchip"
* Lenovo V330 needs patch in ideapad_laptop module for rfkill (LP: #1774636)
- SAUCE: Add Lenovo V330 to the ideapad_laptop rfkill blacklist
* bluetooth controller fail after suspend with USB autosuspend on XPS 13 9360
(LP: #1775217)
- Bluetooth: btusb: Add Dell XPS 13 9360 to btusb_needs_reset_resume_table
* [Hyper-V] PCI: hv: Fix 2 hang issues in
[Kernel-packages] [Bug 1770231] Re: Expose arm64 CPU topology to userspace
Verification: ubuntu@d06-1:~$ cat /proc/version Linux version 4.15.0-24-generic (buildd@bos02-arm64-008) (gcc version 7.3.0 (Ubuntu/Linaro 7.3.0-16ubuntu3)) #26-Ubuntu SMP Wed Jun 13 08:44:37 UTC 2018 ubuntu@d06-1:~$ lscpu Architecture:aarch64 Byte Order: Little Endian CPU(s): 96 On-line CPU(s) list: 0-95 Thread(s) per core: 1 Core(s) per socket: 48 Socket(s): 2 NUMA node(s):4 Vendor ID: 0x48 Model: 0 Stepping:0x0 BogoMIPS:200.00 L1d cache: 64K L1i cache: 64K L2 cache:512K L3 cache:32768K NUMA node0 CPU(s): 0-23 NUMA node1 CPU(s): 24-47 NUMA node2 CPU(s): 48-71 NUMA node3 CPU(s): 72-95 Flags: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics cpuid asimdrdm dcpop ubuntu@d06-1:~$ ** Tags removed: verification-needed-bionic ** Tags added: verification-done-bionic -- You received this bug notification because you are a member of Kernel Packages, which is subscribed to linux in Ubuntu. https://bugs.launchpad.net/bugs/1770231 Title: Expose arm64 CPU topology to userspace Status in linux package in Ubuntu: In Progress Status in linux source package in Bionic: Fix Committed Bug description: [Impact] Applications, particularly those in the HPC domain (e.g. openmpi), can be optimized for the processor and cache topology. However, the ARM CPU topology isn't correctly exposed to userspace. The kernel's scheduler also uses this information to optimize task placement. [Fix] The ACPI 6.2 specification introduced a Processor Properties Topology Table (PPTT). This is what ARM server vendors are using to expose their topology. The linux kernel needs support for parsing this table, and exposing the parsed topology to userspace. [Test Case] A HiSilicon D06 without the fix. Note that it thinks I'm on a 24-socket system with 4 cores each. I'm not. I'm on a 2 socket system w/ 48 cores each. An HPC app that optimized for this (bogus) topology would therefore suffer a performance penalty. ubuntu@d06-1:~$ lscpu Architecture:aarch64 Byte Order: Little Endian CPU(s): 96 On-line CPU(s) list: 0-95 Thread(s) per core: 1 Core(s) per socket: 4 Socket(s): 24 NUMA node(s):4 Vendor ID: 0x48 Model: 0 Stepping:0x0 BogoMIPS:200.00 NUMA node0 CPU(s): 0-23 NUMA node1 CPU(s): 24-47 NUMA node2 CPU(s): 48-71 NUMA node3 CPU(s): 72-95 Flags: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics cpuid asimdrdm dcpop With the fix (and this is correct): ubuntu@d06-1:~$ lscpu Architecture:aarch64 Byte Order: Little Endian CPU(s): 96 On-line CPU(s) list: 0-95 Thread(s) per core: 1 Core(s) per socket: 48 Socket(s): 2 NUMA node(s):4 Vendor ID: 0x48 Model: 0 Stepping:0x0 BogoMIPS:200.00 L1d cache: 64K L1i cache: 64K L2 cache:512K L3 cache:32768K NUMA node0 CPU(s): 0-23 NUMA node1 CPU(s): 24-47 NUMA node2 CPU(s): 48-71 NUMA node3 CPU(s): 72-95 Flags: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics cpuid asimdrdm dcpop [Regression Risk] Here's a patch-by patch risk analysis of the changeset: 0001-ACPICA-ACPI-6.2-Additional-PPTT-flags.patch Just adds new #defines. No functional change. 0002-drivers-base-cacheinfo-move-cache_setup_of_node.patch Moves code down in a file. No functional change. (I double-checked that the moved code is the same). 0003-drivers-base-cacheinfo-setup-DT-cache-properties-ear.patch The code this touches is all #ifdef CONFIG_OF, which only applies to the ARM & Power ports of Ubuntu. I've tested on arm64 and regression tested on ppc64el (POWER9). POWER booted fine, and there was no change to lscpu output. 0004-cacheinfo-rename-of_node-to-fw_token.patch Renames a variable, and changes it's type from "struct device_node *" to "void *". No functional change. 0005-arm64-acpi-Create-arch-specific-cpu-to-acpi-id-helpe.patch Adds a new function (but doesn't use it yet). 0006-ACPI-PPTT-Add-Processor-Properties-Topology-Table-pa.patch Adds new code that isn't called yet. 0007-UBUNTU-Config-CONFIG_ACPI_PPTT-y.patch Configures on the new code. 0008-ACPI-Enable-PPTT-support-on-ARM64.patch Kconfig/Makefile bits for the new code. 0009-drivers-base-cacheinfo-Add-support-for-ACPI-based-fi.patch Finally, we call the new code during initialization, so let's go back and look at that code. The first thing it does is to check for the presence of a PPTT table before proceeding, so the regression risk to systems *without* a PPTT table is negligible. The PPTT table was introduced in the ACPI 6.2 specification, which was released in May 2017.
[Kernel-packages] [Bug 1770231] Re: Expose arm64 CPU topology to userspace
This bug is awaiting verification that the kernel in -proposed solves the problem. Please test the kernel and update this bug with the results. If the problem is solved, change the tag 'verification-needed- bionic' to 'verification-done-bionic'. If the problem still exists, change the tag 'verification-needed-bionic' to 'verification-failed- bionic'. If verification is not done by 5 working days from today, this fix will be dropped from the source code, and this bug will be closed. See https://wiki.ubuntu.com/Testing/EnableProposed for documentation how to enable and use -proposed. Thank you! ** Tags added: verification-needed-bionic -- You received this bug notification because you are a member of Kernel Packages, which is subscribed to linux in Ubuntu. https://bugs.launchpad.net/bugs/1770231 Title: Expose arm64 CPU topology to userspace Status in linux package in Ubuntu: In Progress Status in linux source package in Bionic: Fix Committed Bug description: [Impact] Applications, particularly those in the HPC domain (e.g. openmpi), can be optimized for the processor and cache topology. However, the ARM CPU topology isn't correctly exposed to userspace. The kernel's scheduler also uses this information to optimize task placement. [Fix] The ACPI 6.2 specification introduced a Processor Properties Topology Table (PPTT). This is what ARM server vendors are using to expose their topology. The linux kernel needs support for parsing this table, and exposing the parsed topology to userspace. [Test Case] A HiSilicon D06 without the fix. Note that it thinks I'm on a 24-socket system with 4 cores each. I'm not. I'm on a 2 socket system w/ 48 cores each. An HPC app that optimized for this (bogus) topology would therefore suffer a performance penalty. ubuntu@d06-1:~$ lscpu Architecture:aarch64 Byte Order: Little Endian CPU(s): 96 On-line CPU(s) list: 0-95 Thread(s) per core: 1 Core(s) per socket: 4 Socket(s): 24 NUMA node(s):4 Vendor ID: 0x48 Model: 0 Stepping:0x0 BogoMIPS:200.00 NUMA node0 CPU(s): 0-23 NUMA node1 CPU(s): 24-47 NUMA node2 CPU(s): 48-71 NUMA node3 CPU(s): 72-95 Flags: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics cpuid asimdrdm dcpop With the fix (and this is correct): ubuntu@d06-1:~$ lscpu Architecture:aarch64 Byte Order: Little Endian CPU(s): 96 On-line CPU(s) list: 0-95 Thread(s) per core: 1 Core(s) per socket: 48 Socket(s): 2 NUMA node(s):4 Vendor ID: 0x48 Model: 0 Stepping:0x0 BogoMIPS:200.00 L1d cache: 64K L1i cache: 64K L2 cache:512K L3 cache:32768K NUMA node0 CPU(s): 0-23 NUMA node1 CPU(s): 24-47 NUMA node2 CPU(s): 48-71 NUMA node3 CPU(s): 72-95 Flags: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics cpuid asimdrdm dcpop [Regression Risk] Here's a patch-by patch risk analysis of the changeset: 0001-ACPICA-ACPI-6.2-Additional-PPTT-flags.patch Just adds new #defines. No functional change. 0002-drivers-base-cacheinfo-move-cache_setup_of_node.patch Moves code down in a file. No functional change. (I double-checked that the moved code is the same). 0003-drivers-base-cacheinfo-setup-DT-cache-properties-ear.patch The code this touches is all #ifdef CONFIG_OF, which only applies to the ARM & Power ports of Ubuntu. I've tested on arm64 and regression tested on ppc64el (POWER9). POWER booted fine, and there was no change to lscpu output. 0004-cacheinfo-rename-of_node-to-fw_token.patch Renames a variable, and changes it's type from "struct device_node *" to "void *". No functional change. 0005-arm64-acpi-Create-arch-specific-cpu-to-acpi-id-helpe.patch Adds a new function (but doesn't use it yet). 0006-ACPI-PPTT-Add-Processor-Properties-Topology-Table-pa.patch Adds new code that isn't called yet. 0007-UBUNTU-Config-CONFIG_ACPI_PPTT-y.patch Configures on the new code. 0008-ACPI-Enable-PPTT-support-on-ARM64.patch Kconfig/Makefile bits for the new code. 0009-drivers-base-cacheinfo-Add-support-for-ACPI-based-fi.patch Finally, we call the new code during initialization, so let's go back and look at that code. The first thing it does is to check for the presence of a PPTT table before proceeding, so the regression risk to systems *without* a PPTT table is negligible. The PPTT table was introduced in the ACPI 6.2 specification, which was released in May 2017. Regression risk should therefore be restricted to systems manufactured (or firmware updated) after that time that happened to include a PPTT table. I don't know of anyone other than ARM licensees doing this - but it's possible there are others. And, it's possible that there's a table out
[Kernel-packages] [Bug 1770231] Re: Expose arm64 CPU topology to userspace
** Changed in: linux (Ubuntu Bionic) Status: In Progress => Fix Committed -- You received this bug notification because you are a member of Kernel Packages, which is subscribed to linux in Ubuntu. https://bugs.launchpad.net/bugs/1770231 Title: Expose arm64 CPU topology to userspace Status in linux package in Ubuntu: In Progress Status in linux source package in Bionic: Fix Committed Bug description: [Impact] Applications, particularly those in the HPC domain (e.g. openmpi), can be optimized for the processor and cache topology. However, the ARM CPU topology isn't correctly exposed to userspace. The kernel's scheduler also uses this information to optimize task placement. [Fix] The ACPI 6.2 specification introduced a Processor Properties Topology Table (PPTT). This is what ARM server vendors are using to expose their topology. The linux kernel needs support for parsing this table, and exposing the parsed topology to userspace. [Test Case] A HiSilicon D06 without the fix. Note that it thinks I'm on a 24-socket system with 4 cores each. I'm not. I'm on a 2 socket system w/ 48 cores each. An HPC app that optimized for this (bogus) topology would therefore suffer a performance penalty. ubuntu@d06-1:~$ lscpu Architecture:aarch64 Byte Order: Little Endian CPU(s): 96 On-line CPU(s) list: 0-95 Thread(s) per core: 1 Core(s) per socket: 4 Socket(s): 24 NUMA node(s):4 Vendor ID: 0x48 Model: 0 Stepping:0x0 BogoMIPS:200.00 NUMA node0 CPU(s): 0-23 NUMA node1 CPU(s): 24-47 NUMA node2 CPU(s): 48-71 NUMA node3 CPU(s): 72-95 Flags: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics cpuid asimdrdm dcpop With the fix (and this is correct): ubuntu@d06-1:~$ lscpu Architecture:aarch64 Byte Order: Little Endian CPU(s): 96 On-line CPU(s) list: 0-95 Thread(s) per core: 1 Core(s) per socket: 48 Socket(s): 2 NUMA node(s):4 Vendor ID: 0x48 Model: 0 Stepping:0x0 BogoMIPS:200.00 L1d cache: 64K L1i cache: 64K L2 cache:512K L3 cache:32768K NUMA node0 CPU(s): 0-23 NUMA node1 CPU(s): 24-47 NUMA node2 CPU(s): 48-71 NUMA node3 CPU(s): 72-95 Flags: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics cpuid asimdrdm dcpop [Regression Risk] Here's a patch-by patch risk analysis of the changeset: 0001-ACPICA-ACPI-6.2-Additional-PPTT-flags.patch Just adds new #defines. No functional change. 0002-drivers-base-cacheinfo-move-cache_setup_of_node.patch Moves code down in a file. No functional change. (I double-checked that the moved code is the same). 0003-drivers-base-cacheinfo-setup-DT-cache-properties-ear.patch The code this touches is all #ifdef CONFIG_OF, which only applies to the ARM & Power ports of Ubuntu. I've tested on arm64 and regression tested on ppc64el (POWER9). POWER booted fine, and there was no change to lscpu output. 0004-cacheinfo-rename-of_node-to-fw_token.patch Renames a variable, and changes it's type from "struct device_node *" to "void *". No functional change. 0005-arm64-acpi-Create-arch-specific-cpu-to-acpi-id-helpe.patch Adds a new function (but doesn't use it yet). 0006-ACPI-PPTT-Add-Processor-Properties-Topology-Table-pa.patch Adds new code that isn't called yet. 0007-UBUNTU-Config-CONFIG_ACPI_PPTT-y.patch Configures on the new code. 0008-ACPI-Enable-PPTT-support-on-ARM64.patch Kconfig/Makefile bits for the new code. 0009-drivers-base-cacheinfo-Add-support-for-ACPI-based-fi.patch Finally, we call the new code during initialization, so let's go back and look at that code. The first thing it does is to check for the presence of a PPTT table before proceeding, so the regression risk to systems *without* a PPTT table is negligible. The PPTT table was introduced in the ACPI 6.2 specification, which was released in May 2017. Regression risk should therefore be restricted to systems manufactured (or firmware updated) after that time that happened to include a PPTT table. I don't know of anyone other than ARM licensees doing this - but it's possible there are others. And, it's possible that there's a table out there that tickles a bug in the parsing code. Should that be the case, a hotfix would be to use an initrd to override/strip[*] the PPTT from the XSDT table until a suitable fix is put in place. 0010-arm64-Add-support-for-ACPI-based-firmware-tables.patch 0011-arm64-topology-rename-cluster_id.patch 0012-arm64-topology-enable-ACPI-PPTT-based-CPU-topology.patch These patches only touch arm64 code. I explicitly tested on an arm64 server. 0013-ACPI-Add-PPTT-to-injectable-table-list.patch Allows users to override the PPTT table. No change to default
[Kernel-packages] [Bug 1770231] Re: Expose arm64 CPU topology to userspace
** Description changed: [Impact] Applications, particularly those in the HPC domain (e.g. openmpi), can be optimized for the processor and cache topology. However, the ARM CPU topology isn't correctly exposed to userspace. [Fix] The ACPI 6.2 specification introduced a Processor Properties Topology Table (PPTT). This is what ARM server vendors are using to expose their topology. The linux kernel needs support for parsing this table, and exposing the parsed topology to userspace. [Test Case] A HiSilicon D06 without the fix. Note that it thinks I'm on a 24-socket system with 4 cores each. I'm not. I'm on a 2 socket system w/ 48 cores each. An HPC app that optimized for this (bogus) topology would therefore suffer a performance penalty. ubuntu@d06-1:~$ lscpu Architecture:aarch64 Byte Order: Little Endian CPU(s): 96 On-line CPU(s) list: 0-95 Thread(s) per core: 1 Core(s) per socket: 4 Socket(s): 24 NUMA node(s):4 Vendor ID: 0x48 Model: 0 Stepping:0x0 BogoMIPS:200.00 NUMA node0 CPU(s): 0-23 NUMA node1 CPU(s): 24-47 NUMA node2 CPU(s): 48-71 NUMA node3 CPU(s): 72-95 Flags: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics cpuid asimdrdm dcpop With the fix (and this is correct): ubuntu@d06-1:~$ lscpu Architecture:aarch64 Byte Order: Little Endian CPU(s): 96 On-line CPU(s) list: 0-95 Thread(s) per core: 1 Core(s) per socket: 48 Socket(s): 2 NUMA node(s):4 Vendor ID: 0x48 Model: 0 Stepping:0x0 BogoMIPS:200.00 L1d cache: 64K L1i cache: 64K L2 cache:512K L3 cache:32768K NUMA node0 CPU(s): 0-23 NUMA node1 CPU(s): 24-47 NUMA node2 CPU(s): 48-71 NUMA node3 CPU(s): 72-95 Flags: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics cpuid asimdrdm dcpop [Regression Risk] Here's a patch-by patch risk analysis of the changeset: 0001-ACPICA-ACPI-6.2-Additional-PPTT-flags.patch Just adds new #defines. No functional change. 0002-drivers-base-cacheinfo-move-cache_setup_of_node.patch Moves code down in a file. No functional change. (I double-checked that the moved code is the same). 0003-drivers-base-cacheinfo-setup-DT-cache-properties-ear.patch - The code this touches is all #ifdef CONFIG_OF, which only applies to the ARM & Power ports of Ubuntu. I've tested on ARM. + The code this touches is all #ifdef CONFIG_OF, which only applies to the ARM & Power ports of Ubuntu. I've tested on arm64 and regression tested on ppc64el (POWER9). POWER booted fine, and there was no change to lscpu output. 0004-cacheinfo-rename-of_node-to-fw_token.patch Renames a variable, and changes it's type from "struct device_node *" to "void *". No functional change. 0005-arm64-acpi-Create-arch-specific-cpu-to-acpi-id-helpe.patch Adds a new function (but doesn't use it yet). 0006-ACPI-PPTT-Add-Processor-Properties-Topology-Table-pa.patch Adds new code that isn't called yet. 0007-UBUNTU-Config-CONFIG_ACPI_PPTT-y.patch Configures on the new code. 0008-ACPI-Enable-PPTT-support-on-ARM64.patch Kconfig/Makefile bits for the new code. 0009-drivers-base-cacheinfo-Add-support-for-ACPI-based-fi.patch Finally, we call the new code during initialization, so let's go back and look at that code. The first thing it does is to check for the presence of a PPTT table before proceeding, so the regression risk to systems *without* a PPTT table is negligible. The PPTT table was introduced in the ACPI 6.2 specification, which was released in May 2017. Regression risk should therefore be restricted to systems manufactured (or firmware updated) after that time that happened to include a PPTT table. I don't know of anyone other than ARM licensees doing this - but it's possible there are others. And, it's possible that there's a table out there that tickles a bug in the parsing code. Should that be the case, a hotfix would be to use an initrd to override/strip[*] the PPTT from the XSDT table until a suitable fix is put in place. 0010-arm64-Add-support-for-ACPI-based-firmware-tables.patch 0011-arm64-topology-rename-cluster_id.patch 0012-arm64-topology-enable-ACPI-PPTT-based-CPU-topology.patch These patches only touch arm64 code. I explicitly tested on an arm64 server. 0013-ACPI-Add-PPTT-to-injectable-table-list.patch Allows users to override the PPTT table. No change to default behavior. + 0014-arm64-topology-divorce-MC-scheduling-domain-from-cor.patch + Only touches arm64 code. I explicitly tested on an arm64 server. + [*] https://www.kernel.org/doc/Documentation/acpi/initrd_table_override.txt ** Description changed: [Impact] - Applications, particularly those in the HPC domain
[Kernel-packages] [Bug 1770231] Re: Expose arm64 CPU topology to userspace
** Changed in: linux (Ubuntu Bionic) Assignee: (unassigned) => dann frazier (dannf) ** Description changed: [Impact] Applications, particularly those in the HPC domain (e.g. openmpi), can be optimized for the processor and cache topology. However, the ARM CPU topology isn't correctly exposed to userspace. [Fix] - The ACPI 6.2 specification introduced a Processor Properties Topology Table (PPTT). The linux kernel needs support for parsing this table, and exposing the parsed topology to userspace. + The ACPI 6.2 specification introduced a Processor Properties Topology Table (PPTT). This is what ARM server vendors are using to expose their topology. The linux kernel needs support for parsing this table, and exposing the parsed topology to userspace. [Test Case] - A HiSilicon D06 without the fix: + A HiSilicon D06 without the fix. Note that it thinks I'm on a 24-socket system with 4 cores each. I'm not. I'm on a 2 socket system w/ 48 cores each. ubuntu@d06-1:~$ lscpu Architecture:aarch64 Byte Order: Little Endian CPU(s): 96 On-line CPU(s) list: 0-95 Thread(s) per core: 1 Core(s) per socket: 4 Socket(s): 24 NUMA node(s):4 Vendor ID: 0x48 Model: 0 Stepping:0x0 BogoMIPS:200.00 NUMA node0 CPU(s): 0-23 NUMA node1 CPU(s): 24-47 NUMA node2 CPU(s): 48-71 NUMA node3 CPU(s): 72-95 Flags: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics cpuid asimdrdm dcpop - With the fix: + With the fix (and this is correct): ubuntu@d06-1:~$ lscpu Architecture:aarch64 Byte Order: Little Endian CPU(s): 96 On-line CPU(s) list: 0-95 Thread(s) per core: 1 Core(s) per socket: 48 Socket(s): 2 NUMA node(s):4 Vendor ID: 0x48 Model: 0 Stepping:0x0 BogoMIPS:200.00 L1d cache: 64K L1i cache: 64K L2 cache:512K L3 cache:32768K NUMA node0 CPU(s): 0-23 NUMA node1 CPU(s): 24-47 NUMA node2 CPU(s): 48-71 NUMA node3 CPU(s): 72-95 Flags: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics cpuid asimdrdm dcpop + [Regression Risk] + Here's a patch-by patch risk analysis of the changeset: - [Regression Risk] - TBD + 0001-ACPICA-ACPI-6.2-Additional-PPTT-flags.patch + Just adds new #defines. No functional change. + + 0002-drivers-base-cacheinfo-move-cache_setup_of_node.patch + Moves code down in a file. No functional change. (I double-checked that the moved code is the same). + + 0003-drivers-base-cacheinfo-setup-DT-cache-properties-ear.patch + The code this touches is all #ifdef CONFIG_OF, which only applies to the ARM & Power ports of Ubuntu. I've tested on ARM. + + 0004-cacheinfo-rename-of_node-to-fw_token.patch + Renames a variable, and changes it's type from "struct device_node *" to "void *". No functional change. + + 0005-arm64-acpi-Create-arch-specific-cpu-to-acpi-id-helpe.patch + Adds a new function (but doesn't use it yet). + + 0006-ACPI-PPTT-Add-Processor-Properties-Topology-Table-pa.patch + Adds new code that isn't called yet. + + 0007-UBUNTU-Config-CONFIG_ACPI_PPTT-y.patch + Configures on the new code. + + 0008-ACPI-Enable-PPTT-support-on-ARM64.patch + Kconfig/Makefile bits for the new code. + + 0009-drivers-base-cacheinfo-Add-support-for-ACPI-based-fi.patch + Finally, we call the new code during initialization, so let's go back and look at that code. The first thing it does is to check for the presence of a PPTT table before proceeding, so the regression risk to systems *without* a PPTT table is negligible. The PPTT table was introduced in the ACPI 6.2 specification, which was released in May 2017. Regression risk should therefore be restricted to systems manufactured (or firmware updated) after that time that happened to include a PPTT table. I don't know of anyone other than ARM licensees doing this - but it's possible there are others. And, it's possible that there's a table out there that tickles a bug in the parsing code. Should that be the case, a hotfix would be to use an initrd to override/strip the PPTT from the XSDT table until a suitable fix is put in place. + + 0010-arm64-Add-support-for-ACPI-based-firmware-tables.patch + 0011-arm64-topology-rename-cluster_id.patch + 0012-arm64-topology-enable-ACPI-PPTT-based-CPU-topology.patch + These patches only touch arm64 code. I explicitly tested on an arm64 server. + + 0013-ACPI-Add-PPTT-to-injectable-table-list.patch + Allows users to override the PPTT table. No change to default behavior. ** Changed in: linux (Ubuntu Bionic) Status: New => In Progress ** Description changed: [Impact] Applications, particularly those in the HPC domain (e.g. openmpi), can be optimized for the processor and cache topology. However, the ARM CPU topology isn't correctly
[Kernel-packages] [Bug 1770231] Re: Expose arm64 CPU topology to userspace
** Description changed: [Impact] Applications, particularly those in the HPC domain (e.g. openmpi), can be optimized for the processor and cache topology. However, the ARM CPU topology isn't correctly exposed to userspace. [Fix] The ACPI 6.2 specification introduced a Processor Properties Topology Table (PPTT). The linux kernel needs support for parsing this table, and exposing the parsed topology to userspace. + [Test Case] - TBD + A HiSilicon D06 without the fix: + + ubuntu@d06-1:~$ lscpu + Architecture:aarch64 + Byte Order: Little Endian + CPU(s): 96 + On-line CPU(s) list: 0-95 + Thread(s) per core: 1 + Core(s) per socket: 4 + Socket(s): 24 + NUMA node(s):4 + Vendor ID: 0x48 + Model: 0 + Stepping:0x0 + BogoMIPS:200.00 + NUMA node0 CPU(s): 0-23 + NUMA node1 CPU(s): 24-47 + NUMA node2 CPU(s): 48-71 + NUMA node3 CPU(s): 72-95 + Flags: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics cpuid asimdrdm dcpop + + With the fix: + ubuntu@d06-1:~$ lscpu + Architecture:aarch64 + Byte Order: Little Endian + CPU(s): 96 + On-line CPU(s) list: 0-95 + Thread(s) per core: 1 + Core(s) per socket: 48 + Socket(s): 2 + NUMA node(s):4 + Vendor ID: 0x48 + Model: 0 + Stepping:0x0 + BogoMIPS:200.00 + L1d cache: 64K + L1i cache: 64K + L2 cache:512K + L3 cache:32768K + NUMA node0 CPU(s): 0-23 + NUMA node1 CPU(s): 24-47 + NUMA node2 CPU(s): 48-71 + NUMA node3 CPU(s): 72-95 + Flags: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics cpuid asimdrdm dcpop + [Regression Risk] TBD -- You received this bug notification because you are a member of Kernel Packages, which is subscribed to linux in Ubuntu. https://bugs.launchpad.net/bugs/1770231 Title: Expose arm64 CPU topology to userspace Status in linux package in Ubuntu: In Progress Status in linux source package in Bionic: New Bug description: [Impact] Applications, particularly those in the HPC domain (e.g. openmpi), can be optimized for the processor and cache topology. However, the ARM CPU topology isn't correctly exposed to userspace. [Fix] The ACPI 6.2 specification introduced a Processor Properties Topology Table (PPTT). The linux kernel needs support for parsing this table, and exposing the parsed topology to userspace. [Test Case] A HiSilicon D06 without the fix: ubuntu@d06-1:~$ lscpu Architecture:aarch64 Byte Order: Little Endian CPU(s): 96 On-line CPU(s) list: 0-95 Thread(s) per core: 1 Core(s) per socket: 4 Socket(s): 24 NUMA node(s):4 Vendor ID: 0x48 Model: 0 Stepping:0x0 BogoMIPS:200.00 NUMA node0 CPU(s): 0-23 NUMA node1 CPU(s): 24-47 NUMA node2 CPU(s): 48-71 NUMA node3 CPU(s): 72-95 Flags: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics cpuid asimdrdm dcpop With the fix: ubuntu@d06-1:~$ lscpu Architecture:aarch64 Byte Order: Little Endian CPU(s): 96 On-line CPU(s) list: 0-95 Thread(s) per core: 1 Core(s) per socket: 48 Socket(s): 2 NUMA node(s):4 Vendor ID: 0x48 Model: 0 Stepping:0x0 BogoMIPS:200.00 L1d cache: 64K L1i cache: 64K L2 cache:512K L3 cache:32768K NUMA node0 CPU(s): 0-23 NUMA node1 CPU(s): 24-47 NUMA node2 CPU(s): 48-71 NUMA node3 CPU(s): 72-95 Flags: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics cpuid asimdrdm dcpop [Regression Risk] TBD To manage notifications about this bug go to: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1770231/+subscriptions -- Mailing list: https://launchpad.net/~kernel-packages Post to : kernel-packages@lists.launchpad.net Unsubscribe : https://launchpad.net/~kernel-packages More help : https://help.launchpad.net/ListHelp
[Kernel-packages] [Bug 1770231] Re: Expose arm64 CPU topology to userspace
** Changed in: linux (Ubuntu) Status: Incomplete => In Progress ** Changed in: linux (Ubuntu) Assignee: (unassigned) => dann frazier (dannf) ** Also affects: linux (Ubuntu Bionic) Importance: Undecided Status: New ** Description changed: [Impact] Applications, particularly those in the HPC domain (e.g. openmpi), can be optimized for the processor and cache topology. However, the ARM CPU topology isn't correctly exposed to userspace. [Fix] - The ACPI 6.2 specification introduced a Processor Properties Topology Table (PPTT). The linux kernel needs support for parsing this table, and exposing the parsed topology to userspace. This is currently a work-in-progress upstream. - + The ACPI 6.2 specification introduced a Processor Properties Topology Table (PPTT). The linux kernel needs support for parsing this table, and exposing the parsed topology to userspace. [Test Case] TBD [Regression Risk] TBD -- You received this bug notification because you are a member of Kernel Packages, which is subscribed to linux in Ubuntu. https://bugs.launchpad.net/bugs/1770231 Title: Expose arm64 CPU topology to userspace Status in linux package in Ubuntu: In Progress Status in linux source package in Bionic: New Bug description: [Impact] Applications, particularly those in the HPC domain (e.g. openmpi), can be optimized for the processor and cache topology. However, the ARM CPU topology isn't correctly exposed to userspace. [Fix] The ACPI 6.2 specification introduced a Processor Properties Topology Table (PPTT). The linux kernel needs support for parsing this table, and exposing the parsed topology to userspace. [Test Case] TBD [Regression Risk] TBD To manage notifications about this bug go to: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1770231/+subscriptions -- Mailing list: https://launchpad.net/~kernel-packages Post to : kernel-packages@lists.launchpad.net Unsubscribe : https://launchpad.net/~kernel-packages More help : https://help.launchpad.net/ListHelp
