Re: [kicad-users] Free PCB Service
Looks good if you are in England. Would they operate to out side of England? Derek Koonce DDK Interactive Consulting Services Robert wrote: Strictly speaking this is off-topic, but given that kicad is used by hobbyists a free PCB service is likely to be of interest: http://www.spiritcircuits.com/services/go-naked It sounds a lot better than dissolving copper very slowly in all the wrong places with with ferric chloride, but it also sounds too good to be true? Anyone tried this service? What's the catch? Regards, Robert.
[kicad-users] Gerber file request
I was wondering if anyone had a gerber set of file for a DB25 cable break-out. Male on one end and female on the other. Then test points for each line. I see this as a small PCB with connectors on either end and a simple fan-out of traces with points to probe. Nothing fancy. Just trying to save time putting one together. -- Derek Koonce
Re: [kicad-users] Re: Stitching ground planes with vias
Sorry I'm coming in late, but if the end goal is to do heat transfer from one board layer to the other, run a route as suggested - top to bottom to top to bottom. Then define a copper plane around the matrix of vias on each side of the PCB. This should attach all vias to the copper. Derek Koonce DDK Interactive Consulting Services Thomas Giesel wrote: Hi Alson, How do you handle these connections that only appear on the PCB and not in the schematic, and more specifically, stitching ground planes with vias? I'm not sure if I understand your question correctly. But if I do, this may help: Start a track somewhere you have a ground connection anyway (e.g. a component), then draw it once around the PCB. Do as many vias as you need in this track, so it changes back and forth. From side view it looks like this now: --__--__--__--_ Then you can connect these vias on top layer: _ _ _ _ _ _ And than you can add a ground plane on bottom layer if you want. Does this work for you? Regards, Thomas
Re: [kicad-users] Re: Urgent drl file problem
View it with a text editor as well to confirm ASCII. Derek Koonce DDK Interactive Consulting Services Lorenzo wrote: I think they don't know even what they're talking about... kicad generates a pretty standard Excellon drill tape, with tool headers, too! And, as you correctly said, excellon is ASCII::P:P Never had any trouble fabbing with it... try to get them explaining exactly what kind of file they need, if possible tell them to send an example... I don't think that exist a pcb drill machine which can't read excellon tapes... As a double check you could try to view it with gerbv, to see if it matches the gerbers
Re: [kicad-users] A friendly forum for electronic hobbyists
Yahoo groups - Electronics_101 - could be a good start to asking questions. Derek Koonce DDK Interactive Consulting Services yukku yukkoo wrote: Hi all, Sorry to ask a question not comletely related to Kicad. I like Kicad very much. Do you know of an equally friendly mailing list where newbies can get in touch with experts on electronics circuit design and component behaviour ? Thank you (in advance) very much , I appreciate your response. Regards Yukku
Re: [kicad-users] rework/unsoldering
Speaking of re-filling the gap with another solder, there is a nice product I discovered some years back that helps in this category. It is called ChipQuik. It can be picked up on DigiKey, Newark, and Jameco. This is Pb-free. Manufacturer web site is www.chipquik.com. Nice product. Get a sample and check it out. Wicks up very well and helps more so with the multi-lead SMD devices as well. Another trick for the SMD devices such as SO and TSSOP type packages is the use of a small wire to lift leads. Since this is not KiCAD related, I'll take private responses and I'll see how to best describe in words the trick. Derek Koonce Bernd Wiebus wrote: Hello Juliorz I am experiencing problems with a board that I design using KICAD. It is almost impossible to remove all solder from a hole. I am wondering if I have enough clearance between the component lead and hole. I knew this problem, too. I see it very common at rework. And, indeed, it mostly comes from a to small gap between the component lead and the hole. But it is common for all layout programs, not only kicad. The reason is. that therev has to be made a decision between easy rework and save keeping the component in place during transport, if the component is assembled, but not yet soldered. In most cases, the decision ist made for production, not for rework. If you made the decision designing for rework, you should create your own modules, by taking the original modules and change the hole diameters. Sometimes you will also get a conflict between hole diameter, annular around the hole, an isolation gab to the next pin. Even after I use heat to remove the component, getting all the solder out of the empty hole is very difficult using traditional industry techniques. This could also happen if you use leadfree solder. If you have no safety problem in using leaded solder, swamp the gap with leaded solder, because this decreases the melting point. But be aware, that there could be a safety/reliability problem mixing different solder types, especial mixing stibium alloyed solder and lead alloyed solder. Next what you could do, is using fluxing agent. Take colophony (wood resin) and dissolve it with isopropanole. This will make a good fluxing agent. At very bad cases, use stearine as fluxing agent. Use simple a pure stearine candle. But be aware, most candles are not made from stearine but from paraffine. Paraffine will omly create a charred mess at your board. for the holes or if this is an issue to do with the manufacturing company that is making the boards for me?? This could also be a reason. You have the board, you can measure this. Look also at the component leads, too. Perhaps they are exeptionel thick? With best regards: Bernd Wiebus -- GMX DSL: Internet, Telefon und Entertainment für nur 19,99 EUR/mtl.! http://portal.gmx.net/de/go/dsl02 http://portal.gmx.net/de/go/dsl02 Please read the Kicad FAQ in the group files section before posting your question. Please post your bug reports here. They will be picked up by the creator of Kicad. Please visit http://www.kicadlib.org for details of how to contribute your symbols/modules to the kicad library. For building Kicad from source and other development questions visit the kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups Links * To visit your group on the web, go to: http://groups.yahoo.com/group/kicad-users/ * Your email settings: Individual Email | Traditional * To change settings online go to: http://groups.yahoo.com/group/kicad-users/join (Yahoo! ID required) * To change settings via email: kicad-users-dig...@yahoogroups.com kicad-users-fullfeatu...@yahoogroups.com * To unsubscribe from this group, send an email to: kicad-users-unsubscr...@yahoogroups.com * Your use of Yahoo! Groups is subject to: http://docs.yahoo.com/info/terms/
Re: [kicad-users] Non-Populated or Non-Installed parts...
I use the part value of open with the reference designator. No other properties used. Thus the open parts would show up on the BOM that is easily removed. They transfer to the layout. Derek Koonce john_henn...@bellsouth.net wrote: Does anyone have a good way of showing inidividual parts as being 'Not-Installed' or 'Not-Populated'? That way, they appear on the schematic as reference only (either grayed-out, or dashed lined), they are not included on the bill of materials, and the footprint of the part still gets included in the layout of the pcb.
Re: [kicad-users] Re: Formal Checking Method for PCB Designs
No problem. It has been moved. Derek Koonce Robert wrote: Here is one a bit more encompassing that covers schematic, PCB and even system-level checks. These are out there on the web and I pulled together these two complete lists that are in the one DOC file. There's some useful stuff in there. I can see that the two could perhaps be combined, but for the moment IMHO it would be sensible to have files on how to check designs together in one directory. Are you able to save your file in my FormalCheckingMethod directory? If so, I'll rename my directory to something more general. I do like the focused PCB one you posted. Thank you. My own goal was to create something that catches all the show-stoppers and some of the more annoying errors without creating something that is so long and complicated it never gets used. However, as I was writing the guidance notes I realised it could do with links to more detail. Regards, Robert. No virus found in this outgoing message. Checked by AVG - www.avg.com Version: 9.0.733 / Virus Database: 271.1.1/2689 - Release Date: 02/15/10 07:35:00 Please read the Kicad FAQ in the group files section before posting your question. Please post your bug reports here. They will be picked up by the creator of Kicad. Please visit http://www.kicadlib.org for details of how to contribute your symbols/modules to the kicad library. For building Kicad from source and other development questions visit the kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups Links * To visit your group on the web, go to: http://groups.yahoo.com/group/kicad-users/ * Your email settings: Individual Email | Traditional * To change settings online go to: http://groups.yahoo.com/group/kicad-users/join (Yahoo! ID required) * To change settings via email: kicad-users-dig...@yahoogroups.com kicad-users-fullfeatu...@yahoogroups.com * To unsubscribe from this group, send an email to: kicad-users-unsubscr...@yahoogroups.com * Your use of Yahoo! Groups is subject to: http://docs.yahoo.com/info/terms/
[kicad-users] Re: Formal Checking Method for PCB Designs
Here is one a bit more encompassing that covers schematic, PCB and even system-level checks. These are out there on the web and I pulled together these two complete lists that are in the one DOC file. http://tech.groups.yahoo.com/group/kicad-users/files/Design checklist.doc I do like the focused PCB one you posted. Derek Koonce --- In kicad-users@yahoogroups.com, Robert birmingham_spi...@... wrote: As promised I've uploaded files relating to the formal checking method I developed for checking the PCBs I design: http://tech.groups.yahoo.com/group/kicad-users/files/FormalCheckingMethod/ Although created using OpenOffice, I've uploaded the files in MS Office 97 format and HTML format to maximise their accessibility. The HTML version of the spreadsheet is a bit crummy, but it needs to be a totally ubiquitous format that allows editing of tables and I can't think of anything better for anyone who can't or wont open an old Microsoft format file. So far it's proved effective, but I continue to develop it and I'm sure others will have their own contributions based on their personal experience. I hope you find it helpful. Regards, Robert. No virus found in this outgoing message. Checked by AVG - www.avg.com Version: 9.0.733 / Virus Database: 271.1.1/2682 - Release Date: 02/11/10 16:09:00
[kicad-users] Re: import schematics from Orcad capture - and PCB too
I'd be interested in the same tool. Also, can I port over my PCB layouts? I have lots of designs in the OrCAD SDT 386 format. Redderek --- In kicad-users@yahoogroups.com, Carlos Camargo cicamarg...@... wrote: Hi I have a lot of orcad capture Designs, and I want to convert them to kicad, There's any tool for make this change? Best Regards Carlos
Re: [kicad-users] Reading Netlist In PCBNew
Hi Fred, Try the compile button, 2 below the read netlist button. Regards Derek - Original Message - From: Fred Erickson To: kicad-users@yahoogroups.com Sent: Monday, September 04, 2006 6:56 AM Subject: [kicad-users] Reading Netlist In PCBNew I have the start of a new design in PCBNew with the rat's nest showing. I made some changes to the schematic and created a new netlist in Eeschema. In PCBNew I performed a netlist read but the nets in the rat's nest did not change. I verified that the changes had occurred properly in the netlist. The signals on the pads in PCBNew did not change. Does anyone know what I'm doing wrong in the netlist read operation in PCBNew?Fred __._,_.___ Please read the Kicad FAQ in the group files section before posting your question. Please post your bug reports here. They will be picked up by the creator of Kicad. Please contribute your symbols/modules to the library folder in the group files section. For building Kicad from source and other development questions visit the kicad-devel group at http://groups.yahoo.com/group/kicad-devel SPONSORED LINKS Open source database Open source cms Open source help desk software Open source software Free open source software YAHOO! GROUPS LINKS Visit your group "kicad-users" on the web. To unsubscribe from this group, send an email to:[EMAIL PROTECTED] Your use of Yahoo! Groups is subject to the Yahoo! Terms of Service. __,_._,___
Re: [kicad-users] Help with netlist import error
Hi David, I am sorry to say that the Accel file is in a very different format to the tango format. I have written my converter for my own use and hoped that others might benefit. Sigh! Perhaps Renie can help. He did mention P-CAD in his ToKicad introduction on his website. If you go to the google translator. http://www.google.com/language_tools and place Renie's website address www.reniemarquet.cjb.net in the Translate a web page field and select Portuguese to English then you can read all the text. Regards Derek - Original Message - From: David Novak [EMAIL PROTECTED] To: [EMAIL PROTECTED] Sent: Friday, June 09, 2006 7:59 PM Subject: Re: [kicad-users] Help with netlist import error Derek, See the attached file. My Accel v14 file was binary, but I did manage to get it converted to P-CAD 2004 ASCII. Thanks for investigating this. Any plans to convert schematics in future versions? Thanks, David -Original Message- From: derek_noffke [mailto:[EMAIL PROTECTED] Sent: Friday, June 09, 2006 1:21 PM To: kicad-users@yahoogroups.com Subject: [kicad-users] Re: Help with netlist import error Hi David, I only have the older Tango so I do not know. If you send me a sample (ascii format) PCB file I will take a look. Regards Derek --- In kicad-users@yahoogroups.com, David Novak [EMAIL PROTECTED] wrote: Derek, I missed that the first time because I didn't have the ini file in the same directory. However, even when I choose english, there is still a bunch of non-english. Do either of these programs convert from Accel v14? Thank you for the tip and additional conversion tool! David -Original Message- From: derek_noffke [mailto:[EMAIL PROTECTED] Sent: Friday, June 09, 2006 11:37 AM To: kicad-users@yahoogroups.com Subject: [kicad-users] Re: Help with netlist import error Hi David, Renie's program does have an english language option on the menu (second menu item). Please feel free to try my converter. http://www.purpleswift.com/Other/other.htm It has taken me 4 days to write. I hope that someone else finds it useful. Regards Derek --- In kicad-users@yahoogroups.com, David Novak david@ wrote: Renie, Are you planning an english translation? David -Original Message- From: Renie [mailto:[EMAIL PROTECTED] Sent: Tuesday, June 06, 2006 8:15 AM To: kicad-users@yahoogroups.com Subject: [kicad-users] Re: Help with netlist import error Hi Derek! I all read did a converter from Tango to Kicad, these convert eschema and pcb files, generate all files, .pro, .sch, .lib, .cmp, .mod and .brd. The program is beta release, ToKicad.exe, avaliable in my site www.reniemarquet.cjb.net page Espaço Kicad. []'s Renie --- In kicad-users@yahoogroups.com, derek_noffke derek01@ wrote: Found the problem. In the CMP file IdModule = RES500; There was an extra space after the = --- In kicad-users@yahoogroups.com, derek_noffke derek01@ wrote: I am writing a converter program to generate KiCAD BRD files from Tango PCB files. The BRD file seems to work OK but the netlist file that I have generated (to check the conversion) gives errors. I made a simple example with 2 resistors. Below are the generated BRD, CMP and NET files. Any help would be appreciated. Regards Derek Noffke BRD file PCBNEW-BOARD Version 1 date 9/4/2006-17:13:00 $TRACK Po 0 146230 116620 151410 116620 240 -1 De 0 0 0 0 0 $EndTRACK $TEXTPCB Te Hello Po 143107 118615 360 600 100 0 De 21 1 0 0 $EndTEXTPCB $MODULE RES500 Po 141220 116610 0 15 0 0 ~~ Li RES500 Cd Imported from tango Kw TANGO Sc 0 Op 0 0 0 $PAD Sh A R 600 600 0 0 0 Dr 380 0 0 At STD N 00888000 Ne 0 Po 0 0 $EndPAD $PAD Sh B R 600 2000 0 0 0 Dr 380 0 0 At STD N 00888000 Ne 0 Po 5000 0 $EndPAD T0 1085 -1300 360 600 0 100 N V 21 R1 T1 1085 -1300 360 600 0 100 N I 21 value??? T2 1315 1200 360 600 0 100 N I 21 22k DS 1000 500 1000 -500 100 21 DS 1000 500 4000 500 100 21 DS 4000 500 4000 -500 100 21 DS 1000 -500 4000 -500 100 21 $EndMODULE RES500 $MODULE RES500 Po 151400 116660 0 15 0 0 ~~ Li RES500 Cd Imported from tango Kw TANGO Sc 0 Op 0 0 0 $PAD Sh B O 600 600 0 0 0 Dr 380 0 0 At STD N 00888000 Ne 0 Po 5000 0 $EndPAD $PAD Sh A R 600 600 0 0 0 Dr 380 0 0 At STD N 00888000 Ne 0 Po 0 0 $EndPAD T2 2030 1200 360 600 0 100 N I 21 default T0 1085 -1300 360 600 0 100 N V 21 R2 T1 1085 -1300 360 600 0 100 N I 21 22k DS 1000 -500 4000 -500 100 21 DS 4000 500 4000 -500 100 21 DS 1000 500 4000 500 100 21 DS 1000 500 1000 -500 100 21 $EndMODULE RES500 $EndBOARD CMP file Cmp-Mod V01 Genere par Cvpcb 17-jan le 5/6/2006
