Re: [kicad-users] vias in a pad?

2010-08-25 Thread Robert
I'm not sure this is what the OP was trying to do, but there is surely 
an easier way of stitching ground planes.   Starting from a ground node 
draw a track to the location of the first via, right click to place a 
via, move to the position of the next via, right click to place a via, 
and so on.   When you create the two ground planes the stitching track 
will effectively disappear on both sides, and the two sides will be 
electrically bonded together.   It worked for me at least :).

Regards,

Robert.

On 24/08/2010 23:59, Alain Mouette wrote:
 I was doing a Radio UHF transmitter this month and having viaa in the
 ground place was mandatory. I finaly found that is is *very* simple:

 * In this example, ground id mostly in the bottom layer
 * start a track in the botom layer from a nearby ground track
 * change layers so that a Via is added
 * double-click to end the track
 * go back to the bottom layer and do it again, many times :)

 It is fast enough, and easy.

 Alain

 Em 24-08-2010 09:33, James Moody escreveu:


 A number of components I've come across lately (DC motor controller
 chips, ESD protection devices, for example) have a thermal or ground pad
 underneath the chip. This requires that a large pad be included in the
 footprint, and the usual recommendation is that several vias are used in
 this pad to connect it to the ground layer. This is also part of the
 thermal management scheme.

 For example, if you look at page 10 of the datasheet for the Allegro
 A4983, it describes how to lay out the board. It shows 9 vias in the
 under-chip pad used to aid in solder flow and heat transfer.

 My first thought for how to do this in KiCad was to define a bunch of
 vias on the board. My second thought was to change the module so that
 the large pad was actually several small pads butt up against each
 other, tiled together to make one large pad, and have each pad be a
 through-hole style pad with a very narrow drill.

 Is there a better approach or feature I've missed?
 Thanks.
 --Jim


 

 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
 Links






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Re: [kicad-users] Multiple track widths per net.

2010-08-25 Thread Robert
Select Design Rules...Design Rules, and under the Global Design Rules 
tab set a Custom Track Width to the special width you require.

Use the track width drop list (just under the File menu) to select your 
custom track width.

Right click on the track segment that needs to be changed, select it if 
prompted, and then select Change Segment Width.

Regards,

Robert.

On 25/08/2010 15:01, Moses O McKnight wrote:
 I've tried all that to no avail.  With an older version of kicad I could
 change the track width in the settings, and then right click and set a
 track to the currently selected width.

 With the latest version of kicad however, it seems that I can only set
 one track width setting for a net, and then it will not let me select
 any other width.  Moreover, the DRC test will flag errors if there are
 any tracks in the net smaller than the setting in the design rules (I
 got this by changing the design rules and changing some of the track
 widths in the net).

 So, in the newest Kicad, is it possible to have multiple track widths on
 one net?

 Thanks,
 Moses

 El mié, 25-08-2010 a las 00:33 +0100, Andy Eskelson escribió:
 Usually right click on the track and change the width does the trick.
 The context menu gives you options to change the net, the track, the
 segment etc.

 You may have to define the track width first if you have not already done so.

 Also if you have routed the entire track as one length, you will have to
 break the track into segments where you want the width change to be.


 Andy


 On Tue, 24 Aug 2010 08:24:30 -0500
 Moses O McKnightmo...@skytex.net  wrote:

 How do I have multiple track widths for a net?  I want most of the net
 to have a wider track, but in certain places it has to be smaller; and
 kicad won't let me make them smaller.

 Thanks,
 Moses




 

 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
 Links






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Re: [kicad-users] vias in a pad?

2010-08-24 Thread Robert
This has been discussed previously.   The Yahoo Groups search tool is 
pretty hopeless so I used Google to search for the relevant thread for 
you, which it found first in mail-archive starting at:

http://www.mail-archive.com/kicad-users@yahoogroups.com/msg06539.html

Does that help?

Regards,

Robert.

On 24/08/2010 13:33, James Moody wrote:
 A number of components I've come across lately (DC motor controller chips,
 ESD protection devices, for example) have a thermal or ground pad underneath
 the chip. This requires that a large pad be included in the footprint, and
 the usual recommendation is that several vias are used in this pad to
 connect it to the ground layer. This is also part of the thermal management
 scheme.

 For example, if you look at page 10 of the datasheet for the Allegro A4983,
 it describes how to lay out the board. It shows 9 vias in the under-chip pad
 used to aid in solder flow and heat transfer.

 My first thought for how to do this in KiCad was to define a bunch of vias
 on the board. My second thought was to change the module so that the large
 pad was actually several small pads butt up against each other, tiled
 together to make one large pad, and have each pad be a through-hole style
 pad with a very narrow drill.

 Is there a better approach or feature I've missed?
 Thanks.
 --Jim





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Re: [kicad-users] Re: Type Err(4) trace near pad issue in Kicad

2010-08-23 Thread Robert
 The error occurs only when I try to create a PCB without schematic
 nor netlist AND with the DRC active. I don't get any error when the
 DRC is OFF, or if I have a schematic and a proper netlist.

That's because you can't have DRC without a netlist; please see my last 
post on this subject for the explanation.

Regards,

Robert.
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[kicad-users] Pin types and power flags

2010-08-22 Thread Robert Bieber
Sorry if these are horrifically stupid questions, I'm just getting 
started out trying to use Kicad.  My first project is putting together a 
simple timer, and I'm running into a little trouble in EEschema dealing 
with pin types and the VCC/GND power ports.

First I had to build a new part for the Atmega328p I'm using, since 
there wasn't one in the library.  I set all the I/O pins to 3 state and 
the VCC/GND pins to power in, which as far as I'm aware is the right way 
to do it...I hope I'm correct there.

Now in my schematic, I've got a battery connected to a power regulator 
with some filtering caps and such, and the ground of all that is 
connected to the GND power port and the 5v output connected to the VCC 
power port, and that seems to working correctly for the most part, as 
I've connected VCC and GND on the 328 to those ports and they're not 
complaining.  There are still a couple of issues, though:

- I have two 74HC595 shift registers in the schematic, the VCC and GND 
pins of which are invisible, but seem to be automatically connected to 
the appropriate power ports.  However, one of them (but not the other) 
is giving me the warning Pin power_in not driven on its GND pin, even 
though I know that the GND port is properly connected to the power 
regulator, and all the other GND connections on the schematic work 
fine.  What could be causing this?

- When I connect the RESET pin on the 328 to VCC, it gives me the 
warning Pin 3state connected to pin power_in.  The warning also 
appears on the VCC pin of one of the shift registers (the same one that 
gives the warning about the undriven GND pin).  Is there anything in 
particular I need to do about this?  I did connect a 3state pin to a 
power in pin, but why is that considered warning-worthy?

Sorry if I'm missing something obvious, and if anyone has a better 
source of documentation than the FAQ on the Kicad site, feel free to 
direct me to it.

-Robert Bieber


Re: [kicad-users] Re: Type Err(4) trace near pad issue in Kicad

2010-08-21 Thread Robert
 Well, I am human! Therefore, when something try to NOT LET ME do
 things, I tend to struggle :) It works when I turn the DRC off, but
 it looks messy, and then I loose the isolation check and the comfort
 of the isolation zones delimited. That's why I would like to keep the
 DRC on...

You can't have DRC without a netlist, because the netlist is what tells 
PCBNew what can and can't be connected.   You can create a netlist 
manually (it's a text file), but the quickest, easiest, most reliable 
way to generate a netlist is with a schematic editor.   I create a 
schematic even for very simple boards because it allows me to leave DRC 
on, ensuring my board is neat and correct first time.   If the schematic 
is purely being used as a means of generating a netlist and I don't have 
the exact component in the library, I save time by improvising with 
something similar (because PCBNew only cares about footprints and 
connectivity, not electrical properties).

I used to use ISIS, and churned out one scrap board after another. 
Since using Kicad (with DRC on) that no longer happens.   Kicad is a far 
better tool for producing boards, but only if you don't force it to 
behave like obsolete software.

Regards,

Robert.


 I don't see how I could make a netlist without drawing a schematic
 first?

 Axel


 --- In kicad-users@yahoogroups.com, Cat Ccatalin_c...@...  wrote:


 Did you turn DRC off?

 That's the purpose of DRC, to NOT LET YOU do things that are not in
 the netlist (among other things).

 If you don't want to make a schematic, make a netlist.



 Cat

 To: kicad-users@yahoogroups.com From: mad...@... Date: Fri, 20
 Aug 2010 23:40:39 + Subject: [kicad-users] Re: Type Err(4)
 trace near pad issue in Kicad

 Well, I made a simple schematic with EEschema, passed the
 electrical check without trouble, made the netlist, did the CVpcb
 thing, and routed in PCBnew. All is fine, so my Kicad build seems
 to be working.

 I tried to add another module in the pcb. Fine. I tried to
 connect the new module with a trace... Type Err(4)! It doesn't
 agree to connect the trace to the new component.

 I still don't understand why I cannot route manually without a
 schematic or a netlist when the faq says I could?

 Axel





 

 Please read the Kicad FAQ in the group files section before posting
 your question. Please post your bug reports here. They will be picked
 up by the creator of Kicad. Please visit http://www.kicadlib.org for
 details of how to contribute your symbols/modules to the kicad
 library. For building Kicad from source and other development
 questions visit the kicad-devel group at
 http://groups.yahoo.com/group/kicad-develYahoo! Groups Links





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Re: [kicad-users] Type Err(4) trace near pad issue in Kicad

2010-08-20 Thread Robert
The OP is certainly going to need good luck if he turns off the DRC. 
Turning it off may well allow the track to be placed, but since the DRC 
is there to dramatically reduce the chances of designing a scrap board, 
in the long run it is quicker and easier to create a schematic and leave 
the DRC on, even for a simple board (and just think how many ways 
there are of misconnecting a rectangular box with eight legs).   Not 
doing so is like being given a ruler to help you draw a straight line, 
but not using it in order to save the time involved in placing it on the 
the paper.

Regards,

Robert.

On 20/08/2010 15:18, Cat C wrote:

 I think you need to turn DRC (Design Rules Checking) off, but I'm a beginner 
 too, so I'm not sure.



 Good luck,



 Cat


 To: kicad-users@yahoogroups.com
 From: mad...@free.fr
 ...

 I create a new project, open PCB new, place say a DIP-8_300 component, click 
 on 'add traces and vias', start tracing... and get:
 Type Err(4) trace near pad

 ...
   




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Re: [kicad-users] PCB manufacture and silk screens

2010-08-19 Thread Robert
I have a board of mine here from long before I discovered kicad which is 
populated and silk screened on both sides.   It has both through-hole 
and SMT components.   I don't recall any problems getting it manufactured.

Regards,

Robert.

On 19/08/2010 08:50, Seroxatmad wrote:
 Hi

 1 of the 2 boards I am producing has components on both sides.

 Ideally the component layout would be on both sides silkscreened, but looking 
 at the likes of elektor pcb services they state 1 silk screen!

 Is this normal or just the service they are offering to keep costs down.

 http://www.elektor.com/news/elektor-pcb-service-launched.959562.lynkx

 Regards

 John



 

 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
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Re: [kicad-users] Re: Mounting holes / holes with NO annular at al.

2010-08-16 Thread Robert
That sounds like a simple and reliable way to stop unwanted through-hole 
plating without the hassle and potential for additional cost and 
cock-ups associated with having two drill files.

Regards,

Robert.


On 16/08/2010 16:59, Bernd Wiebus wrote:
 Hello Robert.

   So unless it's essential that the
 the hole be completely non-metallic, it's probably best to give it at
 least a minimal copper supporting annulus and simply let it get plated.

 In my personal experience the need for non plated holes ist mostly for the 
 bigger ones.
 Here holes with a diameter greater than 5 or 6 mm will not be drilled but 
 milled.
 So sometimes it might be probably better, to put a circle to the outline 
 layer for milling.

 The smallest diameter where milling is possible, is two or three millimeters, 
 depending on your manufacturer.


 With best regards: Bernd Wiebus alias dl1eic





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Re: [kicad-users] Re: Curved tracks and fancy shapes

2010-08-11 Thread Robert
 Just as a matter of interest, what happens to curved tracks that are
 placed by Freerouter and then imported into KiCad from a .SES file?

I also have need of curved tracks.   When I looked into the seemingly 
curved tracks produced by Freerouter, zooming in showed them to be 
piecewise linear, and some way from smooth curves.

If you do a bit of googling you'll find there is some discussion on the 
developers group about problems with using arcs on photoplotters.   True 
arcs do seem to be a big deal, and are not widely supported in PCB 
packages (at least not in the ones I was able to download and try out). 
   However, Eagle does support them, and it would be really nice if 
kicad did too.

Although kicad allows the creation of arcs on non-copper layers it plots 
them as piecewise linear (and rather crudely too in the 2009 edition at 
least, though I think that might have been improved for the 2010 edition).

If you want to tackle this issue one other area that would have to be 
addressed is creating and editing arcs.   The kicad method is IMHO very 
clunky.   It needs a graphical method of moving end points and adjusting 
the shape of the curve.   Eagle seems to do that quite well.   What 
Eagle doesn't do is use live DRC checking to prevent the track getting 
too close to another track, which of course is a very useful feature of 
kicad that would have to be built into arc creation and editing.   It 
sounds like a lot of work to me, but if you have the time I think it 
would be worthwhile.

Regards,

Robert.
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Re: [kicad-users] Re: Curved tracks and fancy shapes

2010-08-11 Thread Robert
 Many PCB packages produce piecewise, or chordic, approximations for
 arcs, especially for the Gerber output, even though the Gerber
 language itself does support true arcs with the G02, G03 and G75
 codes and always has done. Many use 16chords/360deg, although some
 are programmable. Although it doesn't necessarily look that pretty at
 this level, the 1/16 chordic approximation only results in a maximum
 error of -0.64%, and would be acceptable for most applications.

For flexi-PCBS you need (so I'm told) true arcs; piecewise linear arcs 
are not acceptable.   Eagle plots true arcs (I checked the Gerbers).

 This kind of (code) work usually entails much more than it appears at
 first, and no - I don't really have time. But that doesn't always
 stop us, does it? :-)

Heh.   In that case I look forward to true copper arcs produced by kicad.

I've just discovered (by accident) that ctrl-shift-enter does something 
very strange in Thunderbird, something which involves displaying a 
dialog box for about 50ms, so this post might turn up in the list more 
than once.   Or I might have saved the original in /dev/null.

Regards,

Robert.
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[kicad-users] Repeat Insert

2010-07-28 Thread Robert
With the previous version of kicad if I wanted a repeat insert of net 
labels going up the screen, ie:

Yn
...
Y3
Y1
Y2
Y0

I would make the vertical displacement negative.   Pressing INS would 
then insert the net names with incrementing numbers going up the screen. 
   On the current version of kicad I can't enter a negative number into 
either the displacement or the label increment of the Schematic Editor 
Options.   Can anyone tell me please how I get incrementing labels going 
up the screen?

Regards,

Robert.
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Re: [kicad-users] Recommended Zone Parameters [1 Attachment]

2010-07-06 Thread Robert
I don't know about recommended, but I've attached a screenshot of the 
ground plane parameters for a recent, perfect board of mine.   I hope 
it's helpful.

YahooGroups should park the image somewhere and provide a link.

Regards,

Robert.

On 06/07/2010 08:08, Stephen Eaton wrote:
 Can anyone tell me what some recommended zone parameters are?



 I've just received some PCBs back and have found that the zone did not fill
 on a couple of GND pads.  I suspect it may be my zone fill settings, but
 want to check that before submitting a bug.



 Regards,



 Stephen.






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Re: [kicad-users] Recommended Zone Parameters

2010-07-06 Thread Robert
Nope, this one really was perfect.   But then I was using a great PCB 
package ;)

Regards,

Robert.

On 06/07/2010 17:42, Cat C wrote:

 Nothing is perfect!



 Only Nadia was in Montreal! :-D

 ground plane parameters for a recent, perfect board of mine. I hope
 ...   




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Re: [kicad-users] Re: Free PCB Service

2010-07-02 Thread Robert
Thanks, it sounds like this is well worth trying.

Regards,

Robert.

On 02/07/2010 11:24, glinelec wrote:
 I have used this service for prototyping, results are very good.
 The board is not routed, so you have to cut it out of the panel by hand!
 Kieran

 --- In kicad-users@yahoogroups.com, Robertbirmingham_spi...@...  wrote:

 Strictly speaking this is off-topic, but given that kicad is used by
 hobbyists a free PCB service is likely to be of interest:

 http://www.spiritcircuits.com/services/go-naked

 It sounds a lot better than dissolving copper very slowly in all the
 wrong places with with ferric chloride, but it also sounds too good to
 be true?   Anyone tried this service?   What's the catch?

 Regards,

 Robert.


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 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
 Links






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[kicad-users] Free PCB Service

2010-06-30 Thread Robert
Strictly speaking this is off-topic, but given that kicad is used by 
hobbyists a free PCB service is likely to be of interest:

http://www.spiritcircuits.com/services/go-naked

It sounds a lot better than dissolving copper very slowly in all the 
wrong places with with ferric chloride, but it also sounds too good to 
be true?   Anyone tried this service?   What's the catch?

Regards,

Robert.
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Re: [kicad-users] New to Kicad: trying to create schematic which includes TL084ACN Op Amp

2010-06-28 Thread Robert
IMHO the best place to look is in the documentation that is supplied 
with kicad (which on Windows at least is accessible from the kicad Help 
menus, and so I assume it works similarly on Linux).

Don't forget that components such as op-amps tend to have a common 
pin-outs, so you can pick another device from the library that has the 
same pin-out and then just edit the part number in the schematic.

When you find you have to create your own library parts (and you will), 
make sure you save them in your own library files, not the supplied 
ones, or your self-created parts will get terminated the next time you 
upgrade kicad.

Regards,

Robert.

On 28/06/2010 04:37, Frank P wrote:
 I'm new to Kicad and made an attempt to create a schematic which
 included a TL084ACN Op Amp. Unfortunately, the downloaded libraries
 did not include the op-amp and I had difficulties with
 adding/creating the component.

 Any advice would be appreciated. Are there any tutorials covering the
 creation of or modification of a component in the libraries?

 Thanks.



 Frank P.



 

 Please read the Kicad FAQ in the group files section before posting
 your question. Please post your bug reports here. They will be picked
 up by the creator of Kicad. Please visit http://www.kicadlib.org for
 details of how to contribute your symbols/modules to the kicad
 library. For building Kicad from source and other development
 questions visit the kicad-devel group at
 http://groups.yahoo.com/group/kicad-develYahoo! Groups Links





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[kicad-users] internal autorouter + track widths defined in net classes

2010-06-27 Thread robert
I'm using (2010-04-06 SVN 2508)-final.

Before the net class setup was included in kicad I used to hack the .dsn file 
to achieve different track widths for different nets.

Just for testing I defined two net classes (power, signal) and routed a few 
parts using the internal autorouter. Both nets are falsely displayed with thin 
traces on my screen, but when I click on them the context menu displays the 
correct track widths. 

Manually routing the tracks works as expected and the widths are displayed 
correctly. The new net class definitions work correctly with freerouting.





Re: [kicad-users] Re: Images and logo inside PCB

2010-05-24 Thread Robert
Yes, it will be somewhere on the Yahoo groups website for kicad (best 
searched using google) - I'm not posting it yet again :).   I posted the 
second copy last week.

The script can be run under Windows using cygwin, but AWK 
implementations for Windows may work too.   Cygwin has the advantage 
that it can be used for all sorts of linuxy things on Windows.

Markus's JaveE application sounds like it might be an easier solution 
(though I haven't looked at it myself).

Regards,

Robert.

On 21/05/2010 20:34, Jean-Paul Gendner wrote:
 Manny Tanks.

  I do not have anymore the script (I understood it was only for
 Linux), however it will be stored on the Kicad site.



  Regards,

  Jean-Paul



 

 Jean-Paul Gendner

 03.88.27.03.44

_

 De : kicad-users@yahoogroups.com [mailto:kicad-us...@yahoogroups.com] De la
 part de Robert
 Envoyé : vendredi 21 mai 2010 20:04
 À : kicad-users@yahoogroups.com
 Objet : *** SPAM ***Re: [kicad-users] Re: Images and logo inside PCB





 You need a bitmap editor capable of saving an ASCI PBM file, eg Gimp.

 Firstly you should scale the image. raoulduke_esq's AWK script
 generates a raster scan, so you get as many lines as there are
 horizontal pixels. It's probably best to scale to about 100 horizontal
 pixels and quickly do the conversion to see what size it ends up on your
 board.

 Next convert the image to black on a white background (shades of grey
 cannot be used). Then delete any anti-aliasing pixels so you get
 smooth edges, and generally tidy things up. This last step is tedious,
 so make sure you have the size correct first :).

 To do a conversion save the image as an ASCII PBM, then pass it through
 raoulduke_esq's script. You can take the output from this and paste it
 into a kicad .mod file in which you've created a dummy footprint. The
 instructions for these last stages are given in my recent post which
 included his script.

 Regards,

 Robert.

 On 21/05/2010 18:38, Jean-Paul Gendner wrote:
 Hi,



 Please (not urgent), may you describe in details all the steps
 to convert (under Windows XP) a .jpg file to be able to get it in a pcb ?



 Regards,

 Jean-Paul



 

 Jean-Paul Gendner

 03.88.27.03.44

 _

 De : kicad-users@yahoogroups.commailto:kicad-users%40yahoogroups.com
 [mailto:kicad-users@yahoogroups.commailto:kicad-users%40yahoogroups.com  ]
 De la
 part de Claudio
 Envoyé : vendredi 21 mai 2010 17:27
 À : kicad-users@yahoogroups.commailto:kicad-users%40yahoogroups.com
 Objet : *** SPAM ***Re: [kicad-users] Re: Images and logo inside PCB





 I GOT IT !!!

 I installed cygwin and did.

 Thanks !!!







 2010/5/21 Claudiolistas.arquivo@mailto:listas.arqu...@gmail.com
 mailto:listas.arquivo%40gmail.com  
 gmail.com

 Hi Robert.

 Thanks for posting your AWK script , I have tried with GAWK-WIN, running
 on
 windows.
 I saved your script in text file and called it ConvertPBM.awk-- Is that
 OK
 ?
 Then a use the Windows, START -  EXECUTE C:\gawk-win\gawk -f
 ConvertPBM.awk
 test.pbm  C:\gawk-win\art.out

 C:\gawk-win = where my executeble and test.pbm are

 I also tried C:\gawk-win\gawk -f ConvertPBM.awk test.pbm  art.out

 But nothing have happened, and no art.out file was created.

 Please what am I doing wrong ?

 Thanks!!

 Claudio.









 2010/5/21 Robertbirmingham_spider@mailto:birmingham_spi...@gmx.net
 mailto:birmingham_spider%40gmx.net  
 gmx.net

 Yes, his name is Devid Spagni - see
 http://tech.http://tech.groups.yahoo.com/group/kicad-users/message/6928
 groups.yahoo.com/group/kicad-users/message/6928. He's
 aware of the problems, but I don't think he is actively working on
 TTConv. He has said that TTConv needs a lot of work. The original
 Python scripts are here if you fancy sorting them out yourself:
 http://www.mige.
 http://www.mige.altervista.org/index.php?mod=Download/Kicad_Utility
 altervista.org/index.php?mod=Download/Kicad_Utility.

 I would agree that it would be nice to have an easy to use import
 facility, preferably from the kicad File menu, but it's a matter of
 finding the time to write it. The method needs to be cross-platform.
 Graphics import can be done right now (using cross-platform tools),
 but the methods are ugly. The method I would recommend for bitmaps is
 to convert the image to an ASCII PBM using Gimp, and then use the AWK
 script I re-posted. Have you tried that? This is a lot quicker and
 easier than editing someone else's scripts :), even if you have to
 download and install gimp and cygwin.

 Robert.


 On 21/05/2010 07:57, ferraro.giuseppe@mailto:ferraro.giuse...@ymail.com
 mailto:ferraro.giuseppe%40ymail.com  
 ymail.com wrote:

 Hi,
 do You know how is author of TTconv?
 Is it possible to fix the bug in Your opinion?
 I think is important for kicad's people.
 Are You agree?
 G


 --- In kicad-users@mailto:kicad-users@yahoogroups.com
 mailto:kicad-users%40yahoogroups.comyahoogroups.com,
 Robertbirmingham_spi

Re: [kicad-users] Re: Images and logo inside PCB

2010-05-21 Thread Robert
Yes, his name is Devid Spagni - see
http://tech.groups.yahoo.com/group/kicad-users/message/6928.   He's
aware of the problems, but I don't think he is actively working on
TTConv.   He has said that TTConv needs a lot of work.   The original
Python scripts are here if you fancy sorting them out yourself:
http://www.mige.altervista.org/index.php?mod=Download/Kicad_Utility.

I would agree that it would be nice to have an easy to use import
facility, preferably from the kicad File menu, but it's a matter of
finding the time to write it.   The method needs to be cross-platform.
   Graphics import can be done right now (using cross-platform tools),
but the methods are ugly.   The method I would recommend for bitmaps is
to convert the image to an ASCII PBM using Gimp, and then use the AWK
script I re-posted.   Have you tried that?   This is a lot quicker and
easier than editing someone else's scripts :), even if you have to
download and install gimp and cygwin.

Robert.

On 21/05/2010 07:57, ferraro.giuse...@ymail.com wrote:

 Hi,
 do You know how is author of TTconv?
 Is it possible to fix the bug in Your opinion?
 I think is important for kicad's people.
 Are You agree?
 G


 --- In kicad-users@yahoogroups.com, Robertbirmingham_spi...@...  wrote:

 That's me, but I didn't write either TTConv or the AWK script.   All I
 did was compile the TTConv Python script into a .exe for ease of use by
 Windows users (as Windows doesn't come with a Python interpreter).

 I use TTConv to import DXFs.   For bitmaps I prefer to use
 raoulduke_esq's AWK script (run using cygwin).   That works nicely, but
 you do need to delete anti-aliasing pixels before converting (easy, but
 tedious).

 Regards,

 Robert.

 On 20/05/2010 11:59, ferraro.giuse...@... wrote:

 Somebody know how contact brownbrummig member?
 His profile is not available so I can't send him a message.
 The programa that He wrote is a good program but there is a bug and I need 
 to speak with him.
 Bye to all

 G

 --- In kicad-users@yahoogroups.com, Jamesjamesrsweet@   wrote:



 --- In kicad-users@yahoogroups.com, ferraro.giuseppe@ferraro.giuseppe@ 
   wrote:

 Hi,
 I'm trying to insert an image in PCB. How can I do?
 I'm using WINDOWS VERSION, last version.
 Bye
 G




 I have run into this same problem. It seems there is no direct way to do 
 this, it would certainly be a very nice feature to have.





 

 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
 Links






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 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
 Links






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07:26:00


Re: [kicad-users] Re: Images and logo inside PCB

2010-05-21 Thread Robert
 Thanks for posting your AWK script , I have tried with GAWK-WIN, running on

Glad you got it sorted, but it's not my script, so please don't thank me 
for it!   The script was written by raoulduke_esq, who posted it on the 
kicad list.   It was just easier for me to grab it off my PC and repost 
it than go hunting for raoulduke_esq's original post.

Regards,

Robert.
No virus found in this outgoing message.
Checked by AVG - www.avg.com 
Version: 9.0.819 / Virus Database: 271.1.1/2887 - Release Date: 05/21/10 
07:26:00


Re: [kicad-users] Re: Images and logo inside PCB

2010-05-21 Thread Robert
You need a bitmap editor capable of saving an ASCI PBM file, eg Gimp.

Firstly you should scale the image.   raoulduke_esq's AWK script 
generates a raster scan, so you get as many lines as there are 
horizontal pixels.   It's probably best to scale to about 100 horizontal 
pixels and quickly do the conversion to see what size it ends up on your 
board.

Next convert the image to black on a white background (shades of grey 
cannot be used).   Then delete any anti-aliasing pixels so you get 
smooth edges, and generally tidy things up.   This last step is tedious, 
so make sure you have the size correct first :).

To do a conversion save the image as an ASCII PBM, then pass it through 
raoulduke_esq's script.   You can take the output from this and paste it 
into a kicad .mod file in which you've created a dummy footprint.   The 
instructions for these last stages are given in my recent post which 
included his script.

Regards,

Robert.

On 21/05/2010 18:38, Jean-Paul Gendner wrote:
 Hi,



  Please (not urgent), may you describe in details all the steps
 to convert (under Windows XP) a .jpg file to be able to get it in a pcb ?



  Regards,

  Jean-Paul



 

 Jean-Paul Gendner

 03.88.27.03.44

_

 De : kicad-users@yahoogroups.com [mailto:kicad-us...@yahoogroups.com] De la
 part de Claudio
 Envoyé : vendredi 21 mai 2010 17:27
 À : kicad-users@yahoogroups.com
 Objet : *** SPAM ***Re: [kicad-users] Re: Images and logo inside PCB





 I GOT IT !!!

 I installed cygwin and did.

 Thanks !!!







 2010/5/21 Claudiolistas.arquivo@mailto:listas.arqu...@gmail.com
 gmail.com

 Hi Robert.

 Thanks for posting your AWK script , I have tried with GAWK-WIN, running on
 windows.
 I saved your script in text file and called it ConvertPBM.awk-- Is that OK
 ?
 Then a use the Windows, START -  EXECUTE C:\gawk-win\gawk -f ConvertPBM.awk
 test.pbm  C:\gawk-win\art.out

 C:\gawk-win = where my executeble and test.pbm are

 I also tried C:\gawk-win\gawk -f ConvertPBM.awk test.pbm  art.out

 But nothing have happened, and no art.out file was created.

 Please what am I doing wrong ?

 Thanks!!

 Claudio.









 2010/5/21 Robertbirmingham_spider@mailto:birmingham_spi...@gmx.net
 gmx.net

 Yes, his name is Devid Spagni - see
 http://tech.http://tech.groups.yahoo.com/group/kicad-users/message/6928
 groups.yahoo.com/group/kicad-users/message/6928.   He's
 aware of the problems, but I don't think he is actively working on
 TTConv.   He has said that TTConv needs a lot of work.   The original
 Python scripts are here if you fancy sorting them out yourself:
 http://www.mige.
 http://www.mige.altervista.org/index.php?mod=Download/Kicad_Utility
 altervista.org/index.php?mod=Download/Kicad_Utility.

 I would agree that it would be nice to have an easy to use import
 facility, preferably from the kicad File menu, but it's a matter of
 finding the time to write it.   The method needs to be cross-platform.
Graphics import can be done right now (using cross-platform tools),
 but the methods are ugly.   The method I would recommend for bitmaps is
 to convert the image to an ASCII PBM using Gimp, and then use the AWK
 script I re-posted.   Have you tried that?   This is a lot quicker and
 easier than editing someone else's scripts :), even if you have to
 download and install gimp and cygwin.

 Robert.


 On 21/05/2010 07:57, ferraro.giuseppe@mailto:ferraro.giuse...@ymail.com
 ymail.com wrote:

 Hi,
 do You know how is author of TTconv?
 Is it possible to fix the bug in Your opinion?
 I think is important for kicad's people.
 Are You agree?
 G


 --- In kicad-users@mailto:kicad-users@yahoogroups.com  yahoogroups.com,
 Robertbirmingham_spi...@...   wrote:

 That's me, but I didn't write either TTConv or the AWK script.   All I
 did was compile the TTConv Python script into a .exe for ease of use by
 Windows users (as Windows doesn't come with a Python interpreter).

 I use TTConv to import DXFs.   For bitmaps I prefer to use
 raoulduke_esq's AWK script (run using cygwin).   That works nicely, but
 you do need to delete anti-aliasing pixels before converting (easy, but
 tedious).

 Regards,

 Robert.

 On 20/05/2010 11:59, ferraro.giuse...@... wrote:

 Somebody know how contact brownbrummig member?
 His profile is not available so I can't send him a message.
 The programa that He wrote is a good program but there is a bug and I
 need to speak with him.
 Bye to all

 G

 --- In kicad-users@mailto:kicad-users@yahoogroups.com
 yahoogroups.com, Jamesjamesrsweet@wrote:



 --- In kicad-users@mailto:kicad-users@yahoogroups.com
 yahoogroups.com, ferraro.giuseppe@ferraro.giuseppe@wrote:

 Hi,
 I'm trying to insert an image in PCB. How can I do?
 I'm using WINDOWS VERSION, last version.
 Bye
 G




 I have run into this same problem. It seems there is no direct way to
 do this, it would certainly be a very nice feature to have

Re: [kicad-users] Re: Images and logo inside PCB

2010-05-20 Thread Robert
That's me, but I didn't write either TTConv or the AWK script.   All I 
did was compile the TTConv Python script into a .exe for ease of use by 
Windows users (as Windows doesn't come with a Python interpreter).

I use TTConv to import DXFs.   For bitmaps I prefer to use 
raoulduke_esq's AWK script (run using cygwin).   That works nicely, but 
you do need to delete anti-aliasing pixels before converting (easy, but 
tedious).

Regards,

Robert.

On 20/05/2010 11:59, ferraro.giuse...@ymail.com wrote:

 Somebody know how contact brownbrummig member?
 His profile is not available so I can't send him a message.
 The programa that He wrote is a good program but there is a bug and I need to 
 speak with him.
 Bye to all

 G

 --- In kicad-users@yahoogroups.com, Jamesjamesrsw...@...  wrote:



 --- In kicad-users@yahoogroups.com, ferraro.giuseppe@ferraro.giuseppe@  
 wrote:

 Hi,
 I'm trying to insert an image in PCB. How can I do?
 I'm using WINDOWS VERSION, last version.
 Bye
 G




 I have run into this same problem. It seems there is no direct way to do 
 this, it would certainly be a very nice feature to have.





 

 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
 Links






 No virus found in this incoming message.
 Checked by AVG - www.avg.com
 Version: 9.0.819 / Virus Database: 271.1.1/2884 - Release Date: 05/19/10 
 19:26:00

No virus found in this outgoing message.
Checked by AVG - www.avg.com 
Version: 9.0.819 / Virus Database: 271.1.1/2884 - Release Date: 05/19/10 
19:26:00


Re: [kicad-users] Re: Images and logo inside PCB

2010-05-19 Thread Robert
raoulduke_esq posted an AWK script a while back which works with ASCII 
PBMs.   I run this using cygwin and I've found it works well enough.   I 
don't have time to search for it in the group posts, so here it is:

# This script will take an ASCII PBM BW file and convert it to a series
# of DS (Draw Segment) statements in PCBNEW syntax.  The deltaX and deltaY
# is defined in step which is in uints of 1/10 mil.  The layer is 
currently
# set to 21, the component layer silkscreen.  Swap bg  fg based on whether
# black or white is the foreground.
#
# State 0 : look for magic number - must be P1 (can be P4 for raw file)
# State 1 : look for height  width
# State 2 : process data
# State 3 : done with data - skip the rest
#
BEGIN { state = 0; step = 40; layer = 21; fg = 1; bg = 0; }
{if (NR == 1) {
 state = 1;
 if ($1 != P1) {
 printf(Must supply an ASCII PBM image file\n);
 exit 1
 }
 next;
 }
}
/^#/{ next }  # Comment line, skip it
{if (state == 1) {
 width = $1;
 height = $2;
 buff = ;
 state = 2;
 Y = - ((step * height) / 2);
 initX = - ((step * width) / 2);
 next;
 }
}
{if (state == 2)  {
 buff = buff $1;
 if (length( buff ) = width) {
 scanline = substr( buff, 1, width );
 buff = substr( buff, width + 1 );
 Y += step;
 X = initX;
 while ( Z1 = index( scanline, fg )) {
 scanline = substr( scanline, Z1 );
 Z2 = index( scanline, bg );
 if (Z2 == 0)
 Z2 = length( scanline ) + 1;
 scanline = substr( scanline, Z2 );
 Z1 = step * Z1 + X;
 Z2 = step * Z2 + Z1 - 2 * step;
 X = Z2;
 printf( DS %d %d %d %d %d %d\n, Z1, Y, Z2, Y, step, 
layer );
 }
 height--;
 if (height == 0)
 state = 3;
 }
 }
}
{if (state == 3) { nextfile; }}

Instructions:

Step 1: Generate an ASCII PBM file - I use GIMP.  A monochrome (black 
and white) image will be represented by a file full of 0 and 1. Call 
it something like art.pbm.

Step 2: Run the ASCII PBM file art.pbm through the following awk 
script and put the output into a file, call it art.out:

 awk -f ConvertPBM.awk pic.pbm  art.out

Step 3: Create a module library with a single component, call it 
something like Logo.  The library will be called Logo.mod.

Step 4: Edit the module library Logo.mod, look for the $EndMODULE 
line, and copy the contents of art.out immediately before it.  Save 
the file.

Step 5: Edit the module library and move things around, add the module 
name, etc.

Step 6: In PCBnew, add the module from the library and place it where 
you want.

Regards,

Robert.

On 19/05/2010 15:49, ferraro.giuse...@ymail.com wrote:
 It seems that this program doesn't run correctly.
 When I try to convert an image JPG to BRD KICAD file, I have an error message:

 Traceback (most recent call last):
File 
 C:\apps\pyinstaller-1.3\TTConv0.2\buildTTConv0.2\out1.pyz/Wx_Image2Kicad
 , line 147, in OnSelBrdOut
File 
 C:\apps\pyinstaller-1.3\TTConv0.2\buildTTConv0.2\out1.pyz/wx._windows,
 line 711, in ShowModal
 wx._core.PyAssertionError: C++ assertion wxAssertFailure failed at 
 ..\..\src\c
 ommon\filefn.cpp(1746) in wxParseCommonDialogsFilter(): missing '|' in the 
 wildc
 ard string!

 I have installed pyton 3.1.1.
 Can You tell me something?
 regards
 G

 --- In kicad-users@yahoogroups.com, Andy Eskelsonandyya...@...  wrote:

 Have a look at TTConv in the group files.

 The one dated feb 8th looks to be the latest.

 One of it's functions is to import images, which may be what you want.

 If I remember correctly is intended to import things like logos rather
 than images as such.

 Andy




 On Wed, 19 May 2010 11:51:46 -
 ferraro.giuse...@...ferraro.giuse...@...  wrote:

 Hi,
 I'm trying to insert an image in PCB. How can I do?
 I'm using WINDOWS VERSION, last version.
 Bye
 G




 

 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
 Links








 

 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit

Re: [kicad-users] Preventing thermals on special pads of SM packages

2010-05-18 Thread Robert
That's why I suggested that it might prove better to replace the 8 pads 
and a via with 9 in-pad thermal vias with holes small enough to prevent 
wicking.   However, I don't know how small that hole should be to 
*reliably* prevent wicking (no matter who manufactures the board). 
It's also possible that for a small enough via hole diameter the 
reduction in total copper area inside the via(s) would make it no more 
or even less effective than a single relatively large hole at the 
centre.   I haven't done the necessary calculations and experiments 
because the arrangement I came up with works for my purposes (if it 
ain't broke, don't fix it).   It could be it's not good enough for 
higher power dissipations.   It's also possible that even if the heat 
transfer through the board were improved upon, the limiting factor is in 
fact the available copper area on the reverse side.   I've always 
struggled to get a large, continuous copper area, as there are 
inevitably tracks all round the chip, often passing very close to the 
central via (I always have to design for absolute minimum cost, which 
means double-sided boards that mix power planes and signal tracks).

The 32 pin MLF/QFN doesn't have much area beneath it.   For a chip with 
a significantly larger area I would increase the number of vias 
appropriately.   So far I've not needed to design for a sufficiently 
large MLF/QFN to make that practical.

When I did the research into MLF/QFN footprint design I found that even 
the manufacturers of the chips didn't know what constituted an optimal 
design.   There was plenty of information about what the problems are, 
and quite a few suggestions for footprint designs (not all of which were 
practical), but no tried and tested solutions recommended by the 
manufacturers.   That situation may have changed (I hope it has).   My 
design is intended to address the problems, to be low risk (in terms of 
reliable manufacturing), and to be practical in kicad, and so far it's 
meeting those aims.

Regards,

Robert.

On 17/05/2010 20:26, Cat C wrote:

 Shouldn't there be more vias to take the heat to the bottom?



 T

 To: kicad-users@yahoogroups.com
 From: birmingham_spi...@gmx.net
 Date: Mon, 17 May 2010 09:57:50 +0100
 Subject: Re: [kicad-users] Preventing thermals on special pads of SM packages

 I often have to work with MLF/QFN devices, which have a thermal pad on
 the bottom. There are two considerations here. Firstly there is the
 heatsinking requirement, and secondly if you get the copper design wrong
 the chip will float on a central blob of solder, resulting in unreliable
 soldering of the pins.

 For the thermal pad footprint for a 32 pin device I arrange 8 square
 pads around a central via, and I place solder resist over the via. I
 number all the (thermal) pads as 33, so I only end up with one extra
 pin in eeschema. I connect together the pads and the via with a grid
 of thick tracks. The use of a tented via in this way means that the
 via will be solidly connected to the heatsinking copper zone on the
 reverse side, whilst the tenting prevents solder wicking through the
 via. This arrangement has worked well for me.

 An alternative arrangement might be to use nine untented vias with very
 small drill holes in the same pattern. This would give better thermal
 contact between board and component, but I don't know how small the
 holes would have to be to prevent solder wicking, or whether they would
 end up so small that their heat transfer capability would be
 compromised. If that were the case I guess you could use more vias
 with a smaller annulus. However, whilst I would be interested to know
 if this is a better method, I've no idea what size the holes would have
 to be, I don't have the means to do the necessary experimentation, and
 the arrangement I use currently works well enough for me.

 Regards,

 Robert.

 On 15/05/2010 22:30, Karl Schmidt wrote:
 Today, there are many surface mount parts (MOSFETS, driver-chips etc.) that 
 depend on a solid copper
 connection to aid in dissipating heat. Those pins should not have a thermal 
 created to a ground
 plane. What is the best way to prevent the generation of this thermal?

 ( I think this should be an attribute of a pin type in eeschema - but it 
 isn't there .. there might
 have been a 'T' attribute in PADS - might have been in the pad-stack 
 definition? - if memory serves
 me right. I think it could default to T unless told not to do so).


 I think I can create a zone with thermals turned off - and kludge it up to 
 work.

 This wasn't much of an issue in the past, but is rather common with the SM 
 boards of today -
 probably should have some way to do this..

 I want to write this up..

 
 Karl Schmidt EMail k...@xtronics.com
 Transtronics, Inc. WEB http://xtronics.com
 3209 West 9th Street Ph (785) 841-3089
 Lawrence, KS 66049 FAX (785) 841-0434

 Action speaks

Re: [kicad-users] Preventing thermals on special pads of SM packages

2010-05-17 Thread Robert
I often have to work with MLF/QFN devices, which have a thermal pad on 
the bottom.   There are two considerations here.   Firstly there is the 
heatsinking requirement, and secondly if you get the copper design wrong 
the chip will float on a central blob of solder, resulting in unreliable 
soldering of the pins.

For the thermal pad footprint for a 32 pin device I arrange 8 square 
pads around a central via, and I place solder resist over the via.   I 
number all the (thermal) pads as 33, so I only end up with one extra 
pin in eeschema.   I connect together the pads and the via with a grid 
of thick tracks.   The use of a tented via in this way means that the 
via will be solidly connected to the heatsinking copper zone on the 
reverse side, whilst the tenting prevents solder wicking through the 
via.   This arrangement has worked well for me.

An alternative arrangement might be to use nine untented vias with very 
small drill holes in the same pattern.   This would give better thermal 
contact between board and component, but I don't know how small the 
holes would have to be to prevent solder wicking, or whether they would 
end up so small that their heat transfer capability would be 
compromised.   If that were the case I guess you could use more vias 
with a smaller annulus.   However, whilst I would be interested to know 
if this is a better method, I've no idea what size the holes would have 
to be, I don't have the means to do the necessary experimentation, and 
the arrangement I use currently works well enough for me.

Regards,

Robert.

On 15/05/2010 22:30, Karl Schmidt wrote:
 Today, there are many surface mount parts (MOSFETS, driver-chips etc.) that 
 depend on a solid copper
 connection to aid in dissipating heat. Those pins should not have a thermal 
 created to a ground
 plane.  What is the best way to prevent the generation of this thermal?

 ( I think this should be an attribute of a pin type in eeschema - but it 
 isn't there .. there might
 have been a 'T' attribute in PADS - might have been in the pad-stack 
 definition? - if memory serves
 me right.  I think it could default to T unless told not to do so).


 I think I can create a zone with thermals turned off - and kludge it up to 
 work.

 This wasn't much of an issue in the past, but is rather common with the SM 
 boards of today -
 probably should have some way to do this..

 I want to write this up..

 
 Karl Schmidt  EMail k...@xtronics.com
 Transtronics, Inc.  WEB http://xtronics.com
 3209 West 9th Street Ph (785) 841-3089
 Lawrence, KS 66049  FAX (785) 841-0434

 Action speaks louder than words but not nearly as often. -- Mark Twain

 


 

 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
 Links






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Re: [kicad-users] Preventing thermals on special pads of SM packages [1 Attachment]

2010-05-17 Thread Robert
 Do you mean 9 pads instead of 8? (A picture would be worth a thousand
 words here) ..

I've attached an image of the gerber layers for a 32 pin MLF.   Last 
time I tried attaching an image Yahoo Groups filed it and provided a 
link, so hopefully it'll do that again.   I've emailed a copy direct to 
you too in case it doesn't work out.

Note there are 8 pads  surrounding a (square-tented) via, so there will 
be eight small squares of solder,  rather than one big one (which can 
cause the package to float).   BTW, if you look closely you'll notice a 
narrow area around the edge of each pad.   That's where I shrunk the 
solder paste to reduce problems when soldering.

 The use of a tented via in this way means that the via will be
 solidly connected to the heatsinking copper zone on the reverse
 side, whilst the tenting prevents solder wicking through the via.

 I'm not sure I understand exactly -- do you mean the solder sicking
 would move enough solder to float the chip?

No - there are two causes of poor bonding specific to MLF and similar. 
  One is that the solder forms a large blob on which the chip floats, 
lifting the chip's legs above the solder on the pads around the outside. 
   This can also result in the chip drifting off centre or rotating. 
The other cause is solder going through the thermal via by capillary 
action, reducing the expected quantity of solder available for the 
thermal pad.

 I'm thinking you might mean that the pads break up the area ( sort of
 a star shaped area) so with smaller blobs the chip floats less?

Correct, because now you have 8 small hillocks rather than one big hill 
(if that makes sense).   Something resting on eight points is more 
stable than something resting on one.

 http://wiki.xtronics.com/index.php/Pcbnew#Preventing_Thermals_on_heatsinking_pads_of_SM_packages

I'll try and take a look later/tomorrow.It's the end of another 
longer hard day at the PC :).

Regards,

Robert.

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Re: [kicad-users] Module Library madness

2010-05-12 Thread Robert
 metric (remind me to once again curse the creeps that stopped
 metrication back in the '60s).

Can I join you?

 The current lib lists these as SM0603 in imperial..  I'm  thinking of
 creating a metric named lib with 0603M?

Curiously I was thinking about this the other day, and came to the 
conclusion the metric names should start with M (eg M0603), to echo bolt 
naming (M3, M3.5 etc).

Regards,

Robert.
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Re: [kicad-users] Re: How to hide component values from a PCB design?

2010-05-06 Thread Robert
Perhaps I'm missing something here, but if you switch to the Render tab 
on the Visibles bar you can turn off Hidden Text, Values, and 
References.   Is one of those not what you want?

Regards,

Robert.

On 06/05/2010 15:01, Daniel Berenguer wrote:
 Well, this could be a nice feature I guess. The more the PCB grows, the more 
 text garbage is added into.

 Daniel.

 --- In kicad-users@yahoogroups.com, Alain Portalalain.por...@...  wrote:

 Le mercredi 5 mai 2010 20:41:56, Daniel Berenguer a écrit :
 Is there any way to hide all component values from a PCB? I mean really
 hiding values, not graying them nor making them invisible on the
 silkscreen layer.

 This isn't possible.
 At least for the mement.
 Perhaps this could be a feature request?

 Regards
 Alain
 --
 La version française des pages de manuel Linux
 http://manpagesfr.free.fr





 

 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
 Links






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Re: [kicad-users] Re: How to hide component values from a PCB design?

2010-05-06 Thread Robert
You need to be using the latest (2010) version.

Regards,

Robert.

On 06/05/2010 17:15, Daniel Berenguer wrote:
 Thanks Robert, but I can not find the Render tab. Which version of PCBNEW are 
 you running? Mine is 20090216-final. Should it be under Preferences?

 Thanks again,

 Daniel.


 --- In kicad-users@yahoogroups.com, Robertbirmingham_spi...@...  wrote:

 Perhaps I'm missing something here, but if you switch to the Render tab
 on the Visibles bar you can turn off Hidden Text, Values, and
 References.   Is one of those not what you want?

 Regards,

 Robert.

 On 06/05/2010 15:01, Daniel Berenguer wrote:
 Well, this could be a nice feature I guess. The more the PCB grows, the 
 more text garbage is added into.

 Daniel.

 --- In kicad-users@yahoogroups.com, Alain Portalalain.portal@   wrote:

 Le mercredi 5 mai 2010 20:41:56, Daniel Berenguer a écrit :
 Is there any way to hide all component values from a PCB? I mean really
 hiding values, not graying them nor making them invisible on the
 silkscreen layer.

 This isn't possible.
 At least for the mement.
 Perhaps this could be a feature request?

 Regards
 Alain
 --
 La version française des pages de manuel Linux
 http://manpagesfr.free.fr





 

 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
 Links






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 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
 Links






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[kicad-users] GerbView

2010-05-05 Thread Robert
I am trying to import some existing Gerbers into PCBNew via GerbView. 
This mostly works very well, but for some reason even though the Gerbers 
display correctly in GerbView, in the resulting .brd file some surface 
mount pads are missing, as are the copper parts of all the vias.   The 
relevant D codes are D16, D17, and D20.   Does anyone know what I'm 
doing wrong?

Having imported the Gerbers I want to run a DRC to check the track 
spacing.   However, the board always passes the DRC even if I set all 
the track spacing definitions to something way to big.   Any ideas?

Alternatively, does anyone know of a free Gerber tool that will perform 
a DRC directly on the Gerbers?   I just want to know if the track 
spacing is 0.2mm at any point.

Regards,

Robert.
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[kicad-users] Get and Move Footprint

2010-05-05 Thread Robert
In the 2009 version of Kicad Get and Move Footprint did just that. 
In the 2010 version this command whizzes you off to wherever the 
component happens to be, which for a new board will be an inconveniently 
large distance from where you are working.   Is there a way to make this 
command follow the 2009 behaviour?

Regards,

Robert.
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Re: [kicad-users] How to restore/set Net Name to Tracks.

2010-04-09 Thread Robert
Have you tried Rebuild Board Connectivity from the netlist import 
dialog?   From memory you just turn off the DRC so you can connect the 
orphan track to the appropriate net, and then you hit this button. 
Then you can turn on the DRC again and carry on working as normal.

Regards,

Robert.


On 08/04/2010 18:11, Cat C wrote:

 I don't know if I'm the only one, but quite often some tracks will
 loose their net name so I can't attach them to the desired pad.

 How can I restore, or set (if there never was) the net of a track,
 please?

 Thanks,

 Cat




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Re: [kicad-users] How to restore/set Net Name to Tracks.

2010-04-09 Thread Robert
Before you attempt any track operations select Edit...Cleanup Tracks and 
Vias.   Deselect everything except Merge segments, and then hit the 
Clean pcb button.

Regards,

Robert.


On 09/04/2010 10:23, Anders O wrote:
 The suggested approach works very well, though the track is now
 devided into two tracks, which disables drag segment, keep slope.
 Joining two tracks is a feature I miss. Sometimes, it's simply easier
 to delete and retrace :(




  From:
 Robertbirmingham_spi...@gmx.net To: kicad-users@yahoogroups.com
 Sent: Fri, April 9, 2010 10:56:07 AM Subject: Re: [kicad-users] How
 to restore/set Net Name to Tracks.


 Have you tried Rebuild Board Connectivity from the netlist import
 dialog? From memory you just turn off the DRC so you can connect the
 orphan track to the appropriate net, and then you hit this button.
 Then you can turn on the DRC again and carry on working as normal.

 Regards,

 Robert.

 On 08/04/2010 18:11, Cat C wrote:

 I don't know if I'm the only one, but quite often some tracks will
 loose their net name so I can't attach them to the desired pad.

 How can I restore, or set (if there never was) the net of a track,
 please?

 Thanks,

 Cat








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[kicad-users] Feedback

2010-04-09 Thread Robert
I just wanted to feed back some comments from a major appliance 
manufacturer who recently received some PCBs created by me using Kicad. 
   They described the prototypes as being of excellent quality.   The 
two boards, which are a mixture of digital and analogue circuitry, both 
worked first time.   The quality of the Kicad software played a 
significant part in that, so I would like to pass on that praise to the 
Kicad authors, and thank them for producing an excellent suite of software.

Previously I used commercial PCB software.   It was a nightmare to use 
and most boards would have problems requiring revisions.

Regards,

Robert.
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Re: [kicad-users] Re: Has anyone used the autorouters in GEDA to route their kicad design?

2010-04-08 Thread Robert
One thing the router on gEDA allows that kicad doesn't is true arcs on 
the copper layers.   I *think* Toporouter (which is what the OP wants to 
play with) also uses true arcs.   I can't think of any reason why this 
would be important on a standard PCB, but on flexis true arcs are 
preferable.

I guess all that's needed in Kicad is a gEDA PCB netlist plugin.   I 
asked about this myself a while back but got no responses, so presumably 
there isn't one already written.

As for the original post, when I saw it I did check my copy of PCB to 
see if it made any mention of Toporouter.   I couldn't find any 
reference to it in the menus, so I guess to use it the OP will have to 
roll his own copy of PCB.   Sounds like a lot of work to me...

Regards,

Robert.



On 08/04/2010 16:06, juliorz wrote:
 What is wrong with using the auto router included in KICAD? (that is what
 I use)



_

 From: kicad-users@yahoogroups.com [mailto:kicad-us...@yahoogroups.com] On
 Behalf Of dickelbeck
 Sent: Thursday, April 08, 2010 8:50 AM
 To: kicad-users@yahoogroups.com
 Subject: [kicad-users] Re: Has anyone used the autorouters in GEDA to route
 their kicad design?





 --- In kicad-users@mailto:kicad-users%40yahoogroups.com  yahoogroups.com,
 lynchajlync...@...  wrote:

 Although FreeRouting.net works great, it is not open source and I get the
 impression from its author he has moved on to other projects and is no
 longer doing major development on the FreeRouting.net autorouter.
 :
 :
 :
 Andrew Lynch

 Can you provide any evidence to support this opinion?








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Re: [kicad-users] Print several PCBs per page

2010-04-07 Thread Robert
If you do something like this, is there a way to generate gerbers from 
the Inkscape file?

Regards,

Robert.

On 07/04/2010 09:29, Sergey A. Borshch wrote:
 On 06.04.2010 20:57, oliver602 wrote:
 Hi,
 Can anybody tell me the best way to get a number of PCBs on one page and how 
 to get the scalling right?
 I use such a technique (under windows):
 1) Print into virtual PDF printer (I use CutePDF) with scale set to Accurate
 scale 1 and Pads drill opt = Small mark
 2) Load generated .pdf into Inkscape and postprocess (move/duplicate) as 
 desired.





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Re: [kicad-users] Print several PCBs per page

2010-04-07 Thread Robert
I've used the same technique as you for post-processing in Inkscape, but 
unlike the OP I wanted to produce gerbers (for production).   I just 
wondered if you had solved that problem too.

Regards,

Robert.

On 07/04/2010 10:06, Sergey A. Borshch wrote:
 On 07.04.2010 11:41, Robert wrote:
 If you do something like this, is there a way to generate gerbers from
 the Inkscape file?
 I don't know exactly.
 I use .pdf for home-made prototypes. My manufacturer use some CAM program for
 gerbers post-processing, but I don't know which one.
 I thought you was talking about prototyping as well.





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[kicad-users] Net Classes

2010-04-06 Thread Robert
For power connections I generally use wider tracks than signal 
connections.   Where the power track is connected to a fine pitch 
component the track needs to be narrowed, but that's OK because the 
narrow section will be short.   The latest version of kicad auto-selects 
the track width based on the net class, but that makes it impossible to 
connect (for example) the Vcc pin(s) on a fine pitch component to the 
rest of the Vcc net, which of course will be a Power net class with a 
wide track width.

I thought perhaps I could override the width using the track width drop 
list, but I can't as there is only one width listed.   Also I can't 
override the auto-selected net class and pick one with a narrower width. 
   Finally I can't use Select Track Width from the context menu 
because it doesn't allow me to select a narrower track width.

I can't see how this arrangement can possibly work with modern 
components, so I must be doing something wrong.   How do I override the 
auto-selected track width?

Regards,

Robert.
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Re: [kicad-users] Adding graphics to Silkscreen

2010-04-06 Thread Robert
Yes, someone wrote an AWK script to do this.   I couldn't find it with 
the Yahoo search engine but Google tracked it down.   I think the 
following post is the final version:

http://www.mail-archive.com/kicad-users@yahoogroups.com/msg05028.html

I've used it several times with success.   The one thing that was a bit 
of a pain was editing out the effect of anti-aliasing pixels, but it's 
not an insurmountable problem.

Regards,

Robert.


On 06/04/2010 11:39, burnsrobbie wrote:
 Hello fellow users.
 I'm on my 3rd Kicad design now, for me it works well.

 I have a question though, is it possible to add either vector or bitmap 
 graphics to the silkscreen layer?

 For example CE marking or ROHS logo?

 I don't fancy creating these from circles and lines in the module editor.

 Many thanks

 Robbie Burns



 

 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
 Links






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Re: [kicad-users] Net Classes

2010-04-06 Thread Robert
Thank you, András, that solves my problem :).   I found it added the 
custom width to the context menu, which is just how I would like it.

Regards,

Robert.

On 06/04/2010 12:05, Karakai Andras wrote:
 Hi Robert!

 You can specify custom track widths in the global design rules, after you
 made it, you can select them from the drop down list.

 BR:
 András

 2010/4/6 Robertbirmingham_spi...@gmx.net



 For power connections I generally use wider tracks than signal
 connections. Where the power track is connected to a fine pitch
 component the track needs to be narrowed, but that's OK because the
 narrow section will be short. The latest version of kicad auto-selects
 the track width based on the net class, but that makes it impossible to
 connect (for example) the Vcc pin(s) on a fine pitch component to the
 rest of the Vcc net, which of course will be a Power net class with a
 wide track width.

 I thought perhaps I could override the width using the track width drop
 list, but I can't as there is only one width listed. Also I can't
 override the auto-selected net class and pick one with a narrower width.
 Finally I can't use Select Track Width from the context menu
 because it doesn't allow me to select a narrower track width.

 I can't see how this arrangement can possibly work with modern
 components, so I must be doing something wrong. How do I override the
 auto-selected track width?

 Regards,

 Robert.




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Re: [kicad-users] Re: change net connection of invisible Pins

2010-03-19 Thread Robert
You can post feature requests here:

http://sourceforge.net/tracker/?atid=762479group_id=145591func=browse

Regards,

Robert.

On 17/03/2010 17:03, mtheling wrote:


 All, thank you for your answers.

 As Robert explains my intention was to connect different components from the 
 same component type to different supply. (For example VCC and VCC_switched).

 What I can see in my example is,  that as soon as I connect a PWR_Flag to the 
 +5V net,  the component U2a is correctly connected only to +5V in PCBnew. 
 There is not bridge from +5V to VCC, this is like I intent.
 However, Eeschema states the mentioned error.

 If I don't connect a PWR_flag to the +5V Net, all components including 
 U2A,B,C are connected to the VCC net an there is no +5V net in PCBnew.

 As Andy proposed I will try the simple practise solution to create a 
 component for each supply voltage.

 I like to propose an idea / feature request  to make the supply net of an 
 component editable, so that the supply net can be change as parameter 
 directly from eeschema.

 Thank you very much for your help!

 Best Regards,
 Mark


 --- In kicad-users@yahoogroups.com, Robertbirmingham_spi...@...  wrote:

 Thanks for your suggestion.   You're right that the connected power rail
 does not override the pin name on these logic chips.

 Another solution might be to create a logic component with the relevant
 gates plus a power block that could be connected to the appropriate
 rail(s) and tucked out of the way (and associated on the schematic with
 the decoupling capacitor).

 Regards,

 Robert.

 On 16/03/2010 16:13, Andy Eskelson wrote:
 You can manually connect the power if you enable show hidden pins in
 eeschema, but that means that you have to manually connect all the power
 pins up. What I don't know because I've never tried it, is if that
 over-rides the pin names for DRC. I would guess not.

 In practise the solution is very simple.

 Duplicate the library part and change the name of the power pins to
 something else. For example change Vcc to +5V, then you can use a +5V
 power port which will connect to just that chip.

 Obviously you save the part under a different name, then that part  will
 connect to the new power net.

 You could also just identify the pins as power in, and not give them a
 special name   untick the not drawn box, this would meant that you need
 to manually connect them. For small circuits this is not much of a
 problem, however it can get messy if you have a reasonable number of IC's
 to connect.


 Andy





 On Tue, 16 Mar 2010 14:07:21 +
 Robertbirmingham_spi...@...   wrote:

 Thanks for your replies Carl and Andy.

 Speaking for myself, I have designs that use two instances of the same
 micro, with each instance on a different supply rail.   These micros all
 have a power pin named VCC and I have no problems with ERC, so Kicad
 isn't covertly connecting my VCC pins together.

 The OP (Mark) wants to have logic chips on two different supply rails,
 but it seems that Kicad joins up all the hidden pins marked Vcc, even if
 you connect the power pin to a different rail.   Is the critical factor
 that the pins are hidden, is it that the name case sensitive, or is it a
 feature of multi-part components?   It's not that the pin doesn't have a
 number, because the logic chip symbols have both name and number
 specified for the power pins (like the symbols I have created for
 myself).   What is the critical thing that Mark has to change to allow
 him to connect two logic chips to two different supply rails.

 Regards,

 Robert.



 On 16/03/2010 11:14, Andy Eskelson wrote:
 Vcc IS the power to the chip, U2A in this case.
 so why have you connected +5V to it as well?

 DRC is detecting that you have effectively shorted VCC  to a different 5V
 supply as well, and is complaining about it.

 Power flags are defined as power out pins, and you only have one power
 out on a power net,m if you add a second power flag DRC will complain
 about that as well.

 I think you are assuming that you need to connect 5 volts to the chip,
 and so are adding the +5V port, which is another independent supply net.
 Hence the confusion.

 The system works as has been mentioned by the power port names. When a
 device has a power pin with a specific name, AND you set the pin to be
 invisible you DO NOT need to connect anything else to it. As soon as you
 put a power port with the same name onto the circuit diagram, that port is
 automatically connected to all device power pins with the same name.


 A power net needs to be energised or DRC will complain. That can be done
 in two ways. Either a device such as a regulator can have a power out
 pin, which will indicate that it is energised, OR you add a power flag,
 which simply says that the net is energised. You use power flags in
 situations where you are connecting an external power source to your
 circuit via a connector, flying leads and so on.

 The one oddity is that GND is considered

[kicad-users] gEDA PCB Netlist Plugin

2010-03-18 Thread Robert
Does anyone have a plug-in for EESchema that they would be happy to send 
me that would allow me to produce gEDA PCB netlists, please?   I need to 
do true arcs on the copper layers for a flexi-pcb I've been asked to 
design, and unless anyone knows any better that means I'm stuck with 
using gEDA PCB, Vutrax (ugh ugh ugh), or something I can't afford.

Regards,

Robert.
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Checked by AVG - www.avg.com 
Version: 9.0.791 / Virus Database: 271.1.1/2753 - Release Date: 03/17/10 
19:33:00


Re: [kicad-users] Re: change net connection of invisible Pins

2010-03-17 Thread Robert
PCBNEW just confirms the ERC, namely that the two VCC pins are connected 
to two different rails.

Regards,

Robert.

On 16/03/2010 18:23, daystar1013 wrote:
 Well, On your two micros, I suggest that you forget ERC and check your 
 NETLIST or better yet open the design in PCBNEW and verify that you do indeed 
 have two power rails.

 --- In kicad-users@yahoogroups.com, Robertbirmingham_spi...@...  wrote:

 Thanks for your replies Carl and Andy.

 Speaking for myself, I have designs that use two instances of the same
 micro, with each instance on a different supply rail.   These micros all
 have a power pin named VCC and I have no problems with ERC, so Kicad
 isn't covertly connecting my VCC pins together.

 The OP (Mark) wants to have logic chips on two different supply rails,
 but it seems that Kicad joins up all the hidden pins marked Vcc, even if
 you connect the power pin to a different rail.   Is the critical factor
 that the pins are hidden, is it that the name case sensitive, or is it a
 feature of multi-part components?   It's not that the pin doesn't have a
 number, because the logic chip symbols have both name and number
 specified for the power pins (like the symbols I have created for
 myself).   What is the critical thing that Mark has to change to allow
 him to connect two logic chips to two different supply rails.

 Regards,

 Robert.



 On 16/03/2010 11:14, Andy Eskelson wrote:
 Vcc IS the power to the chip, U2A in this case.
 so why have you connected +5V to it as well?

 DRC is detecting that you have effectively shorted VCC  to a different 5V
 supply as well, and is complaining about it.

 Power flags are defined as power out pins, and you only have one power
 out on a power net,m if you add a second power flag DRC will complain
 about that as well.

 I think you are assuming that you need to connect 5 volts to the chip,
 and so are adding the +5V port, which is another independent supply net.
 Hence the confusion.

 The system works as has been mentioned by the power port names. When a
 device has a power pin with a specific name, AND you set the pin to be
 invisible you DO NOT need to connect anything else to it. As soon as you
 put a power port with the same name onto the circuit diagram, that port is
 automatically connected to all device power pins with the same name.


 A power net needs to be energised or DRC will complain. That can be done
 in two ways. Either a device such as a regulator can have a power out
 pin, which will indicate that it is energised, OR you add a power flag,
 which simply says that the net is energised. You use power flags in
 situations where you are connecting an external power source to your
 circuit via a connector, flying leads and so on.

 The one oddity is that GND is considered a power out type net as well, so
 it also needs energising with a power flag.

 logic IC's have generally had their power pins identified by names
 rather than the voltage, so you have Vcc Vss Vdd and so on.

 When you run into such chips, the same will apply, power ports of the
 same name are already considered to be connected to the physical supply

 Andy





 On Mon, 15 Mar 2010 16:13:15 -
 mthelingp...@...   wrote:

 Hi Robert,

 if I connect for example a net +5V to a component U2A which has an VCC 
 input as invisible pin, I see that  in PCBnew the pin is connected to the 
 +5V net as soon as I set an Powerflag to +5V.
 But the ERC check in eeschema states this as error :
 ErrType(5): Conflict problem between pins. Severity: error
   @ (5,1000 ,6,7500 ): Cmp #FLG01, Pin 1 (power_out) connected to
   @ (4,4000 ,6,7500 ): Cmp #FLG06, Pin 1 (power_out) (net 3)

 If I don't connect a Powerflag to the +5V net, in PCBnew the Power Pin 
 of U2A is still connect to the VCC net and not to +5V as set in the 
 schematic.
 Please see schematic for example:
 http://www.swapout.de/example_schematic.pdf

 What I am doing wrong?

 Thank you,

 best Regards,
 Mark




 

 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator 
 of Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! 
 Groups Links





 

 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
 Links






 No virus found in this incoming

Re: [kicad-users] change net connection of invisible Pins

2010-03-17 Thread Robert
Thanks for your suggestion.   You're right that the connected power rail 
does not override the pin name on these logic chips.

Another solution might be to create a logic component with the relevant 
gates plus a power block that could be connected to the appropriate 
rail(s) and tucked out of the way (and associated on the schematic with 
the decoupling capacitor).

Regards,

Robert.

On 16/03/2010 16:13, Andy Eskelson wrote:
 You can manually connect the power if you enable show hidden pins in
 eeschema, but that means that you have to manually connect all the power
 pins up. What I don't know because I've never tried it, is if that
 over-rides the pin names for DRC. I would guess not.

 In practise the solution is very simple.

 Duplicate the library part and change the name of the power pins to
 something else. For example change Vcc to +5V, then you can use a +5V
 power port which will connect to just that chip.

 Obviously you save the part under a different name, then that part  will
 connect to the new power net.

 You could also just identify the pins as power in, and not give them a
 special name  untick the not drawn box, this would meant that you need
 to manually connect them. For small circuits this is not much of a
 problem, however it can get messy if you have a reasonable number of IC's
 to connect.


 Andy





 On Tue, 16 Mar 2010 14:07:21 +
 Robertbirmingham_spi...@gmx.net  wrote:

 Thanks for your replies Carl and Andy.

 Speaking for myself, I have designs that use two instances of the same
 micro, with each instance on a different supply rail.   These micros all
 have a power pin named VCC and I have no problems with ERC, so Kicad
 isn't covertly connecting my VCC pins together.

 The OP (Mark) wants to have logic chips on two different supply rails,
 but it seems that Kicad joins up all the hidden pins marked Vcc, even if
 you connect the power pin to a different rail.   Is the critical factor
 that the pins are hidden, is it that the name case sensitive, or is it a
 feature of multi-part components?   It's not that the pin doesn't have a
 number, because the logic chip symbols have both name and number
 specified for the power pins (like the symbols I have created for
 myself).   What is the critical thing that Mark has to change to allow
 him to connect two logic chips to two different supply rails.

 Regards,

 Robert.



 On 16/03/2010 11:14, Andy Eskelson wrote:
 Vcc IS the power to the chip, U2A in this case.
 so why have you connected +5V to it as well?

 DRC is detecting that you have effectively shorted VCC  to a different 5V
 supply as well, and is complaining about it.

 Power flags are defined as power out pins, and you only have one power
 out on a power net,m if you add a second power flag DRC will complain
 about that as well.

 I think you are assuming that you need to connect 5 volts to the chip,
 and so are adding the +5V port, which is another independent supply net.
 Hence the confusion.

 The system works as has been mentioned by the power port names. When a
 device has a power pin with a specific name, AND you set the pin to be
 invisible you DO NOT need to connect anything else to it. As soon as you
 put a power port with the same name onto the circuit diagram, that port is
 automatically connected to all device power pins with the same name.


 A power net needs to be energised or DRC will complain. That can be done
 in two ways. Either a device such as a regulator can have a power out
 pin, which will indicate that it is energised, OR you add a power flag,
 which simply says that the net is energised. You use power flags in
 situations where you are connecting an external power source to your
 circuit via a connector, flying leads and so on.

 The one oddity is that GND is considered a power out type net as well, so
 it also needs energising with a power flag.

 logic IC's have generally had their power pins identified by names
 rather than the voltage, so you have Vcc Vss Vdd and so on.

 When you run into such chips, the same will apply, power ports of the
 same name are already considered to be connected to the physical supply

 Andy





 On Mon, 15 Mar 2010 16:13:15 -
 mthelingp...@swapout.de   wrote:

 Hi Robert,

 if I connect for example a net +5V to a component U2A which has an VCC 
 input as invisible pin, I see that  in PCBnew the pin is connected to the 
 +5V net as soon as I set an Powerflag to +5V.
 But the ERC check in eeschema states this as error :
 ErrType(5): Conflict problem between pins. Severity: error
   @ (5,1000 ,6,7500 ): Cmp #FLG01, Pin 1 (power_out) connected to
   @ (4,4000 ,6,7500 ): Cmp #FLG06, Pin 1 (power_out) (net 3)

 If I don't connect a Powerflag to the +5V net, in PCBnew the Power Pin 
 of U2A is still connect to the VCC net and not to +5V as set in the 
 schematic.
 Please see schematic for example:
 http://www.swapout.de/example_schematic.pdf

 What I am doing wrong?

 Thank you,

 best Regards,
 Mark

Re: [kicad-users] OPA-4353 footprint

2010-03-17 Thread Robert
As far as I can tell it comes in standard packages, so you can use the 
appropriate one from the supplied module libraries.

Regards,

Robert.

On 17/03/2010 09:17, juliorz wrote:
 Does anyone have a footprint for the OPA-4353  Quad op-amp from
 Burr-Brown/Texas-Instruments ?






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 Checked by AVG - www.avg.com
 Version: 9.0.790 / Virus Database: 271.1.1/2750 - Release Date: 03/16/10 
 07:33:00

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Checked by AVG - www.avg.com 
Version: 9.0.791 / Virus Database: 271.1.1/2752 - Release Date: 03/17/10 
07:33:00


Re: [kicad-users] change net connection of invisible Pins

2010-03-16 Thread Robert
OK, I'm stuck.   I've just recreated your circuit and as far as I can 
tell connecting a power port to a hidden (power) pin connects all parts 
that have the same pin name to your power port.   However, that can't 
possibly be right as you then couldn't have components operating off two 
different rails if their power pins just happen to share the same pin 
name.   I routinely work with multiple supply rails and I haven't had 
any problems until now.

Can anyone else answer this?

Regards,

Robert.

On 15/03/2010 16:13, mtheling wrote:
 Hi Robert,

 if I connect for example a net +5V to a component U2A which has an VCC 
 input as invisible pin, I see that  in PCBnew the pin is connected to the 
 +5V net as soon as I set an Powerflag to +5V.
 But the ERC check in eeschema states this as error :
 ErrType(5): Conflict problem between pins. Severity: error
  @ (5,1000 ,6,7500 ): Cmp #FLG01, Pin 1 (power_out) connected to
  @ (4,4000 ,6,7500 ): Cmp #FLG06, Pin 1 (power_out) (net 3)

 If I don't connect a Powerflag to the +5V net, in PCBnew the Power Pin of 
 U2A is still connect to the VCC net and not to +5V as set in the schematic.
 Please see schematic for example:
 http://www.swapout.de/example_schematic.pdf

 What I am doing wrong?

 Thank you,

 best Regards,
 Mark




 

 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
 Links






 No virus found in this incoming message.
 Checked by AVG - www.avg.com
 Version: 9.0.790 / Virus Database: 271.1.1/2748 - Release Date: 03/15/10 
 07:33:00

No virus found in this outgoing message.
Checked by AVG - www.avg.com 
Version: 9.0.790 / Virus Database: 271.1.1/2748 - Release Date: 03/15/10 
07:33:00


Re: [kicad-users] change net connection of invisible Pins

2010-03-16 Thread Robert
Thanks for your replies Carl and Andy.

Speaking for myself, I have designs that use two instances of the same 
micro, with each instance on a different supply rail.   These micros all 
have a power pin named VCC and I have no problems with ERC, so Kicad 
isn't covertly connecting my VCC pins together.

The OP (Mark) wants to have logic chips on two different supply rails, 
but it seems that Kicad joins up all the hidden pins marked Vcc, even if 
you connect the power pin to a different rail.   Is the critical factor 
that the pins are hidden, is it that the name case sensitive, or is it a 
feature of multi-part components?   It's not that the pin doesn't have a 
number, because the logic chip symbols have both name and number 
specified for the power pins (like the symbols I have created for 
myself).   What is the critical thing that Mark has to change to allow 
him to connect two logic chips to two different supply rails.

Regards,

Robert.



On 16/03/2010 11:14, Andy Eskelson wrote:
 Vcc IS the power to the chip, U2A in this case.
 so why have you connected +5V to it as well?

 DRC is detecting that you have effectively shorted VCC  to a different 5V
 supply as well, and is complaining about it.

 Power flags are defined as power out pins, and you only have one power
 out on a power net,m if you add a second power flag DRC will complain
 about that as well.

 I think you are assuming that you need to connect 5 volts to the chip,
 and so are adding the +5V port, which is another independent supply net.
 Hence the confusion.

 The system works as has been mentioned by the power port names. When a
 device has a power pin with a specific name, AND you set the pin to be
 invisible you DO NOT need to connect anything else to it. As soon as you
 put a power port with the same name onto the circuit diagram, that port is
 automatically connected to all device power pins with the same name.


 A power net needs to be energised or DRC will complain. That can be done
 in two ways. Either a device such as a regulator can have a power out
 pin, which will indicate that it is energised, OR you add a power flag,
 which simply says that the net is energised. You use power flags in
 situations where you are connecting an external power source to your
 circuit via a connector, flying leads and so on.

 The one oddity is that GND is considered a power out type net as well, so
 it also needs energising with a power flag.

 logic IC's have generally had their power pins identified by names
 rather than the voltage, so you have Vcc Vss Vdd and so on.

 When you run into such chips, the same will apply, power ports of the
 same name are already considered to be connected to the physical supply

 Andy





 On Mon, 15 Mar 2010 16:13:15 -
 mthelingp...@swapout.de  wrote:

 Hi Robert,

 if I connect for example a net +5V to a component U2A which has an VCC 
 input as invisible pin, I see that  in PCBnew the pin is connected to the 
 +5V net as soon as I set an Powerflag to +5V.
 But the ERC check in eeschema states this as error :
 ErrType(5): Conflict problem between pins. Severity: error
  @ (5,1000 ,6,7500 ): Cmp #FLG01, Pin 1 (power_out) connected to
  @ (4,4000 ,6,7500 ): Cmp #FLG06, Pin 1 (power_out) (net 3)

 If I don't connect a Powerflag to the +5V net, in PCBnew the Power Pin of 
 U2A is still connect to the VCC net and not to +5V as set in the schematic.
 Please see schematic for example:
 http://www.swapout.de/example_schematic.pdf

 What I am doing wrong?

 Thank you,

 best Regards,
 Mark




 

 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
 Links





 

 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
 Links






 No virus found in this incoming message.
 Checked by AVG - www.avg.com
 Version: 9.0.790 / Virus Database: 271.1.1/2749 - Release Date: 03/15/10 
 19:33:00

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Checked by AVG - www.avg.com 
Version: 9.0.790 / Virus Database: 271.1.1/2750 - Release Date: 03/16/10 
07:33:00


Re: [kicad-users] change net connection of invisible Pins

2010-03-13 Thread Robert
Click on the Show Hidden Pins button (which looks like a ghost with a 
large lollipop) on the left-hand toolbar.   This will allow you to 
connect the now visible power pins to whichever rail you want to.   Note 
that sometimes these pins are not salient and you either need to check 
the library or simply guess at the location of the pin.

Regards,

Robert.

On 12/03/2010 23:27, Mark wrote:
 Hi all,

 first of all I want to say thank you to the development team for this
 great software!

 I have a question regarding the net connection of invisible pins.
 For example, I use the TLC555 from Kicad Lib which has the invisible
 pins VCC and GND.
 Is there a way to set the VCC Pin to an other Net than VCC (for example
 VCC1) from eeschema?
 Or should I edit the component and change the net via the Lib editor?

 In case that I use more logic parts in a circuit, I try to connect some
 of this parts to normal VCC, an some (same component type) to an other
 power port (for example VCC1). Is this possible without creating the
 component two times in the library?


 Thank you,

 Mark





 No virus found in this incoming message.
 Checked by AVG - www.avg.com
 Version: 9.0.733 / Virus Database: 271.1.1/2741 - Release Date: 03/12/10 
 09:42:00

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Checked by AVG - www.avg.com 
Version: 9.0.733 / Virus Database: 271.1.1/2741 - Release Date: 03/12/10 
09:42:00


Re: [kicad-users] change net connection of invisible Pins

2010-03-13 Thread Robert
You need only connect the power to one part of a component for all parts 
of that component to be powered from the same rails.   However, if you 
have, for example six quad nand gates (ie six components), then 
connecting one part of one quad nand gate to a different set of power 
rails doesn't connect up the other five quad nand gates, just the three 
other gates in the same component.

Regards,

Robert.

On 13/03/2010 08:54, Mark wrote:
 Hi Robert,

 thank you for your fast answer.
 Is this connection to the net which is named at the invisible pin
 removed in case that I connect it as you explained to an other net/
 power pin manually?
 Should I connect the invisible Pins of all units of an component to the
 new power pin, or is it enough to connect the new power pin only to one
 unit?

 Best Regards,

 Mark

 Am 13.03.2010 09:17, schrieb Robert:

 Click on the Show Hidden Pins button (which looks like a ghost with a
 large lollipop) on the left-hand toolbar. This will allow you to
 connect the now visible power pins to whichever rail you want to. Note
 that sometimes these pins are not salient and you either need to check
 the library or simply guess at the location of the pin.

 Regards,

 Robert.

 On 12/03/2010 23:27, Mark wrote:
  Hi all,
 
  first of all I want to say thank you to the development team for this
  great software!
 
  I have a question regarding the net connection of invisible pins.
  For example, I use the TLC555 from Kicad Lib which has the invisible
  pins VCC and GND.
  Is there a way to set the VCC Pin to an other Net than VCC (for example
  VCC1) from eeschema?
  Or should I edit the component and change the net via the Lib editor?
 
  In case that I use more logic parts in a circuit, I try to connect some
  of this parts to normal VCC, an some (same component type) to an other
  power port (for example VCC1). Is this possible without creating the
  component two times in the library?
 
 
  Thank you,
 
  Mark
 
 
 
 
 
  No virus found in this incoming message.
  Checked by AVG - www.avg.com
  Version: 9.0.733 / Virus Database: 271.1.1/2741 - Release Date:
 03/12/10 09:42:00
 





 No virus found in this outgoing message.
 Checked by AVG - www.avg.com
 Version: 9.0.733 / Virus Database: 271.1.1/2741 - Release Date:
 03/12/10 09:42:00




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 Checked by AVG - www.avg.com
 Version: 9.0.733 / Virus Database: 271.1.1/2743 - Release Date: 03/13/10 
 07:33:00

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Version: 9.0.733 / Virus Database: 271.1.1/2743 - Release Date: 03/13/10 
07:33:00


Re: [kicad-users] Re: Recommended Version for a New User Running Windows 7?

2010-03-11 Thread Robert
RC stands for Release Candidate (for the upcoming new version).   For 
the stable version, go to 
http://kicad.sourceforge.net/wiki/index.php/Main_Page.   Near the top it 
says Get KiCad, and immediately below that are the download links for 
the current stable version.

Regards,

Robert.

On 10/03/2010 21:43, Stanley_Allen wrote:
 I see on the download site http://iut-tice.ujf-grenoble.fr/cao/ the 
 following. Are the two versions RC4 (2/2010) and RC5 (2/2010) considered 
 Developmen Versions? Which do you consider the most stable version for 
 Windows 7? Should I use the 20/03/2009 version? Thanks!

 20/03/200922:13 40697028 KiCad-2009-02-16-final-WinXP_autoinstall.zip

 20/03/200911:29 95375540 
 KiCad-2009-02-16-final-WinXP_full_with_components_doc_autoinstall.zip

 21/02/201021:01114339391 
 KiCad-2010-02-17-RC4-WinXP_full_with_components_doc_autoinstall.zip

 28/02/201021:00114460347 
 KiCad-2010-02-28-RC5-WinXP_full_with_components_doc_autoinstall.zip


 --- In kicad-users@yahoogroups.com, kajdaskaj...@...  wrote:

 Use latest stable version.
 Development versions do not work reliably on Windows 7 yet.
 M.

  Stanley Allenstanley_al...@...  wrote:

 =
 I have a pretty high end PC running Windows 7 with Intel Core 2 Quad, 6 GB 
 of DDR2 RAM.

 Please let me know as a new user what version kicad I should download and 
 why.  I would rather have a more stable version but understand the newer 
 versions might be worth trying.

 Do you recommend any particular download site?

 thanks,
 Stan





 

 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
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Re: [kicad-users] removing a module from a library

2010-03-08 Thread Robert
Select the library in the module editor using the left-most button on 
the toolbar, and then click the bin icon (fourth from left).

Regards,

Robert.

On 08/03/2010 14:04, bbt5001 wrote:
 While learning how to work with the module editor I created a library with a 
 few modules that ought not to be there.  Is the only method to delete a 
 module simply to edit the .mod file?

 Thanks,
 --Jim



 

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Re: [kicad-users] Doubling up for power traces

2010-03-08 Thread Robert
Before creating the second set of tracks, Select Preferences...General, 
and then unselect Tracks Auto Del.

Regards,

Robert.


On 08/03/2010 13:50, bbt5001 wrote:
 I made a relatively simple board consisting of two through-hole connectors 
 and one or two surface mount devices. Since I had double-sided available I 
 thought I'd use it to provide extra current capability, so after making my 
 point-to-point connections on one side (satisfying the DRC with no unrouted 
 nets) I switched to the other layer and repeated the connections.  But when I 
 generated the gerber files only the traces for one side appeared. Everything 
 else was correct: all the through holes had both copper and component layer 
 annuli, and the one SMD component had the correct component layer traces.  
 But the additional (redundant) traces on the copper side were removed.

 Is this an intentional feature of the program? Is there a way to disable it?

 Thanks,
 --Jim



 

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Re: [kicad-users] 3d model of a big resistor

2010-03-02 Thread Robert
Unfortunately the bottom line is that unless someone else has modelled 
it you have to get to grips with Wings.   Fortunately that's not too 
difficult.   The way I approached this was firstly I just adjusted the 
scaling parameters in kicad of a similar existing component model. 
That will almost certainly mean you end up with the wrong number of 
pins, so when you're fed up with that that you can progress to doing the 
scaling in Wings and adjusting the number and position of pins as 
necessary.   Then you can move on to creating components from scratch. 
  Don't forget that all you really need is a box of sufficient size to 
indicate the dimensions of the body, and something to show the position 
of all the pins.   If you've done everything correctly twice, your Wings 
model will fit on the footprint in the kicad 3D view - a very useful 
check of your work.

The units used by the existing kicad Wings models are Imperial, so when 
published dimensions are in metric only you either have to divide them 
all by 2.54 (tedious), or you work in Wings in metric (scaling as 
required existing models).   The resulting model will then either have 
to be scaled back to Imperial, or you can do the scaling in kicad.

Regards,

Robert.

On 02/03/2010 14:37, andyf97 wrote:
 Hi,

 I am another new user of Kicad and find it incredible, I have been struggling 
 a lot with other PCB cad applications and Kicad is the first one that I find 
 to be really user friendly, a big credit to the authors who are doing an 
 excellent job. I want to get more into Kicad so am spending a lot of time to 
 learn although its a slow progress.

 Anyway, I have started to put together a design and created a footprint for a 
 component that I cant find in any library and would also like to have a 3d 
 model for it.

 I am a bit familiar with 3d modeling but creating models is well beyond me, 
 so I am wondering/begging if anyone out there could help me with a bit of 
 modeling, to be very honest I am very crap with 3d applications like wings 
 and I need a model that is similar to a T0220_vert as in the libraries.

 The model I need is for a PBV Precision Current Sensing Resistor, its like 
 the wider version of a TO220_vert model found in the Kicad lib but the PBV 
 has four legs instead of 3, to describe it, its like having two T0220s side 
 by side.

 Here's a photo 
 http://www1.conrad.de/xl/4000_4999/4400/4470/4473/447315_BB_00_FB.EPS.jpg

 The pins pitch are
 Pin 1 and 2 are 200mils apart
 Pin 3 and 4 are 200 mils apart
 The space between pin 2 and 3 is 300mils

 What I am thinking is that the T0220 middle pin could be removed, then the 
 T0220 is stretched then another two pins added. How that is done in 3d apps I 
 have no idea and to be honest while learning wings could benefit later its 
 too much to take in while also trying to get my head around Kicad, also I 
 rarely use 3d apps.

 Also, will I be able to add onto the board design the heat sink mounting bar, 
 should this be created as a component?

 The heat sink mounting bar is actually nothing more than a flat alloy plate 
 at 130mm x 5mm x 25mm that should also fix to the PCB design, on this plate I 
 will have 5 T0220s and two PVR resistors mounted.

 Best Regards

 Andy



 

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 question.
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Re: [kicad-users] Re: eeschema: How to update the DATE field in the title block?

2010-02-19 Thread Robert
Thanks.   I was getting close to resorting to that at one point :).   I 
was just wondering if this is a bug (and a very old one at that), in 
which case I should log it in the bug tracker, or a feature I don't 
understand.   Looks like it's probably a bug.

Regards,

Robert.

Richard Webb wrote:
 The .sch format is ASCII text with the title block items right up near the 
 top, so it's a quick edit to make if it doesn't update as or when expected.
 
 --- In kicad-users@yahoogroups.com, Robert birmingham_spi...@... wrote:
 I've just had my attention drawn to the fact that the date hadn't 
 updated on one of my schematics after I made a few changes to component 
 values.   I was thankful find a thread on this subject in the archive. 
   I had already tried (unnecessarily) editing the sheet properties and 
 saving the netlist before searching, but I would never have thought of 
 annotating to update the date.   The Help just says The date is 
 automatically updated.

 I can understand why the date shouldn't just reflect when you last saved 
 the file, but surely it should update after any change.   Am I missing 
 something?

 Regards,

 Robert.

 --- In kicad-users@yahoogroups.com, calvingrier cgrier@ wrote:
  
   --- In kicad-users@yahoogroups.com, johnppeter john_peter@
   wrote:
   
I am a new user, and I have begun a simple hierarchical design
exercise in eeschema.  I notice that when I change the schematic and
save the project, the date field in the title block does NOT change,
on the primary sheet.
   
A sub-sheet in the design does not show a date, at all.  This is
peculiar and undesirable.
   
I am using a very recent version of the KiCad software...Oct 27,
   2007,
I believe.
   
Could anyone tell me how to:
   
1) get date information into all sheets in a hierarchical design?
2) change date information manually on one page?
3) allow eeschema to automatically update the DATE field of the
   title
block?
  
  
   I know this sounds a little strange, but try annotating, and
   generating a netlist. Mine seems to update all sheets if I do these
   steps.
  


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 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
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Re: [kicad-users] Re: Formal Checking Method for PCB Designs

2010-02-15 Thread Robert
 Here is one a bit more encompassing that covers schematic, PCB and 
 even system-level checks. These are out there on the web and I pulled
  together these two complete lists that are in the one DOC file.

There's some useful stuff in there.   I can see that the two could
perhaps be combined, but for the moment IMHO it would be sensible to 
have files on how to check designs together in one directory.   Are you 
able to save your file in my FormalCheckingMethod directory?   If so, 
I'll rename my directory to something more general.

 I do like the focused PCB one you posted.

Thank you.   My own goal was to create something that catches all the 
show-stoppers and some of the more annoying errors without creating 
something that is so long and complicated it never gets used.   However, 
as I was writing the guidance notes I realised it could do with links to 
more detail.

Regards,

Robert.

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Re: [kicad-users] Re: Formal Checking Method for PCB Designs

2010-02-15 Thread Robert
Thank you.   All the files are now in:

http://tech.groups.yahoo.com/group/kicad-users/files/DesignCheckingTechniques/

Regards,

Robert.

Derek Koonce wrote:
 No problem. It has been moved.
 
 Derek Koonce
 
 
 
 Robert wrote:
 Here is one a bit more encompassing that covers schematic, PCB and
 even system-level checks. These are out there on the web and I pulled
 together these two complete lists that are in the one DOC file.
 There's some useful stuff in there. I can see that the two could
 perhaps be combined, but for the moment IMHO it would be sensible to
 have files on how to check designs together in one directory. Are you
 able to save your file in my FormalCheckingMethod directory? If so,
 I'll rename my directory to something more general.

 I do like the focused PCB one you posted.
 Thank you. My own goal was to create something that catches all the
 show-stoppers and some of the more annoying errors without creating
 something that is so long and complicated it never gets used. However,
 as I was writing the guidance notes I realised it could do with links to
 more detail.

 Regards,

 Robert.


 


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 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
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[kicad-users] Formal Checking Method for PCB Designs

2010-02-12 Thread Robert
As promised I've uploaded files relating to the formal checking method I 
developed for checking the PCBs I design:

http://tech.groups.yahoo.com/group/kicad-users/files/FormalCheckingMethod/

Although created using OpenOffice, I've uploaded the files in MS Office 
97 format and HTML format to maximise their accessibility.   The HTML 
version of the spreadsheet is a bit crummy, but it needs to be a totally 
ubiquitous format that allows editing of tables and I can't think of 
anything better for anyone who can't or wont open an old Microsoft 
format file.

So far it's proved effective, but I continue to develop it and I'm sure 
others will have their own contributions based on their personal experience.

I hope you find it helpful.

Regards,

Robert.
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Re: [kicad-users] Formal Checking Method for PCB Designs

2010-02-12 Thread Robert
Heh.   I was using the Office 97 documents as my master documents, 
editing them in OpenOffice.   I don't even have MS Office installed, so 
the irony is that Microsoft Office users are the ones more likely to 
have a problem, though the formatting is very basic and it's unlikely.

However, it's nice to promote free software, so I've switched to using 
OpenOffice format for the master documents (saving several tens of kb of 
disk space in the process) and uploaded them.

Regards,

Robert.

Donald H Locker wrote:
 Hello, Robert.
 
 Would you also care to upload the OOo version?  Those of us using OpenOffice 
 might find the native version easier.
 
 Thank you!
 Donald.
 - Robert birmingham_spi...@gmx.net wrote:
 
 As promised I've uploaded files relating to the formal checking method
 I 
 developed for checking the PCBs I design:

 http://tech.groups.yahoo.com/group/kicad-users/files/FormalCheckingMethod/

 Although created using OpenOffice, I've uploaded the files in MS
 Office 
 97 format and HTML format to maximise their accessibility.   The HTML

 version of the spreadsheet is a bit crummy, but it needs to be a
 totally 
 ubiquitous format that allows editing of tables and I can't think of 
 anything better for anyone who can't or wont open an old Microsoft 
 format file.

 So far it's proved effective, but I continue to develop it and I'm
 sure 
 others will have their own contributions based on their personal
 experience.

 I hope you find it helpful.

 Regards,

 Robert.

 
 
 
 
 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
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Re: [kicad-users] Re: Completely depressing !

2010-02-11 Thread Robert
 with my own Symbols, i never used the pin types/propertys, i only set
 them to passive or not specifyed. So it would be a great thing,
 having such a check list.

Erm - that's like driving without a safety belt.   One of things you 
should do in a formal checking method such as mine is an Electrical 
Rules Check (ERC).   This is only useful if you have marked your pins 
correctly.   It might be a pain dealing with all those ERC failures, but 
spending money on a useless piece of scrap is even more painful.

In general checking is slow and very boring, which means your mind 
quickly starts thinking of warm beaches, high mountains, and whatever 
else turns you on.   That's why you need tools to keep you on track.

Regards,

Robert.

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Re: [kicad-users] Re: Completely depressing !

2010-02-10 Thread Robert
I have developed a formal method of checking designs.   It's very 
tedious, but providing you can stay awake and don't skip things you're 
certain are correct it seems to be pretty good at finding problems. 
You also have to stay calm when you get yet another automated telephone 
call congratulating you on winning a cruise in the Caribbean.

If anyone is interested I'll upload the necessary file to Yahoo groups 
(along with instructions).

Regards,

Robert.

giordano.george wrote:
 There's no substitute for process.  Where I work, the rule is that 2 sets of 
 eyes check every schematic symbol.  Just because the symbol has a pin labeled 
 reset and it's on pin 1 doesn't mean that the datasheet agrees with the 
 symbol.
 
 Also, two sets of eyes are required to check every package symbol.  Pin 1 has 
 to be where pin 1 of the drawing says it's supposed to be.  And, of course, 
 every dimension of the package has to match the drawing.
 
 The problem I see, because I'm (lots of us are) doing home-brew designs 
 outside of work, is that there's no second set of eyes to check these things. 
 If you're using this tool at work, then have someone take the datasheet and 
 hi-lite every pin in both the datasheet and the schematic symbol.  Likewise 
 for the footprint symbol.  Then, file these away with the design 
 documentation so there's no second-guessing by management later when there's 
 an error.  You could do this at home as well but whenever the same set of 
 eyes does the making and checking, there's a much greater chance of an error 
 sneaking through.
 
 Of course, when the symbol and package have 1152 pins, everyone runs 
 screaming the other way when I show up in their office to request a symbol 
 check.
 
 It's discipline and process that separates the amateurs from the pro's.  So, 
 develop a process, even if you're on your own, and follow it rigorously.
 
 --- In kicad-users@yahoogroups.com, Stephrac74 stephra...@... wrote:
 Hi guys,

  

 I would like to share with you my very bad experience in order to help you
 to avoid becoming completely depressed as I am now…

  

 I've been working about 50 hours on a PCB using Kicad and the libraries
 found on the soundforge. I've a TFQP microcontroller in my design and used
 the module found in microchip-2 library called TQFP64 ! I've not checked
 before drawing the PCB that the module was ok…. And what a mistake !

  

 The module is wrong, dimensions are not correct making the component
 impossible to mount and solder ! I can of course correct this by changing
 the module, but using Kicad this means erasing all the wires connected there
 and restart most of my design (very compact). I think about 20h more to
 spend on this PCB…

 That is absolutely dramatic for a professional use as spending 70h on a such
 basic PCB with around 100 components !

  

 So my best advice is to redesign all your modules and not spend one minute
 using the libs you can find in Kicad or on the web. There are so many errors
 that you discover all along your design (silkcreens, wrong dimensions, …)
 making finally a massive waste of time. Of course, If I knew that before I
 would have redesigned all the components and created my own libs…

  

 Hoping it will prevent some other people to face what I'm facing now ! 

  

  

 Best

 Stephane

 
 
 
 
 
 
 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
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Re: [kicad-users] Re: Completely depressing !

2010-02-10 Thread Robert
Just to let you know I'm preparing some instructions for my own formal 
method which I will upload in the next few days.   I'm trying to write 
them so they could be used by a beginner rather than just slapping a 
file on the server and leaving it for people to figure out for 
themselves, so it will take me a little while.

Although it's better to get someone else to check your work, sometimes 
you have no choice.

Regards,

Robert.

Stephrac74 wrote:
 I’m usually a very consciencious guy and very formatted with processes for
 RD. This comes from big companies where I worked.
 
 However, now I’m working alone and that’s not easy to find a second eyes
 pair !
 
  
 
 However with time we can achieve the “good at first time”
 
  
 
 As I was in a hurry for this project, I’ve made some short circuits in the
 process …. And I shouldn’t ! 
 
  
 
  
 
 I would be please to see your process too Robert.
 
  
 
 Best
 
 Stephane
 
 www.hamradio-experiments.com
 
  
 
  
 
 De : kicad-users@yahoogroups.com [mailto:kicad-us...@yahoogroups.com] De la
 part de Anders Gustafsson
 Envoyé : mercredi 10 février 2010 18:53
 À : kicad-users@yahoogroups.com
 Objet : Sv: Re: [kicad-users] Re: Completely depressing !
 
  
 
   
 
 Yes, please!
 
 - Anders Gustafsson
 Engineer, CNE6, ASE
 Pedago, The Aaland Islands (N60 E20)
 www.pedago.fi
 phone +358 18 12060
 mobile +358 40506 7099
 fax +358 18 14060
 
 
 Robert birmingham_spi...@gmx.net mailto:birmingham_spider%40gmx.net 
 2010-02-10 19:50 
 If anyone is interested I'll upload the necessary file to Yahoo groups 
 (along with instructions).
 
 
 
  
 
 
 ---
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 Aucun virus connu à ce jour par nos services n'a été détecté.
 
  
 
 
 
 
 
 
 
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Re: [kicad-users] DXF Import

2010-02-08 Thread Robert
Thank you for getting in touch.   I was thinking of modifying TTConv, 
but since discussing this would be off-topic I will contact you directly.

For the moment I have uploaded two zip files and a README to:

http://tech.groups.yahoo.com/group/kicad-users/files/TTConv/

This is just for Windows for the moment, but it would make sense to have 
something for Linux here too.   Other (modern) operating systems are 
outside my experience.

Regards,

Robert.

Devid Spagni wrote:
 I write TTConv to speed up my work but I'm not a programmer.
 Dxf2Kicad works but has many problems and should be revised thoroughly.
 
 If you need the converter I Dxf2Kicad without graphical interface.
 
 Sorry for my bad English.
 
 Regards
 Devid
 
 
 
 
 
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 question.
 Please post your bug reports here. They will be picked up by the creator of 
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Re: [kicad-users] newb question - revising an existing schematic/pcb after pcb is layed out?

2010-02-07 Thread Robert
Kicad does not require you to restart a board from scratch every time 
you make a change in the schematic.   After you make the change in 
eeschema, save the netlist again and read it back in into pcbnew.

Regards,

Robert.

bjbuelow wrote:
 Is there a way to make revisions to a existing schematic and then make a 
 corresponding incremental change to an existing pcb?  From the docs, it 
 appears that doing this requires starting the pc layout from scratch.
 
 thanks
 B
 
 
 
 
 
 
 
 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
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Re: [kicad-users] what does pin shape low in mean? is that the same as active low?

2010-02-04 Thread Robert
Thanks, that's certainly a useful document.   However, I'm confused. 
It appears to be an IEEE (ie American) standard, but it does make 
reference to the IEC.   The international standard, as far as I can 
tell, is IEC60617.   I don't know if there is an ISO standard or if 
IEC60617 was produced in conjunction in some way with the ISO.   Does 
this document in fact represent IEC60617?

There has been quite a bit of discussion about libraries on the list 
recently.   IMHO it would be better if kicad libraries as a minimum 
followed an international standard; I know I'm not the only person not 
to recognise library symbol CAPAPOL, and that's just a capacitor. 
Should that standard be IEC60617 or something else?

I did try to find a copy of IEC60617, but the IEC want money for it.

Regards,

Robert.

P.B.J. van Elswijk wrote:
 Maybe this attachment could be of some help?
 
 PvE
 
   - Original Message - 
   From: Robert 
   To: kicad-users@yahoogroups.com 
   Sent: Wednesday, February 03, 2010 20:37
   Subject: Re: [kicad-users] what does pin shape low in mean? is that the 
 same as active low?
 
 
 
   I was just researching this today. Since no-one else has replied, I'll 
   let you have the benefit of my inexpert opinion. I came to the 
   conclusion from my research that it is used with IEEE standard symbols, 
   but apparently it is interchangeable with the invert (round circle) 
   symbol. However, adding a symbol to a standard that means the same as 
   one that already exists in that standard seems illogical to me.
 
   I did try to find out what the IEC standard is, but they would only tell 
   me if I crossed their palms with gold. I'm not sure what is the point 
   of a standard that is only revealed to a select few.
 
   Regards,
 
   Robert.
 
   josh_eeg wrote:
what does pin shape low in mean? is that the same as active low?





Please read the Kicad FAQ in the group files section before posting your 
 question.
Please post your bug reports here. They will be picked up by the creator 
 of Kicad.
Please visit http://www.kicadlib.org for details of how to contribute 
 your symbols/modules to the kicad library.
For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
 Links




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Re: [kicad-users] Re: hi is low in for active low inputs? when I make a schematic symbol for a chip?

2010-02-03 Thread Robert
Splendid!   Thank you, Vladimir!

Regards,

Robert.

vladimir_uryvaev wrote:
 
 --- In kicad-users@yahoogroups.com, Robert birmingham_spi...@... wrote:
 Is there a way to untilde, so that the second half of the name does 
 not have a bar over it?   Some pins have a secondary function that isn't 
 inverted, eg:

 -
 RESET(DEBUG_CLK)
 
 Use second tilde:
 ~RESET~(DEBIG_CLK)
 Regards,

 Robert.
 
 
 
 
 
 
 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
 Links
 
 
 
 
 
 
 
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[kicad-users] DXF Import

2010-02-03 Thread Robert
Having experienced the joy of installing the correct Python bits and 
pieces on my Windows PC in order to run TTConv I thought I would see if 
I can compile the scripts into an executable.   I have just done that 
(using pyinstaller) and Stéphane (Stephrac74) has confirmed it runs OK 
on a PC that hasn't had Python installed on it.

The result is a 7Mb zip file, and I thought it might be a good idea to 
place it on a suitable server for the benefit of others.   Any suggestions?

The Python compiler claims also to be able to create Linux executables. 
   Would that be useful (I don't know how much hassle it is to run the 
TTConv scripts on a Linux machine)?   If it's worth doing I'm prepared 
to take a closer look at it (all I've established so far is that 
pyinstaller is not a cross-compiler).

Regards,

Robert.
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Re: [kicad-users] what does pin shape low in mean? is that the same as active low?

2010-02-03 Thread Robert
I was just researching this today.   Since no-one else has replied, I'll 
let you have the benefit of my inexpert opinion.   I came to the 
conclusion from my research that it is used with IEEE standard symbols, 
but apparently it is interchangeable with the invert (round circle) 
symbol.   However, adding a symbol to a standard that means the same as 
one that already exists in that standard seems illogical to me.

I did try to find out what the IEC standard is, but they would only tell 
me if I crossed their palms with gold.   I'm not sure what is the point 
of a standard that is only revealed to a select few.

Regards,

Robert.

josh_eeg wrote:
 what does pin shape low in mean? is that the same as active low?
 
 
 
 
 
 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
 Links
 
 
 
 
 
 
 
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Re: [kicad-users] Using the component POS file correctly

2010-02-02 Thread Robert
Heh - I had this exact same problem last year, and someone on the list 
kindly provided the answer.   Take a look at the module properties of 
the missing modules, and check the Attributes are set to 
Normal+Insert.   You will probably want to go through and correct your 
library rather than just editing the placed modules; you can then use 
the Change modules button (Right click on the a module on the board, 
footprint xyz...Edit) to update your board from the library.

Regards,

Robert.

burnsrobbie wrote:
 Hi Kicad has been great so far and prototype PCBs have been made.
 
 The subcontractor wants a position file, while Kicad does offer the output, 
 it seems to be losing some components
 
 For example I have U1 -U4 on the schematic but only U1 shows on the .POS 
 report.
 
 I think there may be some rules or switches in PCB tool or module Editor. I 
 have not yet had much luck in finding the information the manual. I think 
 that the problem is mostly with footprints I created or modified.
 
 Is there anyone in the group  who can help please?
 
 Many thanks
 
 Robbie Burns
 
 
 
 
 
 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
 Links
 
 
 
 
 
 
 
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Re: [kicad-users] SPDT?

2010-01-26 Thread Robert
It's called SWITCH_INV in the library.

Regards,

Robert.

rocko wrote:
 Where the heck is the SPDT switch?
 I don't believe kicad doesn't have one.
 
 Something as simple as this should be easy to find, like right next to
 the SPST one.
 
 
 
 
 
 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
 Links
 
 
 
 
 
 
 
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Re: [kicad-users] libs silkscreens unusable

2010-01-22 Thread Robert
Stephane,

I noticed this problem long ago.   I use kicad professionally, but I 
cannot see how *anyone* could use these footprints as they are except by 
simply producing boards without a silk screen.   However, I don't 
understand why you find this such a show-stopper.   When I find such a 
footprint I simply save it in my own library, modify the silk screen, 
and carry on.   It takes a few seconds, and I usually use the 
opportunity to set text visibility and size to my own personal 
preferences.   And therein lies the rub; whoever creates the library, no 
matter how careful they are they will likely have different requirements 
from you, so you end up having to edit the supplied footprints anyway.

What I personally find a big show-stopper in commercial PCB packages is 
the appalling UI.   This generally seems to originate from a Unix 
command line app that was ported to a DOS graphical interface and then 
the resulting irregularly octagonal peg has been rammed into a Windows 
round hole (the authors of the last such package I used were so proud of 
this feature they made it part of their marketing).   After a day of 
using such a package I'm generally absolutely furious, which does 
nothing for the quality of my work.   I'm producing boards far more 
professionally with kicad than I ever did with a commercial product, and 
that is almost entirely down to the kicad UI.   It isn't perfect, but at 
least it largely follows current practice.   Footprints I can fix 
easily; fixing the UI is rather more difficult.

Since you're clearly upset by the existing library, have you considered 
donating your own library to the kicad project?

Regards,

Robert.


Stephrac74 wrote:
 I’ve got these libs… thanks. They are converted from an other CAD software 
 (Eagle I guess). You will notice that these libs can’t be viewed or managed 
 by the Lib management tools which are in portugese or so (Mod2mod, Lib2lib, 
 …) for some reason.
 
  
 
 To illustrates what I was saying, on the www.kicadlib.org, most of the SMD 
 parts which can be seen from this link have the issue. For instance :
 
 http://www.kicadlib.org/modules/d2pak.png
 
 http://www.kicadlib.org/modules/tssoic28.png
 
 http://www.kicadlib.org/modules/vqfp80.png
 
 http://www.kicadlib.org/modules/3M_Serie_2500_SMD.PNG
 
  
 
 You see the silkscreen on pads ! no way to industrialize a PCB from this. It 
 must be modified…
 
  
 
 Same remark on some libs I’m using from  http://library.oshec.org/ 
 http://library.oshec.org/ like the vishay 153 caps, diods, transistors or 
 power transistors…
 
  
 
 this one is correct : http://www.kicadlib.org/modules/lm4674_llp_sqa16a.png
 
  
 
 After a deeper look at these additional libs, I think most of the SMD part 
 numbers have the issue  L
 
  
 
 So what I’m doing now is to pick up the component I need from these libs, and 
 then duplicate it into a own lib and modify it !
 
 I’ve spent all the day doing that and I’ve not finished ! This is a nightmare 
   ;-)
 
  
 
 For this project I guess I’m going to continue but for new projects I may 
 switch to another CAD system. Altium Designer looks good and is not so 
 expensive. It’s a pity as I like Kicad and the job done for the development 
 is fantastic,  but … these 2% details makes me wasting my time so my money…
 
  
 
 Best
 
 Stephane
 
  
 
  
 
  
 
 De : kicad-users@yahoogroups.com [mailto:kicad-us...@yahoogroups.com] De la 
 part de Andy Eskelson
 Envoyé : jeudi 21 janvier 2010 17:40
 À : kicad-users@yahoogroups.com
 Objet : Re: [kicad-users] libs silkscreens unusable
 
  
 
   
 
 I understand, there is not really much that can be done about that apart
 from a reedit.
 
 The only thing I can suggest is to have a look at some other libs. 
 
 If you have a look here:
 
 http://library.oshec.org/
 
 There are 1000's of converted libs and mods, and looking at some of them
 the outlines do keep clear of the pads, (at least on the sides needed for
 solder on the dpacks I looked at as examples.)
 
 At the top of the page is a link to download the whole lot, about a 12Mb
 download.
 
 That might save you a bit of time.
 
 The above site is linked via 
 
 http://www.kicadlib.org/
 
 then via 
 
 http://per.launay.free.fr/kicad/kicad_php/composant.php
 
 Both the kicadlib and Pierre Launay's sites are worth bookmarking
 
 Andy
 
 On Thu, 21 Jan 2010 14:18:25 +0100
 Stephrac74 stephra...@wanadoo.fr mailto:stephrac74%40wanadoo.fr  wrote:
 
 Hi Andy,



 In fact this option only enables you to add or not the pads footprint on the 
 silkscreen.



 The problem is different. The components silkscreens in libs are drawn on 
 pads making soldering impossible. I do not see other option rather than 
 making the modification on each concerned component.

 This is usually the problem when libs are made by contributors and not 
 checked. The problem occurs for instance for Vishay electrolytic caps, SMD 
 crystals, sot223, DPACK, etc…



 I’ve started 5 hours ago to modify all

Re: [kicad-users] libs silkscreens unusable

2010-01-22 Thread Robert
Stephane,

I've not bothered to go through the entire library of footprints, I just 
edit them on demand.   The net result is that the total time I've spent 
on this is perhaps minutes.   I don't bother editing a footprint just 
because the text isn't as I like it unless I know I'm going to be 
placing a lot of that particular footprint, the reason being that I 
usually end up moving and editing component texts on the board itself 
anyway in order to squeeze them into the (usually very limited) 
available space.   If you like I can send you a photo of one of my kicad 
boards and you can decide for yourself if it looks professional enough.

I've just completed a design for a customer using their mechanical 
drawing originally created in AutoCAD, and posted a description (in 
English) of how to do it on this list.

Altium does seem to have a good reputation, but of course you need to 
have the money for it - and the inevitable upgrades.   Like anything 
else you pays your money and you takes your choice.

Regards,

Robert.

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Re: [kicad-users] Re: libs silkscreens unusable

2010-01-22 Thread Robert
n1ist wrote:
 Is this really an issue?  All of the board houses that I have used

In my experience yes, it can be.   Even if the board house will fix it 
for you, a customer who chooses to look over the Gerbers is likely to 
complain.

Regards,

Robert.


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Re: [kicad-users] Gerbview and drill file

2010-01-18 Thread Robert
Kicad wont display the drill file, but to repeat my very recent post, 
gerbv (http://gerbv.sourceforge.net/) will do so nicely.

Regards,

Robert.


Jean-Paul Gendner wrote:
 Hello,
 
  
 
 I have not found a way to view a drill (.drl) file with
 Gerbview. Is this right or how may I do?
 
  
 
 Regards,
 
 Jean-Paul
 
  
 
 
 
 Jean-Paul Gendner
 
 03.88.27.03.44
 
 
 
 
 
 
 
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Re: [kicad-users] Gerbview and drill file

2010-01-18 Thread Robert
gerbv will do what you describe in your post, but I've not used 
GC-Prevue so I don't know how it compares.   I'm reasonably happy with 
gerbv; it works nicely alongside kicad.

IMHO it is better to use a Gerber viewer that is not connected with the 
package that created the Gerbers as that minimises the chance of a 
single programmer making the same mistake twice.

Regards,

Robert.

Jean-Paul Gendner wrote:
 Thank you Robert,
 
  
 
 That is what I feared.
 
 I use GC-Prevue to do it. It is important for me because I view
 simultaneously the drill file and one of the cupper and mask file, so it is
 very easy to see if I have forgotten to check any case in the pad
 proprieties during creating a module. This future improvement for Kicad
 (gerbview) seems to be very important for me.
 
  
 
 Regards,
 
 Jean-Paul
 
  
 
 
 
 Jean-Paul Gendner
 
 03.88.27.03.44
 
   _  
 
 De : kicad-users@yahoogroups.com [mailto:kicad-us...@yahoogroups.com] De la
 part de Robert
 Envoyé : lundi 18 janvier 2010 09:50
 À : kicad-users@yahoogroups.com
 Objet : Re: [kicad-users] Gerbview and drill file
 
  
 
   
 
 Kicad wont display the drill file, but to repeat my very recent post, 
 gerbv (http://gerbv. http://gerbv.sourceforge.net/ sourceforge.net/) will
 do so nicely.
 
 Regards,
 
 Robert.
 
 Jean-Paul Gendner wrote:
 Hello,



 I have not found a way to view a drill (.drl) file with
 Gerbview. Is this right or how may I do?



 Regards,

 Jean-Paul



 

 Jean-Paul Gendner

 03.88.27.03.44




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[kicad-users] Arcs

2010-01-08 Thread Robert
When plotting a Gerber PCBNew converts arcs to a series of straight 
lines (I counted 14).   This makes a PCB edge consisting of a large arc 
visibly notchy.   Does anyone know of a way of increasing the number of 
segments used?

Regards,

Robert.
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[kicad-users] Re:My schematics I want to share but if it is not a print screen the ou

2010-01-06 Thread robert


--- In kicad-users@yahoogroups.com, josh_eeg josh...@... wrote:

 if I output to other things instead of to pdf the text looses periods would 
 you sugjest checking the make letters vectors button or something? I would 
 like to make them .gif files because they can be shown on a webpage in the 
 browser. 

Do you mean e.g.

text, text. text: is turned to text text text ?

That would be strange. When exporting to pdf I always have the text replaced by 
vectors. Even if I export to PNG in Inkscape I can't reproduce that problem 
here.

 
 --- In kicad-users@yahoogroups.com, madworm_de.yahoo@ wrote:
 
  I usually do it like this:
  
  1. Plot SVG: pen width mini 0.010, Color, Print Frame Ref
  2. load with Inkscape
  3. save as PDF
  
  This creates really good quality pdf files.
 







Re: [kicad-users] DXF Import

2009-12-18 Thread Robert
 Thank you for the detailed description of a challenging process.  I
 wouldn't have the patience any more.

Thanks; the alternatives for me would have required even more effort, so 
I was rather driven :).   Once one knows what has to be done, it's not 
too bad (especially if you have control over the production of the 
mechanical drawings).

 The 393 is the inverse of 254 (mm/in mod 10) so it appears that
 something somewhere thought there were imperial units in use.  I
 would guess that 1.0 (or decimal multiples thereof) 254 (and decimal
 multiples thereof) and 393 (and, yes, decimal multiples thereof) will
 be the only converson factors needed.

 doh!   How did I miss that?!   I was forgetting that Kicad uses 
imperial base units.

Regards,

Robert.

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[kicad-users] DXF Import

2009-12-17 Thread Robert
There have been a few questions on this recently.   Since I've just had 
to do this myself and it wasn't exactly a smooth process, I thought it 
might be useful to document what I did.   The following applies to 32 
bit Windows, but I used open source software as far as possible so it 
does have some relevance to Linux.   For 64 bit Windows you need 64 bit 
Python packages, but otherwise it should be relevant.

The AutoCAD DWG files with which I was supplied were of a version that I 
couldn't do anything with, so I read them in using LX-Viewer 
(http://lx-viewer.sourceforge.net/) and exported them in AutoCAD version 
12 format.   This version was readable by all subsequent packages. 
Unfortunately the original drawings contained elements that gave the 
import into Kicad process a few problems (and in any case there was more 
detail in them than I required), so I had to edit them using my ancient 
copy of AutoCAD LT.   If you need to do the same and don't have AutoCAD, 
you can use LX-Viewer to convert a DWG file to DXF if necessary, and you 
can probably import DXF into another editor (anyone care to recommend an 
open source AutoCAD replacement?).   LX-Viewer will also export SVG 
files (along with some bitmap formats), but I only used DWG and DXF.

For the import to work, the following element types only may be used: 
LINE, POLYLINE, LWPOLYLINE, ARC, CIRCLE, TEXT, MTEXT.   Having edited 
the drawing as required (including replacing unsupported elements), I 
created my DXF file directly from AutoCAD.   Import into Kicad is 
achieved using TTConv; there's a link to it from the Kicad homepage on 
Sourceforge (http://kicad.sourceforge.net/wiki/index.php/Main_Page). 
The TTConv page is in Italian, and the packages I downloaded using the 
instructions didn't want to play together.   When you download TTConv 
you will get a zip file full of Python files.   To run these you need to 
download and install the following Python packages in the following order:

python-2.5.1.msi
(http://www.python.org/ftp/python/2.5.1/python-2.5.1.msi)

PIL-1.1.6.win32-py2.5.exe
http://code.google.com/p/pygraphics/downloads/detail?name=PIL-1.1.6.win32-py2.5.execan=2q=

wxPython2.8-win32-ansi-2.8.10.1-py25.exe
(http://downloads.sourceforge.net/wxpython/wxPython2.8-win32-ansi-2.8.10.1-py25.exe)

Once you've installed this lot, you should be able to double-click on 
TTConv0.2.py and TTConv will run.   Select Kicad...Dxf2Kicad from the 
menu and a window will appear with a few simple controls.   Exporting as 
a Kicad library worked best for me (no risk of destroying one's PCB 
design).   The controls are very straightforward except for the Scale 
unit DXFKicad box.   I had to change this from the default of 100 to 
393.   The drawing units in the original files were metric, and I use 
Kicad in metric, so where 393 comes from I've no idea.   If 393 doesn't 
work for you, choose the default, import into Kicad, and work out out 
far wrong it was as a scaling fraction.   Then go back and modify the 
Scale unit by that fraction.   So you must have at least one element of 
known dimensions to use as a convenient reference (in my case it was the 
board edge).

Having finally created a module in a library, I then added the new 
library to my Kicad project.   I found that the module (which is called 
TEST) was nowhere near the anchor, so I just moved it back into position 
and saved the footprint with a more meaningful name.   That done I was 
able to insert it into my PCB as a module.

There were a few lines missing from the imported graphics, but mostly it 
worked and what I ended up with was more than good enough.

I hope this is helpful.

Regards,

Robert.



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Re: [kicad-users] Re: Solder paste

2009-12-10 Thread Robert
If it's any help, I just shrink all the pads by 0.04mm (because that's
what I was once asked to do in order to prevent the problem you are
having).   I think the idea is that the shrinkage only becomes
significant where it is needed, so there's no need to selectively apply
it.   I run the Perl script from Cygwin, so it's minimal hassle.  It's 
even less hassle if you're running kicad on Linux :).

Regards,

Robert.

weilu0 wrote:
 Thanks for the advice,
 
 I know that I can always edit the Gerber file or write a program for
 it. I was just wandering if I don't have to go with all the hassles
 in the design iteration.
 
 Regards,
 
 Wei
 
 
 --- In kicad-users@yahoogroups.com, Robert birmingham_spi...@...
 wrote:
 There is a Perl script available that will shrink the paste on all
 pads (google shrink_paste.pl kicad).   I guess you could edit it
 if you don't want to shrink all components.
 
 Regards,
 
 Robert.
 
 weilu0 wrote:
 
 
 I have the problem of too wide opening for the stensil made from
 solder paste layer. Which results in too much solder paste
 applied for QFN and lots of solder bridges in manufacturing.
 However reducing the solder paste of specific modules seems to be
 a challenge in current released version: 20090216.
 
 Just wandering when will anything enabling the editing of solder
 paste opening be available... Or what is the result of those old
 discussions as below?
 
 Regards,
 
 Wei
 
 
 
 
 --- In kicad-users@yahoogroups.com, spernecker pernecker@
 wrote:
 --- In kicad-users@yahoogroups.com, Dick H. dick@ wrote:
 --- In kicad-users@yahoogroups.com, Bús József busj@ wrote:
 
 Hi
 
 
 I made the patch for the SMD pad, to do the reduction of
 Solder
 Paste Mask size.
 Uploaded the patch file and pictures the
 http://tech.groups.yahoo.com/group/kicad-users/files/busj/
 folder!
 Regards, BusJ
 The person who raised the issue wanted module/footprint
 specific control.  In my mind this means having to add
 support in the module editor for setting this into a module.
 The module editor could have a default setting which would
 defer to the global setting, similar to how default vias
 defer to the global hole size.
 
 I am open to your thoughts on how easy it would be bridge
 this gap in concept.  However as is, I will not be adding the
 patch.  More discussion and improvements are needed.
 
 
 Dick
 
 Hello guys, I'm a new Kicad user and I have a problem when I
 design new module with very small smp pad. It's glue the net
 togheter. I want maybe try your path but I don't understand
 what I need to do to apply this. Thank for your help.
 
 
 
 
 
 
 Please read the Kicad FAQ in the group files section before
 posting your question. Please post your bug reports here. They
 will be picked up by the creator of Kicad. Please visit
 http://www.kicadlib.org for details of how to contribute your
 symbols/modules to the kicad library. For building Kicad from
 source and other development questions visit the kicad-devel
 group at http://groups.yahoo.com/group/kicad-develYahoo! Groups
 Links
 
 
 
 
 
 
 
 
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 Release Date: 12/09/09 07:32:00
 
 
 
 
 
 
 
 Please read the Kicad FAQ in the group files section before posting
 your question. Please post your bug reports here. They will be picked
 up by the creator of Kicad. Please visit http://www.kicadlib.org for
 details of how to contribute your symbols/modules to the kicad
 library. For building Kicad from source and other development
 questions visit the kicad-devel group at
 http://groups.yahoo.com/group/kicad-develYahoo! Groups Links
 
 
 
 
 
 
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Re: [kicad-users] DXF import

2009-12-09 Thread Robert
Have you tried TTConv (listed on the Kicad home page at Sourceforge, 
http://kicad.sourceforge.net/wiki/index.php/Main_Page)?

Regards,

Robert.

Stephrac74 wrote:
 I’ve posted a similar message few days ago but I didn’t get any answer….
 
 That’s really a missing feature and I absolutely need also the ability to
 import a mechanical drawing in order to draw the PCB shape and fixing
 points.
 
  
 
 Hoping someone will bring an answer.
 
  
 
 Best
 
 Stephane
 
  
 
 De : kicad-users@yahoogroups.com [mailto:kicad-us...@yahoogroups.com] De la
 part de Veronica Merryfield
 Envoyé : mardi 8 décembre 2009 20:12
 À : kicad-users@yahoogroups.com
 Objet : [kicad-users] DXF import
 
  
 
   
 
 Hi all
 
 I am in need of a dxf importer. Can anyone give me any pointers?
 
 Thanks
 
 Veronica
 
 
 
  
 
 
 ---
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 Aucun virus connu à ce jour par nos services n'a été détecté.
 
  
 
 
 
 
 
 
 
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19:54:00


Re: [kicad-users] Re: Solder paste

2009-12-09 Thread Robert
There is a Perl script available that will shrink the paste on all pads 
(google shrink_paste.pl kicad).   I guess you could edit it if you 
don't want to shrink all components.

Regards,

Robert.

weilu0 wrote:
 
 
 
 I have the problem of too wide opening for the stensil made from solder paste 
 layer. Which results in too much solder paste applied for QFN and lots of 
 solder bridges in manufacturing. However reducing the solder paste of 
 specific modules seems to be a challenge in current released version: 
 20090216. 
 
 Just wandering when will anything enabling the editing of solder paste 
 opening be available... Or what is the result of those old discussions as 
 below?
 
 Regards,
 
 Wei
 
 
 
 
 --- In kicad-users@yahoogroups.com, spernecker pernec...@... wrote:
 --- In kicad-users@yahoogroups.com, Dick H. dick@ wrote:
 --- In kicad-users@yahoogroups.com, Bús József busj@ wrote:
 Hi


 I made the patch for the SMD pad, to do the reduction of Solder
 Paste Mask size.
 Uploaded the patch file and pictures the
 http://tech.groups.yahoo.com/group/kicad-users/files/busj/ folder!
 Regards,
 BusJ
 The person who raised the issue wanted module/footprint specific
 control.  In my mind this means having to add support in the module
 editor for setting this into a module.  The module editor could have a
 default setting which would defer to the global setting, similar to
 how default vias defer to the global hole size.

 I am open to your thoughts on how easy it would be bridge this gap in
 concept.  However as is, I will not be adding the patch.  More
 discussion and improvements are needed.


 Dick

 Hello guys, I'm a new Kicad user and I have a problem when I design new 
 module with very small smp pad. It's glue the net togheter. I want maybe try 
 your path but I don't understand what I need to do to apply this. Thank for 
 your help.

 
 
 
 
 
 
 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
 Links
 
 
 
 
 
 
 
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Re: [kicad-users] Scanning PCB's into Kicad possible ?

2009-12-02 Thread Robert
Have you tried raoulduke's script 
(http://www.mail-archive.com/kicad-users@yahoogroups.com/msg05013.html)? 
   If you work your way through the thread he tells you how to get an 
image file (in the form of a PBM) into any layer.   It'll take a lot of 
messing about and you may not get you usable Gerbers, but I guess it's 
worth a try.

Regards,

Robert.


Dan Roganti wrote:
 hello,
 
 Is it possible to scan an existing PCB from an old design and have Kicad 
 read this file (jpeg?) in order to create a gerber file output to make 
 new ones ?
 I have some old designs from 30+yrs ago which I like to bring back to life.
 
 thanks
 =Dan
 
 
 
 
 
 
 
 
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Re: [kicad-users] Hello - with question!

2009-12-01 Thread Robert
You might find the following thread useful:

http://www.mail-archive.com/kicad-users@yahoogroups.com/msg05013.html

The awk script that raoulduke wrote (NB - he posted a correction to his 
original script) can be executed on Windows using cygwin 
(http://www.cygwin.com/).   I found his script worked nicely.

Regards,

Robert.

Michael wrote:
 Hello,
 
 i´m new to this group and Kicad.
 I have tried kicad for two weeks by now and would like to say that it is 
 amazing how much software one can get for free.
 I´m used to work with Protel/Altium at work, but i must say
 that some things in kicad are even better than in Altium Designer.
 (Of course, they are not at the same League)
 Many thanks to the developers!
 
 But i have a problem with importing an dxf to pcbnew.
 I have found the program ttconv, but i don`t know how to use it.
 I already have Acticephyton installed on WinXP, but nothing happens
 with a doubleclick on ttconv.py or on dxf2kicad.py.
 
 Can someone tell me how to use this program?
 
 cheers, Michael
 
 
 
 
 
 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
 Links
 
 
 
 
 
 
 
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Re: [kicad-users] Freerouter assistance

2009-11-30 Thread Robert
Keep an eye on it and watch to see if it's seemingly not making 
progress.   In particular watch the figures down at the bottom of the 
window to see if it's entirely failing to route nets.

If it does get stuck its worth looking to see what it has got stuck on, 
as I recently saw it get stuck for a very long time on two tracks that I 
was able to route manually (with FreeRouter) in a couple of minutes.

Regards,

Robert.

Chris wrote:
 I created and routed a board recently using Freeroute and it did a great
 job, however, I got three of the footprints misaligned, (TO-92 package)  and
 now I am trying to Autoroute it again, and Freeroute is having a very hard
 time, I left it running overnight and it still had a lot of traces to route.
  How many passes should I let it run before trying to re-arrange the
 components to try to make it easier for Freeroute?
 
 Thanks
 
 Chris
 
 
 
 
 
 
 
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Re: [kicad-users] Kicad wishlist

2009-11-19 Thread Robert
 1. Using zones for connectivity

KiCAD allows you to assign any net to a zone using the zone property 
dialog (that appears when you create or edit a zone).

 2. Auto-route

Personally I've never achieved anything useful with the automatic tools 
in Kicad.   For auto-routing I would recommend exporting a Spectra DSN 
file and reading it into FreeRouter (http://www.freerouting.net/).   Hit 
Autoroute, go down the beach and enjoy yourself, and when you come back 
it'll be nicely done.

 3. Pads with special shape (Annular ring, interdigital, custom image, etc)

You can create a complex pad shapes by combining the various 
primitives into the shape required and then giving each component of 
the pad the same pad number.   The only (tiny) snag with this is you 
have to remember to hook together the component pads with tracks in the 
main editor.

 4. Auto-Moving wires (Right  now, I'm erasing an existente wire and then I
 redraw it)

Not sure what you mean, as you can move tracks around very easily.   Do 
you mean push-and-shove?   If so, FreeRouter does this splendidly IMHO.

 5. Auto moving wires associated to one via.

Could you explain what you mean, please?

 6. Blind vias.

Vias can be between any two layers.

May I suggest you read through the documentation supplied with KiCAD?

Regards,

Robert.

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Re: [kicad-users] Kicad wishlist

2009-11-19 Thread Robert
 KiCAD allows you to assign any net to a zone using the zone property
 dialog (that appears when you create or edit a zone).


 Yes, you're right, but when I assign a net to a zone (GND for example ) the
 tool show the pads connected to this zone, but don't remove the
 unconnected line.

I know there has been some discussion on this.   When I started using 
KiCAD I hit this same issue and just knuckled down to adding a narrow 
dummy track to interconnect the relevant pads so that they would no 
longer appear disconnected.   This turned out to be not such a bad thing 
on a one or two layer board as it reduces the chances of creating an 
island.   On multilayer boards it is nothing but a chore.   Since all my 
boards are two layer I haven't followed the discussion closely, so I'm 
not sure what is the current status.   I guess you could always let 
FreeRouter do the dummy power tracks for you on a multi-layer board :).

 Not sure what you mean, as you can move tracks around very easily. Do
 you mean push-and-shove? If so, FreeRouter does this splendidly IMHO.


 yes, I mean push-and-shove, you mean that with pcbnew I can't make a
 push-and-shove? Is necessary use FreeRouter?

That's correct.   Transfer of data between the two is largely painless 
though, and I really can't recommend FreeRouter highly enough.   It 
works very well, and using it is mostly child's play.   Hmmm. 
Actually, using an Etchasketch was far more difficult...

Regards,

Robert.
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Re: [kicad-users] SCH footprint edit bug

2009-11-16 Thread Robert
 It seems to me that if you exit the dialog the value is cleared.

I've already added this to the bug tracker.   The workaround is not to 
cancel the box :).

 I have a list of bugs that should be verified and corrected if
 possible, but it's quite a long list, should I contact anyone in
 particular ?

Please use the bug tracker: 
http://sourceforge.net/tracker/?group_id=145591atid=762476.   You will 
be able to see if a bug has already been reported, and if not add it 
yourself.

Reagrds,

Robert.

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Re: [kicad-users] new user, can't find basic components

2009-11-11 Thread Robert
Kicad comes with a library called device that contains basic 
components such resistors (R) and capacitors (C).

Regards,

Robert.

killdellguy wrote:
 Hi, I'm a new user and I'm trying to draw a schematic. I can find the
 more complicated components for my circuit like micro controllers and
 voltage regulators but i can't find basic things in the libraries
 like resistors and capacitors. Are there other libraries I need to
 install other than the ones that come with Kicad?
 
 
 
 
 
 Please read the Kicad FAQ in the group files section before posting
 your question. Please post your bug reports here. They will be picked
 up by the creator of Kicad. Please visit http://www.kicadlib.org for
 details of how to contribute your symbols/modules to the kicad
 library. For building Kicad from source and other development
 questions visit the kicad-devel group at
 http://groups.yahoo.com/group/kicad-develYahoo! Groups Links
 
 
 
 
 
 
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[kicad-users] Re: freerouting.net autorouter + circular boards problem

2009-10-31 Thread robert


--- In kicad-users@yahoogroups.com, dickelbeck d...@... wrote:

 
 
 --- In kicad-users@yahoogroups.com, robert madworm_de.yahoo@ wrote:
 
  
  
  --- In kicad-users@yahoogroups.com, josh_eeg josheeg@ wrote:
  
   Will the board house cut a circle? if your doing it yourself just make 
   the squair big enough and do the circle on the silk.
  
  I was planning to get the boards cut as a circle.
  
  It is possible to work around this with a polygon as the outline just so 
  the autorouter works and then replace it with a perfect circle. I'm just 
  not sure if the problem is kicad or the autorouter.
 
 
 Step 1:
 
 How are you defining a circle using the edges pcb layer?  I assume you had 
 to enter 4 quarter circle arcs?  Or other?  If arcs, make sure they are 
 connected, exactly down to the exact matching end coordinates.
 
 I can provide subsequent steps as needed.
 
 Dick


Initially I was brave enough to just use a normal circle on the edges_pcg 
layer, but that didn't work out. I sent the .dsn file to the head of 
freerouting.net and got told that it only supports closed polygons and arcs as 
outlines, but not full circles.

So I ended up with using 4 arcs.





[kicad-users] Re: freerouting.net autorouter + circular boards problem

2009-10-28 Thread robert


--- In kicad-users@yahoogroups.com, josh_eeg josh...@... wrote:

 Will the board house cut a circle? if your doing it yourself just make the 
 squair big enough and do the circle on the silk.

I was planning to get the boards cut as a circle.

It is possible to work around this with a polygon as the outline just so the 
autorouter works and then replace it with a perfect circle. I'm just not sure 
if the problem is kicad or the autorouter.




[kicad-users] freerouting.net autorouter + circular boards problem

2009-10-25 Thread robert
I'm having problems with a circular board and the freerouting autorouter. The 
pcb outline was created with the circle tool. I just can't open the .dsn files. 
Replacing the circle with a polygon works, but I just can't get the outline 
right that way.



Re: [kicad-users] Adding a Logo or Art to Silkscreen

2009-10-09 Thread Robert
Raoul, you're a star!   I've wanted to do this for a long time; like you 
I found that pstoedit didn't do the trick, but I couldn't justify the 
time to investigate further.

I used awk running under Cygwin (on WinXP) to convert a logo, and it 
worked perfectly.   The only snag on Windows is one needs to use an 
editor that supports Unix line endings (or perhaps set Cygwin to use 
Windows/DOS line endings on installation?), but there are plenty of open 
source editors around that will do this, as will MS Visual Studio.

Thanks again,

Robert.



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Re: [kicad-users] Move/edit with relative coordinates in pcbnew or move the page origin?

2009-09-29 Thread Robert
Yes - move the cursor to where you want the origin and press the space 
bar.   In the bottom right-hand corner you'll see both absolute and 
relative co-ordinates.

Regards,

Robert.


korpx wrote:
 It feels a bit primitive to always relate positions to the page
 origin at top left corner in pcbnew. It requires quite a lot of
 calculations when measuring physical objects and moving/editing
 components or graphic elements on the pcb accordingly.
 
 Is there a way to move the page origin temporarily?
 
 Is there any way I can move components or edit graphic elements (like
 lines, pcb outlines etc) by using relative coordinates or in relation
 to the origin set by Offset adjust for drill and place files.?
 
 
 
 
 
 
 Please read the Kicad FAQ in the group files section before posting
 your question. Please post your bug reports here. They will be picked
 up by the creator of Kicad. Please visit http://www.kicadlib.org for
 details of how to contribute your symbols/modules to the kicad
 library. For building Kicad from source and other development
 questions visit the kicad-devel group at
 http://groups.yahoo.com/group/kicad-develYahoo! Groups Links
 
 
 
 
 
 
 
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[kicad-users] Re: Move/edit with relative coordinates in pcbnew or move the page origin?]

2009-09-29 Thread Robert
 As far as I know I will have to take the position of the PCB's lower
 left corner in relation to the page origin and subtract y=16mm and
 add 32mm to get the new position..

So just move the cursor over the PCB's lower left corner and press
space.   Then right click on the centre of the resistor and select Move
from the context menu.   Then move the resistor until the relative
co-ordinates are 32,16 (one or both might be negative, depending on
which direction you're moving).   No subtraction is necessary.

Regards,

Robert.

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[kicad-users] Module Position File

2009-09-23 Thread Robert
I just created a module position file (Post Process...Generate Modules 
Position) and took a look at it, and realised it was incomplete.   There 
doesn't seem to be any pattern to what is missing.

I went back and checked a module position file I had created for someone 
else, and although it was less obvious there were indeed missing 
components (strangely the recipient didn't complain).

Can anyone help, please?

Regards,

Robert.
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Re: [kicad-users] Kicad-pcbnew and ErrType(14)

2009-09-07 Thread Robert
You don't tell us which pins you are trying to connect, but usually when 
I get this error it's the result of some piece of debris, such as an 
unconnected zero-length track that's been left behind after some track 
editing.   In the problem area try deleting tracks and moving footprints 
out of the way and refreshing the screen until you can see what's hiding 
in the background.   Note that I'm assuming that your components are 
connected together correctly in EESchema and that the netlist was 
created after you made the last change to your schematic.

Regards,

Robert.

rick.hunter49 wrote:
 Hello all,
 
 I have a problem with Kicad.
 I need to connect 3 pins together but when I try to connect to the third, I 
 get the following error message : ErrType(14)- Two track ends.
 
 Please see screenshot 1.png and 2.png for more details in 
 http://groups.yahoo.com/group/kicad-users/photos/album/1537359267/pic/list?mode=tnorder=ordinalstart=1dir=asc.
 
 So I did Netlist Dialog - Rebuild board connectivity. Without success.
 
 As you can see on the 3.jpg, I use the Kicad SVN of 28 of August 2009.
 I update my local SVN tree almost every week-ends but nothing changes.
 
 Do you have an idea ?
 
 Thanks for your support,
 Kicad is the better GPL Electronic pcb editor for GNU/Linux of the world !
 
 
 
 
 
 
 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
 Links
 
 
 
 
 
 
 
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[kicad-users] DRC Problem [1 Attachment]

2009-09-04 Thread Robert
I have the minimum track spacing set to 0.3mm.   After a DRC check on my
board design PCBNew does not mark surface mount pads that are more than
0.3mm apart (as expected), but it does mark a through-hole pad that is
0.6mm away from a surface mount pad, complaining that the pads are too
close.   Why is this?

I'm not sure if attachments work, but if they do I've provided one and
made it as small as possible.   Note that the DRC lines on the two
adjacent surface mount pads (which pass the DRC) intersect but do not
intersect the pads themselves, but the through-hole pad fails the DRC
even though its DRC line only just touches the DRC line of the surface
mount pad above it.

Regards,

Robert.




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Re: [kicad-users] DRC Problem

2009-09-04 Thread Robert
Thanks for your reply, but the track to the left isn't the problem. 
PCBNew specifically mentions the proximity between the two pads as being 
the problem, not the pad-to-track separation.   Moreover, if I delete 
the adjacent track (which is not connected to either pad), the 
through-hole pad still fails the DRC.   This track shouldn't cause a DRC 
failure anyway, as the separation is greater than the 0.3mm minimum I 
have specified.   The failure is also not caused by the green track 
connected to the through-hole pad, BTW.

I should have added that I tried slowly reducing the Y dimension of the 
through-hole pad, and found that it passed the DRC when the separation 
exceeded twice the minimum track spacing.   That suggests there is a 
logic to this, but I don't know what that might be :).

Regards,

Robert.

Andy Eskelson wrote:
 Your attachment ended up inthe attachments folder and a link was
 generated to the message.
 
 Have a very close look at the track to the left of the pad with the
 error arrow. It is very close to the pad clearance line,and it may be a
 little too close. 
 
 As a test make that pad smaller and or reduce it's clearance zone and
 see if that clears the problem.
 
 Andy
  
 
 
 On Fri, 04 Sep 2009 12:09:11 +0100
 Robert birmingham_spi...@gmx.net wrote:
 
 I have the minimum track spacing set to 0.3mm.   After a DRC check on my
 board design PCBNew does not mark surface mount pads that are more than
 0.3mm apart (as expected), but it does mark a through-hole pad that is
 0.6mm away from a surface mount pad, complaining that the pads are too
 close.   Why is this?

 I'm not sure if attachments work, but if they do I've provided one and
 made it as small as possible.   Note that the DRC lines on the two
 adjacent surface mount pads (which pass the DRC) intersect but do not
 intersect the pads themselves, but the through-hole pad fails the DRC
 even though its DRC line only just touches the DRC line of the surface
 mount pad above it.

 Regards,

 Robert.





 

 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
 Links



 
 
 
 
 Please read the Kicad FAQ in the group files section before posting your 
 question.
 Please post your bug reports here. They will be picked up by the creator of 
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
 Links
 
 
 
 
 
 
 
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Re: [kicad-users] DRC Problem

2009-09-04 Thread Robert
Actually you sort of interpreted it correctly, though your dimensions 
are not correct (the one marked 0.59 is a smidgen over 0.3mm).   The 
distance from the oval pad (and the track connected to it) to everything 
else is 0.3mm, so why does it fail the DRC?   It's the distance between 
the oval through-hole pad and the red surface mount pad directly above 
it that PCBNew is complaining about.   That distance is 0.6mm, which is 
significantly greater than 0.3mm.

Regards,

Robert.


Jim Hughen wrote:
 Sorry...
 
 I'm NOT sure how to interpret the image.
 
 ...Jim H.
 
   - Original Message - 
   From: Jim Hughen 
   To: kicad-users@yahoogroups.com 
   Sent: Friday, September 04, 2009 8:56 AM
   Subject: Re: [kicad-users] DRC Problem
 
 
 
   I'm sure how to interpret the image.
 
   Here are some measurements (for comparison only) that may help.
 
   http://www.judiandjim.com/linkfiles/KiCad_Robert_1.jpg
 
   ...Jim H.
 
 
 - Original Message - 
 From: Robert 
 To: kicad-users@yahoogroups.com 
 Sent: Friday, September 04, 2009 6:09 AM
 Subject: [kicad-users] DRC Problem [1 Attachment]
 
 
   
 I have the minimum track spacing set to 0.3mm. After a DRC check on my
 board design PCBNew does not mark surface mount pads that are more than
 0.3mm apart (as expected), but it does mark a through-hole pad that is
 0.6mm away from a surface mount pad, complaining that the pads are too
 close. Why is this?
 
 I'm not sure if attachments work, but if they do I've provided one and
 made it as small as possible. Note that the DRC lines on the two
 adjacent surface mount pads (which pass the DRC) intersect but do not
 intersect the pads themselves, but the through-hole pad fails the DRC
 even though its DRC line only just touches the DRC line of the surface
 mount pad above it.
 
 Regards,
 
 Robert.
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 No virus found in this outgoing message.
 Checked by AVG - www.avg.com 
 Version: 8.5.409 / Virus Database: 270.13.76/2344 - Release Date: 
 09/03/09 18:05:00
 
 
   
 
 
 
 
 
 No virus found in this incoming message.
 Checked by AVG - www.avg.com 
 Version: 8.5.409 / Virus Database: 270.13.76/2345 - Release Date: 09/04/09 
 05:51:00
 
No virus found in this outgoing message.
Checked by AVG - www.avg.com 
Version: 8.5.409 / Virus Database: 270.13.76/2345 - Release Date: 09/04/09 
05:51:00


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