[PATCH 15/29] nVMX: Prepare vmcs02 from vmcs01 and vmcs12

This patch contains code to prepare the VMCS which can be used to actually run the L2 guest, vmcs02. prepare_vmcs02 appropriately merges the information in vmcs12 (the vmcs that L1 built for L2) and in vmcs01 (the vmcs that we built for L1). VMREAD/WRITE can only access one VMCS at a time (the "cu

[PATCH 14/29] nVMX: Implement VMREAD and VMWRITE

Implement the VMREAD and VMWRITE instructions. With these instructions, L1 can read and write to the VMCS it is holding. The values are read or written to the fields of the vmcs_fields structure introduced in a previous patch. Signed-off-by: Nadav Har'El --- arch/x86/kvm/vmx.c | 171 +++

[PATCH 13/29] nVMX: Implement VMPTRST

This patch implements the VMPTRST instruction. Signed-off-by: Nadav Har'El --- arch/x86/kvm/vmx.c | 27 ++- arch/x86/kvm/x86.c |3 ++- arch/x86/kvm/x86.h |3 +++ 3 files changed, 31 insertions(+), 2 deletions(-) --- .before/arch/x86/kvm/x86.c 2011-01-26 18:06

[PATCH 12/29] nVMX: Implement VMPTRLD

This patch implements the VMPTRLD instruction. Signed-off-by: Nadav Har'El --- arch/x86/kvm/vmx.c | 64 ++- 1 file changed, 63 insertions(+), 1 deletion(-) --- .before/arch/x86/kvm/vmx.c 2011-01-26 18:06:04.0 +0200 +++ .after/arch/x86/kvm/vmx.c

[PATCH 11/29] nVMX: Implement VMCLEAR

This patch implements the VMCLEAR instruction. Signed-off-by: Nadav Har'El --- arch/x86/kvm/vmx.c | 63 ++- 1 file changed, 62 insertions(+), 1 deletion(-) --- .before/arch/x86/kvm/vmx.c 2011-01-26 18:06:04.0 +0200 +++ .after/arch/x86/kvm/vmx.c

[PATCH 10/29] nVMX: Success/failure of VMX instructions.

VMX instructions specify success or failure by setting certain RFLAGS bits. This patch contains common functions to do this, and they will be used in the following patches which emulate the various VMX instructions. Signed-off-by: Nadav Har'El --- arch/x86/include/asm/vmx.h | 31 ++

[PATCH 09/29] nVMX: Add VMCS fields to the vmcs12

In this patch we add to vmcs12 (the VMCS that L1 keeps for L2) all the standard VMCS fields. These fields are encapsulated in a struct vmcs_fields. Later patches will enable L1 to read and write these fields using VMREAD/ VMWRITE, and they will be used during a VMLAUNCH/VMRESUME in preparing vmcs0

[PATCH 08/29] nVMX: Fix local_vcpus_link handling

In VMX, before we bring down a CPU we must VMCLEAR all VMCSs loaded on it because (at least in theory) the processor might not have written all of its content back to memory. Since a patch from June 26, 2008, this is done using a per-cpu "vcpus_on_cpu" linked list of vcpus loaded on each CPU. The

[PATCH 07/29] nVMX: Hold a vmcs02 for each vmcs12

In this patch we add a list of L0 (hardware) VMCSs, which we'll use to hold a hardware VMCS for each active vmcs12 (i.e., for each L2 guest). We call each of these L0 VMCSs a "vmcs02", as it is the VMCS that L0 uses to run its nested guest L2. Signed-off-by: Nadav Har'El --- arch/x86/kvm/vmx.c

[PATCH 06/29] nVMX: Decoding memory operands of VMX instructions

This patch includes a utility function for decoding pointer operands of VMX instructions issued by L1 (a guest hypervisor) Signed-off-by: Nadav Har'El --- arch/x86/kvm/vmx.c | 59 +++ arch/x86/kvm/x86.c |3 +- arch/x86/kvm/x86.h |3 ++ 3 files ch

[PATCH 05/29] nVMX: Implement reading and writing of VMX MSRs

When the guest can use VMX instructions (when the "nested" module option is on), it should also be able to read and write VMX MSRs, e.g., to query about VMX capabilities. This patch adds this support. Signed-off-by: Nadav Har'El --- arch/x86/include/asm/msr-index.h |9 ++ arch/x86/kvm/vmx.c

[PATCH 04/29] nVMX: Introduce vmcs12: a VMCS structure for L1

An implementation of VMX needs to define a VMCS structure. This structure is kept in guest memory, but is opaque to the guest (who can only read or write it with VMX instructions). This patch starts to define the VMCS structure which our nested VMX implementation will present to L1. We call it "vm

[PATCH 03/29] nVMX: Allow setting the VMXE bit in CR4

This patch allows the guest to enable the VMXE bit in CR4, which is a prerequisite to running VMXON. Whether to allow setting the VMXE bit now depends on the architecture (svm or vmx), so its checking has moved to kvm_x86_ops->set_cr4(). This function now returns an int: If kvm_x86_ops->set_cr4()

[PATCH 02/29] nVMX: Implement VMXON and VMXOFF

This patch allows a guest to use the VMXON and VMXOFF instructions, and emulates them accordingly. Basically this amounts to checking some prerequisites, and then remembering whether the guest has enabled or disabled VMX operation. Signed-off-by: Nadav Har'El --- arch/x86/kvm/vmx.c | 111 ++

[PATCH 01/29] nVMX: Add "nested" module option to vmx.c

This patch adds a module option "nested" to vmx.c, which controls whether the guest can use VMX instructions, i.e., whether we allow nested virtualization. A similar, but separate, option already exists for the SVM module. This option currently defaults to 0, meaning that nested VMX must be explic

[PATCH 0/29] nVMX: Nested VMX, v8

Hi, This is the eighth iteration of the nested VMX patch set. This iteration solves a number of bugs and issues that bothered the reviewers. Some more issues raised in the previous review remain open, but don't worry - I *am* working to resolve all of them. The biggest improvement in this version

[PATCH V6 4/4] nmi: report error(QError) when the cpu-index is invalid

When cpu-index is found invalid in runtime, it will report QERR_INVALID_PARAMETER_VALUE. Signed-off-by: Lai Jiangshan --- diff --git a/monitor.c b/monitor.c index 1b1c0ba..82935f0 100644 --- a/monitor.c +++ b/monitor.c @@ -2563,6 +2563,7 @@ static int do_inject_nmi(Monitor *mon, const QDict *qd

[PATCH V6 3/4] qmp,nmi: convert do_inject_nmi() to QObject

Make we can inject NMI via qemu-monitor-protocol. We use "inject-nmi" for the qmp command name, the meaning is clearer. Signed-off-by: Lai Jiangshan --- diff --git a/hmp-commands.hx b/hmp-commands.hx index ec1a4db..e763bf9 100644 --- a/hmp-commands.hx +++ b/hmp-commands.hx @@ -725,7 +725,8 @@ ET

[PATCH V6 2/4] nmi: make cpu-index argument optional

When the argument "cpu-index" is not given, then "nmi" command will inject NMI on all CPUs. This simulate the nmi button on physical machine. Note: it will allow non-argument "nmi" command and change the human monitor behavior. Thanks to Markus Armbruster for correcting the logic detecting

[PATCH V6 1/4] nmi: convert cpu_index to cpu-index

"cpu-index" which uses hyphen is better name. Signed-off-by: Lai Jiangshan --- diff --git a/hmp-commands.hx b/hmp-commands.hx index 5d4cb9e..e43ac7c 100644 --- a/hmp-commands.hx +++ b/hmp-commands.hx @@ -721,7 +721,7 @@ ETEXI #if defined(TARGET_I386) { .name = "nmi", -

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