On Wed, Mar 14, 2012 at 11:16 PM, Stefan Weil s...@weilnetz.de wrote:
Am 14.03.2012 22:46, schrieb Anthony Liguori:
On 03/14/2012 01:58 AM, Corentin Chary wrote:
Hi Anthony,
Please merge these two patchs from another age, they fix crash in the VNC
server (the iohandler one is only for the
At 03/15/2012 02:46 AM, Eric Northup Wrote:
On Wed, Mar 14, 2012 at 6:25 AM, Gleb Natapov g...@redhat.com wrote:
On Wed, Mar 14, 2012 at 03:16:05PM +0200, Avi Kivity wrote:
On 03/14/2012 03:14 PM, Gleb Natapov wrote:
On Wed, Mar 14, 2012 at 03:07:46PM +0200, Avi Kivity wrote:
On 03/14/2012
https://bugzilla.kernel.org/show_bug.cgi?id=42829
Chun-Hung Chen arn...@gmail.com changed:
What|Removed |Added
CC||arn...@gmail.com
This patch series is basen on my srcu-less dirty logging patch series
and being sent for letting everybody knows about possible improvements
we can add to that.
As pasted below, we can achieve 15% improvement for the worst case.
I will rebase and post this again after srcu-less gets merged.
We have PTE_LIST_EXT + 1 pointers in this structure and these 40/20
bytes do not fit cache lines well. Furthermore some allocators may
use 64/32-byte objects for the pte_list_desc cache.
This patch solves this problem by raising PTE_LIST_EXT to 7.
Note: with EPT/NPT we almost always have a
Iteration using rmap_next(), the actual body is pte_list_next(), is
inefficient: every time we call it we start from checking whether rmap
holds a single spte or points to a descriptor which links more sptes.
In the case of shadow paging, this quadratic total iteration cost is a
problem. Even
Checking wheter iter-desc is NULL is not worth a function call
especially when we use EPT/NPT because we know it would almost always
be NULL.
Although using inline like this does not look clean, we could see
measurable performance improvements: get_dirty_log for 1GB dirty memory
became faster by
On 03/15/2012 11:19 AM, Takuya Yoshikawa wrote:
We have PTE_LIST_EXT + 1 pointers in this structure and these 40/20
bytes do not fit cache lines well. Furthermore some allocators may
use 64/32-byte objects for the pte_list_desc cache.
This patch solves this problem by raising PTE_LIST_EXT to
Il 15/03/2012 01:06, Zhang, Yang Z ha scritto:
You are right. Actually, the v4 is ready and it uses the same logic
with v2. Since I have other high priority task in hand, I don't test
v4 too much. So i plan to delay it for a while and hope v3 can be
accepted before v4 is ready. If you really
On 03/15/2012 11:20 AM, Takuya Yoshikawa wrote:
Iteration using rmap_next(), the actual body is pte_list_next(), is
inefficient: every time we call it we start from checking whether rmap
holds a single spte or points to a descriptor which links more sptes.
In the case of shadow paging, this
On 03/15/2012 11:21 AM, Takuya Yoshikawa wrote:
Checking wheter iter-desc is NULL is not worth a function call
especially when we use EPT/NPT because we know it would almost always
be NULL.
Although using inline like this does not look clean, we could see
measurable performance improvements:
On 03/15/2012 03:44 AM, Davidlohr Bueso wrote:
From: Davidlohr Bueso d...@gnu.org
With EPT enabled it is not required to explicitly run invvpid to invalidate
tagged TLB entries, as
KVM does not force vm-exits for cr3 writes and invlpg. Run invvpid only when
these instructions
are emulated
Avi Kivity a...@redhat.com wrote:
Although using inline like this does not look clean, we could see
measurable performance improvements: get_dirty_log for 1GB dirty memory
became faster by more than 10% on my test box.
WOW. I'd have assumed the processor deals better with this; it
Avi Kivity a...@redhat.com wrote:
+ * Iteration must be started by this function. This should also be used
after
+ * removing/dropping sptes from rmap because in such cases the information
in
+ * the itererator may not be valid.
Note: this suggests rmap_remove(struct rmap_iterator
Hi all
When I use pci-assign, I meet the following error:
Failed to assign irq for hostdev0: Input/output error
Perhaps you are assigning a device that shares an IRQ with another device?
Is it a bug or I miss something?
I use libvirt to start the guest, and the user/group is root/root(not
On Wed, Mar 14, 2012 at 11:46:08AM -0700, Eric Northup wrote:
On Wed, Mar 14, 2012 at 6:25 AM, Gleb Natapov g...@redhat.com wrote:
On Wed, Mar 14, 2012 at 03:16:05PM +0200, Avi Kivity wrote:
On 03/14/2012 03:14 PM, Gleb Natapov wrote:
On Wed, Mar 14, 2012 at 03:07:46PM +0200, Avi
On Mon, Mar 12, 2012 at 11:03 PM, Daniele Carollo
carollo.d...@gmail.com wrote:
The command I use is something like:
sudo /home/kvm/linux-kvm/tools/kvm/lkvm run -p root=/dev/vda1 -d
/home/kvm/Internato/debian_squeeze_i386_standard.raw -n
On 2012-03-15 11:39, Gleb Natapov wrote:
On Wed, Mar 14, 2012 at 11:46:08AM -0700, Eric Northup wrote:
On Wed, Mar 14, 2012 at 6:25 AM, Gleb Natapov g...@redhat.com wrote:
On Wed, Mar 14, 2012 at 03:16:05PM +0200, Avi Kivity wrote:
On 03/14/2012 03:14 PM, Gleb Natapov wrote:
On Wed, Mar 14,
On 03/15/2012 01:25 PM, Jan Kiszka wrote:
There was such vm exit (KVM_EXIT_HYPERCALL), but it was deemed to be a
bad idea.
BTW, this would help a lot in emulating hypercalls of other hypervisors
(or of KVM's VAPIC in the absence of in-kernel irqchip - I had to jump
through hoops
On 03/15/2012 12:15 PM, Takuya Yoshikawa wrote:
Avi Kivity a...@redhat.com wrote:
Although using inline like this does not look clean, we could see
measurable performance improvements: get_dirty_log for 1GB dirty memory
became faster by more than 10% on my test box.
WOW. I'd
Commenting a little bit late, but since you've said that you are working on
a new version of the patch... better late than never.
On Thu, Aug 11, 2011 at 04:39:38PM +0200, Vasilis Liaskovitis wrote:
Hi,
I am testing a set of experimental patches for memory-hotplug on x86_64 host /
guest
We were failing to compile on book3s_32 with the following errors:
arch/powerpc/kvm/book3s_pr.c:883:45: error: cast to pointer from integer of
different size [-Werror=int-to-pointer-cast]
arch/powerpc/kvm/book3s_pr.c:898:79: error: cast to pointer from integer of
different size
From: Scott Wood scottw...@freescale.com
Currently 32-bit only cares about this for choice of exception
vector, which is done in core-specific code. However, KVM will
want to distinguish as well.
Signed-off-by: Scott Wood scottw...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
From: Scott Wood scottw...@freescale.com
This gives us a place to put load/put actions that correspond to
code that is booke-specific but not specific to a particular core.
Signed-off-by: Scott Wood scottw...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/44x.c
From: Scott Wood scottw...@freescale.com
Move vcpu to the beginning of vcpu_e500 to give it appropriate
prominence, especially if more fields end up getting added to the
end of vcpu_e500 (and vcpu ends up in the middle).
Remove gratuitous extern and add parameter names to prototypes.
From: Scott Wood scottw...@freescale.com
The PID handling is e500v1/v2-specific, and is moved to e500.c.
The MMU sregs code and kvmppc_core_vcpu_translate will be shared with
e500mc, and is moved from e500.c to e500_tlb.c.
Partially based on patches from Liu Yu yu@freescale.com.
From: Scott Wood scottw...@freescale.com
Add processor support for e500mc, using hardware virtualization support
(GS-mode).
Current issues include:
- No support for external proxy (coreint) interrupt mode in the guest.
Includes work by Ashish Kalra ashish.ka...@freescale.com,
Varun Sethi
From: Scott Wood scottw...@freescale.com
DO_KVM will need to identify the particular exception type.
There is an existing set of arbitrary numbers that Linux passes,
but it's an undocumented mess that sort of corresponds to server/classic
exception vectors but not really.
Signed-off-by: Scott
From: Scott Wood scottw...@freescale.com
Keeping two separate headers for e500-specific things was a
pain, and wasn't even organized along any logical boundary.
There was TLB stuff in asm/kvm_e500.h despite the existence of
arch/powerpc/kvm/e500_tlb.h, and nothing in asm/kvm_e500.h needed
to be
From: Scott Wood scottw...@freescale.com
Rather than invalidate everything when a TLB1 entry needs to be
taken down, keep track of which host TLB1 entries are used for
a given guest TLB1 entry, and invalidate just those entries.
Based on code from Ashish Kalra ashish.ka...@freescale.com
and Liu
From: Scott Wood scottw...@freescale.com
This is in preparation for merging in the contents of
arch/powerpc/include/asm/kvm_e500.h.
Signed-off-by: Scott Wood scottw...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/e500.c |2 +-
When during guest context we get a performance monitor interrupt, we
currently bail out and oops. Let's route it to its correct handler
instead.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/booke.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git
From: Paul Mackerras pau...@samba.org
The ABI specifies that CR fields CR2--CR4 are nonvolatile across function
calls. Currently __kvmppc_vcore_entry doesn't save and restore the CR,
leading to CR2--CR4 getting corrupted with guest values, possibly leading
to incorrect behaviour in its caller.
We were leaking preemption counters. Fix the code to always toggle
between preempt and non-preempt properly.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/book3s_pr.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kvm/book3s_pr.c
When running kvm_vcpu_block and it realizes that the CPU is actually good
to run, we get a request bit set for KVM_REQ_UNHALT. Right now, there's
nothing we can do with that bit, so let's unset it right after the call
again so we don't get confused in our later checks for pending work.
From: Matt Evans m...@ozlabs.org
SPAPR support includes various in-kernel hypercalls, improving performance
by cutting out the exit to userspace. H_BULK_REMOVE is implemented in this
patch.
Signed-off-by: Matt Evans m...@ozlabs.org
Signed-off-by: Alexander Graf ag...@suse.de
---
From: Benjamin Herrenschmidt b...@kernel.crashing.org
When the kernel calls into RTAS, it switches to 32-bit mode. The
magic page was is longer accessible in that case, causing the
patched instructions in the RTAS call wrapper to crash.
This fixes it by making available a 32-bit mapping of the
When running PR KVM on a p7 system in bare metal, we get HV exits instead
of normal supervisor traps. Semantically they are identical though and the
HSRR vs SRR difference is already taken care of in the exit code.
So all we need to do is handle them in addition to our normal exits.
When emulating updating load/store instructions (lwzu, stwu, ...) we need to
write the effective address of the load/store into a register.
Currently, we write the physical address in there, which is very wrong. So
instead let's save off where the virtual fault was on MMIO and use that
On PPC32 we can not use get_user/put_user for 64bit wide variables, as there
is no single instruction that could load or store variables that big.
So instead, we have to use copy_from/to_user which works everywhere.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/book3s_pr.c |
From: Paul Mackerras pau...@samba.org
It turns out that on POWER7, writing to the DABR can cause a corrupted
value to be written if the PMU is active and updating SDAR in continuous
sampling mode. To work around this, we make sure that the PMU is inactive
and SDAR updates are disabled (via
From: Paul Mackerras pau...@samba.org
Commits 2f5cdd5487 (KVM: PPC: Book3S HV: Make secondary threads more
robust against stray IPIs) and 1c2066b0f7 (KVM: PPC: Book3S HV: Make
virtual processor area registration more robust) added fields to
struct kvm_vcpu_arch inside #ifdef
There are 4 conditional trapping instructions: tw, twi, td, tdi. The
ones with an i take an immediate comparison, the others compare two
registers. All of them arrive in the emulator when the condition to
trap was successfully fulfilled.
Unfortunately, we were only implementing the i versions so
From: Paul Mackerras pau...@samba.org
This adds code to measure stolen time per virtual core in units of
timebase ticks, and to report the stolen time to the guest using the
dispatch trace log (DTL). The guest can register an area of memory
for the DTL for a given vcpu. The DTL is a ring buffer
From: Paul Mackerras pau...@samba.org
The PAPR API allows three sorts of per-virtual-processor areas to be
registered (VPA, SLB shadow buffer, and dispatch trace log), and
furthermore, these can be registered and unregistered for another
virtual CPU. Currently we just update the vcpu fields
From: Bharat Bhushan r65...@freescale.com
No instruction which can change Condition Register (CR) should be executed after
Guest CR is loaded. So the guest CR is restored after the Exit Timing in
lightweight_exit executes cmpw, which can clobber CR.
Signed-off-by: Bharat Bhushan
From: Paul Mackerras pau...@samba.org
Currently on POWER7, if we are running the guest on a core and we don't
need all the hardware threads, we do nothing to ensure that the unused
threads aren't executing in the kernel (other than checking that they
are offline). We just assume they're napping
On PPC, CR2-CR4 are nonvolatile, thus have to be saved across function calls.
We didn't respect that for any architecture until Paul spotted it in his
patch for Book3S-HV. This patch saves/restores CR for all KVM capable PPC hosts.
Signed-off-by: Alexander Graf ag...@suse.de
---
From: Paul Mackerras pau...@samba.org
In kvm_alloc_linear we were using and deferencing ri after the
list_for_each_entry had come to the end of the list. In that
situation, ri is not really defined and probably points to the
list head. This will happen every time if the free_linears list
is
So far, we've always called prepare_to_enter even when all we did was return
to the host. This patch changes that semantic to only call prepare_to_enter
when we actually want to get back into the guest.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/booke.c | 18
When we get a performance monitor interrupt, we need to make sure that
the host receives it. So reinject it like we reinject the other host
destined interrupts.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/include/asm/hw_irq.h |1 +
arch/powerpc/kvm/booke.c |4
When reinjecting an interrupt into the host interrupt handler after we're
back in host kernel land, we need to tell the kernel where the interrupt
happened. We can't tell it that we were in guest state, because that might
lead to random code walking host addresses. So instead, we tell it that
we
The tlbncfg registers should be populated with their respective TLB's
values. Fix the obvious typo.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/e500_tlb.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kvm/e500_tlb.c
When during guest execution we get a machine check interrupt, we don't
know how to handle it yet. So let's add the error printing code back
again that we dropped accidently earlier and tell user space that something
went really wrong.
Signed-off-by: Alexander Graf ag...@suse.de
---
There was some unused code in the exit code path that must have been
a leftover from earlier iterations. While it did no harm, it's superfluous
and thus should be removed.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/bookehv_interrupts.S |7 ---
1 files changed, 0
The comment for program interrupts triggered when using bookehv was
misleading. Update it to mention why MSR_GS indicates that we have
to inject an interrupt into the guest again, not emulate it.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/booke.c | 10 --
1 files
For BookE HV the guest visible MSR is shared-msr and is identical to
the MSR that is in use while the guest is running, because we can't trap
reads from/to MSR.
So shadow_msr is unused there. Indicate that with a comment.
Signed-off-by: Alexander Graf ag...@suse.de
---
The SET_VCPU macro is a leftover from times when the vcpu struct wasn't
stored in the thread on vcpu_load/put. It's not needed anymore. Remove it.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/bookehv_interrupts.S |8
1 files changed, 0 insertions(+), 8
We need to make sure that no MAS updates happen automatically while we
have the guest MAS registers loaded. So move the disabling code a bit
higher up so that it covers the full time we have guest values in MAS
registers.
The race this patch fixes should never occur, but it makes the code a
bit
Instead if doing
#ifndef CONFIG_64BIT
...
#else
...
#endif
we should rather do
#ifdef CONFIG_64BIT
...
#else
...
#endif
which is a lot easier to read. Change the bookehv implementation to
stick with this rule.
Signed-off-by: Alexander Graf ag...@suse.de
---
When using exit timing stats, we clobber r9 in the NEED_EMU case,
so better move that part down a few lines and fix it that way.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/bookehv_interrupts.S |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git
The semantics of BOOKE_IRQPRIO_MAX changed to denote the highest available
irqprio + 1, so let's reflect that in the code too.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/booke.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git
Instead of checking whether we should reschedule only when we exited
due to an interrupt, let's always check before entering the guest back
again. This gets the target more in line with the other archs.
Also while at it, generalize the whole thing so that eventually we could
have a single
The e500mc patches left some debug code in that we don't need. Remove it.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/booke.c |5 -
1 files changed, 0 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index
When we fail to emulate an instruction for the guest, we better go in and
tell it that we failed to emulate it, by throwing an illegal instruction
exception.
Please beware that we basically never get around to telling the guest that
we failed thanks to the debugging code right above it. If user
The CONFIG_KVM_E500 option really indicates that we're running on a V2 machine,
not on a machine of the generic E500 class. So indicate that properly and
change the config name accordingly.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/Kconfig|8
We can't run e500v2 kvm on e500mc kernels, so indicate that by
making the 2 options mutually exclusive in kconfig.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/Kconfig |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kvm/Kconfig
If we hit any exception whatsoever in the restore path and r1/r2 aren't the
host registers, we don't get a working oops. So it's always a good idea to
restore them as early as possible.
This time, it actually has practical reasons to do so too, since we need to
have the host page fault handler
There's always a chance we're unable to read a guest instruction. The guest
could have its TLB mapped execute-, but not readable, something odd happens
and our TLB gets flushed. So it's a good idea to be prepared for that case
and have a fallback that allows us to fix things up in that case.
Add
From: Scott Wood scottw...@freescale.com
tlbilx is the new, preferred invalidation instruction. It is not
found on e500 prior to e500mc, but there should be no harm in
supporting it on all e500.
Based on code from Ashish Kalra ashish.ka...@freescale.com.
Signed-off-by: Scott Wood
When setting MSR for an e500mc guest, we implicitly always set MSR_GS
to make sure the guest is in guest state. Since we have this implicit
rule there, we don't need to explicitly pass MSR_GS to set_msr().
Remove all explicit setters of MSR_GS.
Signed-off-by: Alexander Graf ag...@suse.de
---
From: Scott Wood scottw...@freescale.com
Chips such as e500mc that implement category E.HV in Power ISA 2.06
provide hardware virtualization features, including a new MSR mode for
guest state. The guest OS can perform many operations without trapping
into the hypervisor, including transitions to
From: Scott Wood scottw...@freescale.com
e500mc has a normal PPC FPU, rather than SPE which is found
on e500v1/v2.
Based on code from Liu Yu yu@freescale.com.
Signed-off-by: Scott Wood scottw...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/include/asm/system.h
When one vcpu wants to kick another, it can issue a special IPI instruction
called msgsnd. This patch emulates this instruction, its clearing counterpart
and the infrastructure required to actually trigger that interrupt inside
a guest vcpu.
With this patch, SMP guests on e500mc work.
From: Scott Wood scottw...@freescale.com
e500mc will want to do lpid allocation/deallocation here.
Signed-off-by: Scott Wood scottw...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/44x.c |9 +
arch/powerpc/kvm/booke.c |9 -
From: Scott Wood scottw...@freescale.com
We'll use it on e500mc as well.
Signed-off-by: Scott Wood scottw...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/include/asm/kvm_book3s.h |3 ++
arch/powerpc/include/asm/kvm_booke.h |3 ++
From: Scott Wood scottw...@freescale.com
Split e500 (v1/v2) and e500mc/e5500 to allow optimization of feature
checks that differ between the two.
Signed-off-by: Scott Wood scottw...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/include/asm/cputable.h | 12
Hi Avi,
This is my current patch queue for ppc. Please pull.
Alex
The following changes since commit eb9ede961ffe8040e499f3bade88f38395610543:
Marcelo Tosatti (1):
KVM: fix kvm_vcpu_kick build failure on S390
are available in the git repository at:
On Wed, 14 Mar 2012 11:12:35 +0100, Jan Kiszka wrote:
On 2012-03-10 20:37, Eric B Munson wrote:
When a host stops or suspends a VM it will set a flag to show this.
The
watchdog will use these functions to determine if a softlockup is
real, or the
result of a suspended VM.
...
diff --git
Avi Kivity a...@redhat.com wrote:
What I checked was:
original with-patch2 with-patch3
8.7ms 8.5ms 7.5ms
What's the per-call numbers?
I did not look into details at that time.
I will try to see more details later if possible!
What I mean is, modern cpus effectively
On 03/15/2012 03:41 PM, Takuya Yoshikawa wrote:
Anyway I will re-check if we can achieve the same performance with a bit
cleaner implementation.
Not needed -- it's fine as it is (. I'm just interested in the
normalized numbers (nanoseconds per call, instead of aggregated time per
unknown
On 03/15/2012 03:41 PM, Takuya Yoshikawa wrote:
What I mean is, modern cpus effectively inline simple function calls by
predicting the call, and branchs within the function, and the return, so
they don't have to stop their pipelines at any of these points. But
again, the numbers talk
On Wed, Mar 7, 2012 at 5:27 PM, Alexander Graf ag...@suse.de wrote:
#define KVM_SC_MAGIC_R0 0x4b564d21 /* KVM! */
-#define HC_VENDOR_KVM (42 16)
+
+#include asm/epapr_hcalls.h
+
+/* ePAPR Hypercall Vendor ID */
+#define HC_VENDOR_EPAPR
On Thu, Mar 08, 2012 at 09:59:41PM +0530, Akshay Karle wrote:
Hi,
We are undergraduate engineering students of Maharashtra Academy of
Engineering, Pune, India and we are working on a project entitled
'Transcendent Memory on KVM' as a part of our academics.
The project members are:
1.
---
kvm-tmem Patch details:
This patch adds appropriate shims at the guest that invokes the kvm
hypercalls, and the host uses zcache pools to implement the required
functions.
To enable tmem on the 'kvm host' add the boot parameter:
kvmtmem
And to enable tmem in the 'kvm guests' add the
On Thu, Mar 08, 2012 at 10:24:08PM +0530, Akshay Karle wrote:
From: Akshay Karle akshay.a.ka...@gmail.com
Subject: [RFC 1/2] kvm: host-side changes for tmem on KVM
Working at host:
Once the guest exits to the kvm host, the host determines that the guest
exited
to perform some tmem
On 03/08/2012 06:29 PM, Akshay Karle wrote:
Hi,
We are undergraduate engineering students of Maharashtra Academy of
Engineering, Pune, India and we are working on a project entitled
'Transcendent Memory on KVM' as a part of our academics.
The project members are:
1. Ashutosh Tripathi
2.
On Thu, Mar 08, 2012 at 10:32:37PM +0530, Akshay Karle wrote:
From: Akshay Karle akshay.a.ka...@gmail.com
Subject: [RFC 2/2] kvm: guest-side changes for tmem on KVM
Working in the guest:
At the kvm guest, we add the appropriate tmem shims to intercept the
tmem operations and then invoke the
On Wed, Mar 07, 2012, Avi Kivity wrote about Re: PATCH: nVMX: Better
MSR_IA32_FEATURE_CONTROL handling:
struct page *apic_access_page;
+ u64 msr_ia32_feature_control;
};
...
(msrs_to_save). The variable itself should live in vcpu-arch, even if
some bits are vendor specific.
Does
From: Avi Kivity [mailto:a...@redhat.com]
Subject: Re: [RFC 0/2] kvm: Transcendent Memory (tmem) on KVM
On 03/08/2012 06:29 PM, Akshay Karle wrote:
Hi,
We are undergraduate engineering students of Maharashtra Academy of
Engineering, Pune, India and we are working on a project entitled
On 03/15/2012 07:49 PM, Dan Magenheimer wrote:
One of the potential problems with tmem is reduction in performance when
the cache hit rate is low, for example when streaming.
Can you test this by creating a large file, for example with
dd /dev/urandom file bs=1M count=10
On Thu, Mar 15, 2012 at 08:01:52PM +0200, Avi Kivity wrote:
On 03/15/2012 07:49 PM, Dan Magenheimer wrote:
One of the potential problems with tmem is reduction in performance when
the cache hit rate is low, for example when streaming.
Can you test this by creating a large file, for
On 03/15/2012 07:40 PM, Nadav Har'El wrote:
On Wed, Mar 07, 2012, Avi Kivity wrote about Re: PATCH: nVMX: Better
MSR_IA32_FEATURE_CONTROL handling:
struct page *apic_access_page;
+ u64 msr_ia32_feature_control;
};
...
(msrs_to_save). The variable itself should live in vcpu-arch,
Working at host:
Once the guest exits to the kvm host, the host determines that the guest
exited
to perform some tmem operation(done at kvm_emulate_hypercall)and then
we use zcache to implement this required operations(performed by
kvm_pv_tmem_op).
Do you need any modifications to the
On 03/15/2012 08:02 PM, Konrad Rzeszutek Wilk wrote:
Nice. This takes care of the tail-end of the streaming (the more
important one - since it always involves a cold copy). What about the
other side? Won't the read code invoke cleancache_get_page() for every
page? (this one is just a
From: Konrad Rzeszutek Wilk
Subject: Re: [RFC 0/2] kvm: Transcendent Memory (tmem) on KVM
On Thu, Mar 15, 2012 at 08:01:52PM +0200, Avi Kivity wrote:
On 03/15/2012 07:49 PM, Dan Magenheimer wrote:
The WasActive patch (https://lkml.org/lkml/2012/1/25/300)
is intended to avoid the
From: Avi Kivity [mailto:a...@redhat.com]
Sent: Thursday, March 15, 2012 12:11 PM
To: Konrad Rzeszutek Wilk
Cc: Dan Magenheimer; Akshay Karle; linux-ker...@vger.kernel.org;
kvm@vger.kernel.org; ashu tripathi;
nishant gulhane; amarmore2006; Shreyas Mahure; mahesh mohan
Subject: Re: [RFC
From: Akshay Karle [mailto:akshay.a.ka...@gmail.com]
Subject: Re: [RFC 1/2] kvm: host-side changes for tmem on KVM
Working at host:
Once the guest exits to the kvm host, the host determines that the guest
exited
to perform some tmem operation(done at kvm_emulate_hypercall)and then
+early_initcall(epapr_paravirt_init);
Just want to double-check. Are you 100% sure that this gets called before
kvm_guest_init()?
Yes, kvm_guest_init is a postcore_initcall, which comes after early.
Some printks confirmed this.
Stuart
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On Thu, Mar 15, 2012 at 12:36:48PM -0700, Dan Magenheimer wrote:
From: Avi Kivity [mailto:a...@redhat.com]
Sent: Thursday, March 15, 2012 12:11 PM
To: Konrad Rzeszutek Wilk
Cc: Dan Magenheimer; Akshay Karle; linux-ker...@vger.kernel.org;
kvm@vger.kernel.org; ashu tripathi;
nishant
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