On Sun, Sep 16, 2012 at 2:32 AM, Nadav Har'El n...@math.technion.ac.il wrote:
On Sat, Sep 15, 2012, Steven wrote about Guest mode question:
Hi,
I have a question about vm execution in the guest mode. Suppose I have
two VMs on a machine.
Is it possible that both VMs are in the guest mode? Like
On Wed, Sep 19, 2012 at 11:10:10AM +0930, Rusty Russell wrote:
Tom Herbert therb...@google.com writes:
On Tue, Sep 11, 2012 at 10:49 PM, Rusty Russell
ru...@rustcorp.com.auwrote:
Perhaps Tom can explain how we avoid out-of-order receive for the
accelerated RFS case? It's not clear to
On 19.09.2012, at 05:37, Benjamin Herrenschmidt b...@kernel.crashing.org
wrote:
On Fri, 2012-09-14 at 03:44 +0200, Alexander Graf wrote:
We're slowly moving towards ONE_REG. ARM is already going full steam
ahead and I'd like to have every new register in PPC be modeled with
it as well.
On 09/18/2012 06:16 AM, Alex Williamson wrote:
To emulate level triggered interrupts, add a resample option to
KVM_IRQFD. When specified, a new resamplefd is provided that notifies
the user when the irqchip has been resampled by the VM. This may, for
instance, indicate an EOI. Also in this
On Wed, Sep 19, 2012 at 11:59:33AM +0300, Avi Kivity wrote:
@@ -247,9 +383,36 @@ kvm_irqfd_assign(struct kvm *kvm, struct kvm_irqfd
*args)
/* This fd is used for another irq already. */
ret = -EBUSY;
spin_unlock_irq(kvm-irqfds.lock);
+
On 09/19/2012 12:08 PM, Michael S. Tsirkin wrote:
Whoa. Can't we put the resampler entry somewhere we don't need to
search for it? Like a kvm_kernel_irq_routing_entry, that's indexed by
gsi already (kvm_irq_routing_table::rt_entries[gsi]).
I'm not sure why would we bother optimizing this,
On 09/18/2012 05:38 PM, Li, Jiongxi wrote:
+static int handle_apic_write(struct kvm_vcpu *vcpu) {
+ unsigned long exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
+ u32 offset = exit_qualification 0xfff;
+
+ /* APIC-write VM exit is trap-like and thus no need to adjust IP */
On 09/18/2012 12:51 PM, Gerd Hoffmann wrote:
This patch adds a mmio bar to the qemu standard vga which allows to
access the standard vga registers and bochs dispi interface registers
via mmio.
diff --git a/hw/vga-pci.c b/hw/vga-pci.c
index 9abbada..e05e2ef 100644
--- a/hw/vga-pci.c
+++
On Tue, Sep 18, 2012 at 11:01:27PM +0100, Christoffer Dall wrote:
On Tue, Sep 18, 2012 at 8:47 AM, Will Deacon will.dea...@arm.com wrote:
On Sat, Sep 15, 2012 at 04:34:43PM +0100, Christoffer Dall wrote:
+#define L_PTE2_SHAREDL_PTE_SHARED
+#define L_PTE2_READ
On Wed, Sep 19, 2012 at 05:09:34AM +0100, Rusty Russell wrote:
Will Deacon will.dea...@arm.com writes:
On Sat, Sep 15, 2012 at 04:35:02PM +0100, Christoffer Dall wrote:
From: Rusty Russell rusty.russ...@linaro.org
We want some of these for use in KVM, so pull them out of
On 09/18/2012 04:08 AM, Hao, Xudong wrote:
The objective of the change is to disable lazy fpu loading (that is,
host fpu loaded in guest and vice-versa),
Not vice versa. We allow the guest fpu loaded in the host, but save it
on heavyweight exit or task switch.
when some bit except the
Hi,
We are facing big problems with our esxi 5 and HP DL585 G7 environment. Several
of our HP servers reboots/hangs randomly without leaving any trace in any logs.
HP hardware diag shows no errors in hardware and vmware support are clueless.
My finding when searching for a reason is that
On 19.09.2012, at 02:02, Paul Mackerras wrote:
On Tue, Sep 18, 2012 at 04:06:25PM +0200, Alexander Graf wrote:
Could you please merge the registers that you share with book3s pr
into shared code?
OK - that's just DAR and DSISR for this patch, isn't it?
Unfortunately yes. Basically all of
On 2012-09-19 12:42, hampus.l...@ongame.com wrote:
Hi,
We are facing big problems with our esxi 5 and HP DL585 G7 environment.
Several of our HP servers reboots/hangs randomly without leaving any trace in
any logs. HP hardware diag shows no errors in hardware and vmware support are
+ * 0x0400 - 0x041f vga ioports (0x3c0 - 0x3df), remapped 1:1
Do they support word accesses to set both index and data?
+ * 0x0500 - 0x0515 bochs dispi interface registers, mapped flat without
+ * index/data ports. Use (index 1) as offset for
+ *
On Wed, Sep 19, 2012, Steven wrote about Re: Guest mode question:
thanks for your reply. My question is regarding the the normal
single-level virtualization.
Suppose that the physical machine has only one core and 2 VMs.
Each VM has one vcpu, so there are two vcpu threads running with the
You won Two Million Pounds in the Honda company. For claims reply by sending:
Full Age;Names, Addrs,phone No to:hndaca...@gmail.com
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On 09/19/2012 02:35 PM, Gerd Hoffmann wrote:
Looks like word writes are supported provided the memory API breaks up
writes in little endian order. Better to make it explicit.
Like the attached incremental patch?
Very like.
--
error compiling committee.c: too many arguments to function
On 09/15/2012 06:34 PM, Christoffer Dall wrote:
The following series implements KVM support for ARM processors,
specifically on the Cortex A-15 platform. We feel this is ready to be
merged.
Work is done in collaboration between Columbia University, Virtual Open
Systems and ARM/Linaro.
On Tue, Sep 18, 2012 at 03:32:04PM -0400, Don Slutz wrote:
On 09/18/12 13:00, Eduardo Habkost wrote:
On Tue, Sep 18, 2012 at 10:49:53AM -0400, Don Slutz wrote:
From http://lkml.indiana.edu/hypermail/linux/kernel/1205.0/00100.html
EAX should be KVM_CPUID_FEATURES (0x4001) not 0.
If kvm
On 09/18/2012 06:03 AM, Andrew Theurer wrote:
On Sun, 2012-09-16 at 11:55 +0300, Avi Kivity wrote:
On 09/14/2012 12:30 AM, Andrew Theurer wrote:
The concern I have is that even though we have gone through changes to
help reduce the candidate vcpus we yield to, we still have a very poor
On Wed, 2012-09-19 at 12:10 +0300, Avi Kivity wrote:
On 09/19/2012 12:08 PM, Michael S. Tsirkin wrote:
Whoa. Can't we put the resampler entry somewhere we don't need to
search for it? Like a kvm_kernel_irq_routing_entry, that's indexed by
gsi already
On 05.09.2012, at 09:58, Rusty Russell wrote:
Avi has indicated that this is the future. For now, make it dependent on
KVM_HAVE_ONE_REG (and define that for PPC and S/390).
Signed-off-by: Rusty Russell rusty.russ...@linaro.org
Acked-by: Alexander Graf ag...@suse.de
Alex
--
To
On 05.09.2012, at 09:58, Rusty Russell wrote:
Useful helper for getting length of register given id.
Signed-off-by: Rusty Russell rusty.russ...@linaro.org
Acked-by: Alexander Graf ag...@suse.de
Alex
---
include/linux/kvm.h |2 ++
1 file changed, 2 insertions(+)
diff --git
The previous patch mm: wrap calls to set_pte_at_notify with
invalidate_range_start and invalidate_range_end only called the
invalidate_range_end mmu notifier function in do_wp_page when the new_page
variable wasn't NULL. This was done in order to only call invalidate_range_end
after
On 05.09.2012, at 09:58, Rusty Russell wrote:
This is a generic interface to find out what you can use
KVM_GET_ONE_REG/KVM_SET_ONE_REG on. Archs need to define
KVM_HAVE_REG_LIST and then kvm_arch_num_regs() and
kvm_arch_copy_reg_indices() functions.
It's inspired by
On 09/19/2012 04:54 PM, Alex Williamson wrote:
On Wed, 2012-09-19 at 12:10 +0300, Avi Kivity wrote:
On 09/19/2012 12:08 PM, Michael S. Tsirkin wrote:
Whoa. Can't we put the resampler entry somewhere we don't need to
search for it? Like a kvm_kernel_irq_routing_entry, that's indexed by
On 09/17/2012 10:36 PM, Dean Pucsek wrote:
Hello,
For my Masters thesis I am investigating the usage of Intel VT-x and branch
tracing in the domain of malware analysis. Essentially what I'm aiming to do
is trace the execution of a guest VM and then pass that trace on to some
other
On 09/17/2012 02:28 PM, Li, Jiongxi wrote:
+++ b/arch/x86/kvm/lapic.c
@@ -499,8 +499,13 @@ static int __apic_accept_irq(struct kvm_lapic *apic,
int delivery_mode,
if (trig_mode) {
apic_debug(level trig mode for vector %d, vector);
On 2012-09-19 16:38, Avi Kivity wrote:
On 09/17/2012 10:36 PM, Dean Pucsek wrote:
Hello,
For my Masters thesis I am investigating the usage of Intel VT-x and branch
tracing in the domain of malware analysis. Essentially what I'm aiming to
do is trace the execution of a guest VM and then
On 09/14/2012 05:15 PM, Li, Jiongxi wrote:
@@ -5293,16 +5300,27 @@ static int vcpu_enter_guest(struct kvm_vcpu
*vcpu)
}
if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
+ /* update archtecture specific hints for APIC virtual interrupt
delivery
*/
+
On 09/19/2012 05:47 PM, Alexander Graf wrote:
On 04.09.2012, at 17:13, Cornelia Huck wrote:
Handle most support for channel I/O instructions in the kernel itself.
Only asynchronous functions (such as the start function) need to be
handled by userspace.
Phew. This is a lot of code for
On 09/19/2012 05:45 PM, Jan Kiszka wrote:
On 2012-09-19 16:38, Avi Kivity wrote:
On 09/17/2012 10:36 PM, Dean Pucsek wrote:
Hello,
For my Masters thesis I am investigating the usage of Intel VT-x and branch
tracing in the domain of malware analysis. Essentially what I'm aiming to
do is
On 09/17/2012 02:28 PM, Li, Jiongxi wrote:
+} else if (kvm_apic_vid_enabled(vcpu)) {
+if (kvm_cpu_has_interrupt_apic_vid(vcpu)
+kvm_x86_ops-interrupt_allowed(vcpu)) {
+kvm_queue_interrupt(vcpu,
+
Hi. We run a cloud compute provider using qemu-kvm and macvtap and are keen
to find a paid contractor to fix a bug with unusably slow inbound networking
over macvtap.
We originally reported the bug in this thread (report copied below):
http://marc.info/?t=13451109862
We have also
On 09/18/2012 10:03 AM, Andrew Holway wrote:
Hi Steve,
Do you think these patches will make their way into the redhat kernel
sometime soon?
The process would start by opening a bz at bugzilla.redhat.com... If you like,
you
can send me the pointer to the bz and I'll make sure it gets
On 09/18/2012 09:45 AM, Xiao Guangrong wrote:
On 09/16/2012 08:07 PM, Avi Kivity wrote:
@@ -3672,20 +3672,17 @@ static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu, unsigned long gva,
gpa_t *gpa, struct x86_exception *exception,
On 09/18/2012 10:21 AM, Xiao Guangrong wrote:
On 09/16/2012 08:07 PM, Avi Kivity wrote:
+/*
+ * On a write fault, fold the dirty bit into accessed_dirty by shifting
it one
+ * place right.
+ *
+ * On a read fault, do nothing.
+ */
+accessed_dirty = pte
Just a really quick glimpse. This patch is huge :).
On 04.09.2012, at 17:13, Cornelia Huck wrote:
Add a new virtio transport that uses channel commands to perform
virtio operations.
Add a new machine type s390-ccw that uses this virtio-ccw transport
and make it the default machine for
On 04.09.2012, at 17:13, Cornelia Huck wrote:
Provide css support for the !KVM case as well.
As mentioned in my previous reply to the kvm side of this, I don't see any
reason why we should split the code at such a high level. Why can't KVM and
!KVM share the same code? If we run into
On 04.09.2012, at 17:13, Cornelia Huck wrote:
This patch enables using both virtio-xxx-s390 and virtio-xxx-ccw
by making the alias lookup code verify that a driver is actually
registered.
(Only included in order to allow testing of virtio-ccw; should be
replaced by cleaning up the virtio
On 09/18/2012 09:53 AM, Xiao Guangrong wrote:
On 09/16/2012 08:07 PM, Avi Kivity wrote:
-pt_access = ACC_ALL;
+pt_access = pte_access = ACC_ALL;
+++walker-level;
-for (;;) {
+do {
gfn_t real_gfn;
unsigned long host_addr;
+
On 09/19/12 09:20, Eduardo Habkost wrote:
On Tue, Sep 18, 2012 at 03:32:04PM -0400, Don Slutz wrote:
On 09/18/12 13:00, Eduardo Habkost wrote:
On Tue, Sep 18, 2012 at 10:49:53AM -0400, Don Slutz wrote:
From http://lkml.indiana.edu/hypermail/linux/kernel/1205.0/00100.html
EAX should be
If nx is disabled, then is gpte[63] is set we will hit a reserved
bit set fault before checking permissions; so we can ignore the
setting of efer.nxe.
Reviewed-by: Xiao Guangrong xiaoguangr...@linux.vnet.ibm.com
Signed-off-by: Avi Kivity a...@redhat.com
---
arch/x86/kvm/paging_tmpl.h | 4 +---
1
While unspecified, the behaviour of Intel processors is to first
perform the page table walk, then, if the walk was successful, to
atomically update the accessed and dirty bits of walked paging elements.
While we are not required to follow this exactly, doing so will allow us
to perform the
walk_addr_generic() permission checks are a maze of branchy code, which is
performed four times per lookup. It depends on the type of access, efer.nxe,
cr0.wp, cr4.smep, and in the near future, cr4.smap.
Optimize this away by precalculating all variants and storing them in a
bitmap. The bitmap
The page table walk is coded as an infinite loop, with a special
case on the last pte.
Code it as an ordinary loop with a termination condition on the last
pte (large page or walk length exhausted), and put the last pte handling
code after the loop where it belongs.
Reviewed-by: Xiao Guangrong
'eperm' is no longer used in the walker loop, so we can eliminate it.
Reviewed-by: Xiao Guangrong xiaoguangr...@linux.vnet.ibm.com
Signed-off-by: Avi Kivity a...@redhat.com
---
arch/x86/kvm/paging_tmpl.h | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git
Instead of branchy code depending on level, gpte.ps, and mmu configuration,
prepare everything in a bitmap during mode changes and look it up during
runtime.
Reviewed-by: Xiao Guangrong xiaoguangr...@linux.vnet.ibm.com
Signed-off-by: Avi Kivity a...@redhat.com
---
arch/x86/include/asm/kvm_host.h
Keep track of accessed/dirty bits; if they are all set, do not
enter the accessed/dirty update loop.
Reviewed-by: Xiao Guangrong xiaoguangr...@linux.vnet.ibm.com
Signed-off-by: Avi Kivity a...@redhat.com
---
arch/x86/kvm/paging_tmpl.h | 26 --
1 file changed, 20
gpte_access() computes the access permissions of a guest pte and also
write-protects clean gptes. This is wrong when we are servicing a
write fault (since we'll be setting the dirty bit momentarily) but
correct when instantiating a speculative spte, or when servicing a
read fault (since we'll
'ac' essentially reconstructs the 'access' variable we already
have, except for the PFERR_PRESENT_MASK and PFERR_RSVD_MASK. As
these are not used by callees, just use 'access' directly.
Signed-off-by: Avi Kivity a...@redhat.com
---
arch/x86/kvm/paging_tmpl.h | 5 +
1 file changed, 1
The page table walk has gotten crufty over the years and is threatening to
become
even more crufty when SMAP is introduced. Clean it up (and optimize it)
somewhat.
v3:
fix another boolflip pointed out by Xiao Guangrong
some cosmetics
v2:
fix SMEP false positive by moving checks to the
We no longer rely on paging_tmpl.h defines; so we can move the function
to mmu.c.
Rely on zero extension to 64 bits to get the correct nx behaviour.
Reviewed-by: Xiao Guangrong xiaoguangr...@linux.vnet.ibm.com
Signed-off-by: Avi Kivity a...@redhat.com
---
arch/x86/kvm/mmu.c | 10
On 04.09.2012, at 17:13, Cornelia Huck wrote:
Add a driver for kvm guests that matches virtual ccw devices provided
by the host as virtio bridge devices.
These virtio-ccw devices use a special set of channel commands in order
to perform virtio functions.
Signed-off-by: Cornelia Huck
On 09/18/2012 07:02:42 PM, Paul Mackerras wrote:
On Tue, Sep 18, 2012 at 04:06:25PM +0200, Alexander Graf wrote:
Could you please merge the registers that you share with book3s pr
into shared code?
OK - that's just DAR and DSISR for this patch, isn't it?
And basically all of the FP/VMX/VSX
On 09/18/2012 10:36 AM, Xiao Guangrong wrote:
On 09/16/2012 08:07 PM, Avi Kivity wrote:
Instead of branchy code depending on level, gpte.ps, and mmu configuration,
prepare everything in a bitmap during mode changes and look it up during
runtime.
Avi,
Can we introduce ignore_bits_mask[]
On 09/19/2012 08:17 PM, Avi Kivity wrote:
On 09/18/2012 10:36 AM, Xiao Guangrong wrote:
On 09/16/2012 08:07 PM, Avi Kivity wrote:
Instead of branchy code depending on level, gpte.ps, and mmu configuration,
prepare everything in a bitmap during mode changes and look it up during
runtime.
From 9982bb73460b05c1328068aae047b14b2294e2da Mon Sep 17 00:00:00 2001
From: Will Auld will.a...@intel.com
Date: Wed, 12 Sep 2012 18:10:56 -0700
Subject: [PATCH] Enabling IA32_TSC_ADJUST for guest VM
CPUID.7.0.EBX[1]=1 indicates IA32_TSC_ADJUST MSR 0x3b is supported
Basic design is to emulate
From 9d5201975d2c9da4da8a945fcd9531c9fb2073c0 Mon Sep 17 00:00:00 2001
From: Will Auld will.a...@intel.com
Date: Wed, 12 Sep 2012 18:31:41 -0700
Subject: [PATCH] Enabling IA32_TSC_ADJUST for Qemu KVM guest VMs
CPUID.7.0.EBX[1]=1 indicates IA32_TSC_ADJUST MSR 0x3b is supported
Basic design is to
On 2012-09-19 19:49, Auld, Will wrote:
From 9d5201975d2c9da4da8a945fcd9531c9fb2073c0 Mon Sep 17 00:00:00 2001
From: Will Auld will.a...@intel.com
Date: Wed, 12 Sep 2012 18:31:41 -0700
Subject: [PATCH] Enabling IA32_TSC_ADJUST for Qemu KVM guest VMs
CPUID.7.0.EBX[1]=1 indicates
On Wed, 2012-09-19 at 11:59 +0300, Avi Kivity wrote:
On 09/18/2012 06:16 AM, Alex Williamson wrote:
@@ -92,6 +156,43 @@ irqfd_shutdown(struct work_struct *work)
*/
flush_work_sync(irqfd-inject);
+ if (irqfd-resampler) {
+ struct _irqfd_resampler *resampler =
On Tue, Sep 18, 2012 at 9:51 AM, Gerd Hoffmann kra...@redhat.com wrote:
This patch adds a mmio bar to the qemu standard vga which allows to
access the standard vga registers and bochs dispi interface registers
via mmio.
Cc: Benjamin Herrenschmidt b...@kernel.crashing.org
Signed-off-by: Gerd
On Wed, Sep 19, 2012 at 12:23:13PM -0600, Alex Williamson wrote:
On Wed, 2012-09-19 at 11:59 +0300, Avi Kivity wrote:
On 09/18/2012 06:16 AM, Alex Williamson wrote:
@@ -92,6 +156,43 @@ irqfd_shutdown(struct work_struct *work)
*/
flush_work_sync(irqfd-inject);
+ if
On 19.09.2012, at 19:14, Scott Wood scottw...@freescale.com wrote:
On 09/18/2012 07:02:42 PM, Paul Mackerras wrote:
On Tue, Sep 18, 2012 at 04:06:25PM +0200, Alexander Graf wrote:
Could you please merge the registers that you share with book3s pr
into shared code?
OK - that's just DAR
On Wed, 2012-09-19 at 21:48 +0300, Michael S. Tsirkin wrote:
On Wed, Sep 19, 2012 at 12:23:13PM -0600, Alex Williamson wrote:
On Wed, 2012-09-19 at 11:59 +0300, Avi Kivity wrote:
On 09/18/2012 06:16 AM, Alex Williamson wrote:
@@ -92,6 +156,43 @@ irqfd_shutdown(struct work_struct *work)
On Mon, Sep 17, 2012 at 10:00:55AM -0400, Don Slutz wrote:
This is used to set the cpu object's hypervisor level to the default for
Microsoft's Hypervisor.
Signed-off-by: Don Slutz d...@cloudswitch.com
---
target-i386/cpu.c | 10 ++
1 files changed, 10 insertions(+), 0
If we reset a vcpu on INIT, make sure to not touch dr7 as stored in the
VMCS/VMCB and also switch_db_regs if guest debugging is using hardware
breakpoints. Otherwise, the vcpu will not trigger hardware breakpoints
until userspace issues another KVM_SET_GUEST_DEBUG IOCTL for it.
Found while trying
On Wed, Sep 19, 2012 at 01:23:35PM -0600, Alex Williamson wrote:
On Wed, 2012-09-19 at 21:48 +0300, Michael S. Tsirkin wrote:
On Wed, Sep 19, 2012 at 12:23:13PM -0600, Alex Williamson wrote:
On Wed, 2012-09-19 at 11:59 +0300, Avi Kivity wrote:
On 09/18/2012 06:16 AM, Alex Williamson
hi,
I am wondering what the exit code SVM_EXIT_VMRUN means? Its name is
not as clear as SVM_EXIT_READ_CR0.
Thanks.
- Steven
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On Tue, Sep 18, 2012 at 04:15:32PM +0800, Xiao Guangrong wrote:
On 09/15/2012 11:25 PM, Marcelo Tosatti wrote:
On Fri, Sep 14, 2012 at 05:59:06PM +0800, Xiao Guangrong wrote:
Wrap the common operations into these two functions
Signed-off-by: Xiao Guangrong xiaoguangr...@linux.vnet.ibm.com
On 09/19/12 15:32, Eduardo Habkost wrote:
On Mon, Sep 17, 2012 at 10:00:55AM -0400, Don Slutz wrote:
This is used to set the cpu object's hypervisor level to the default for
Microsoft's Hypervisor.
Signed-off-by: Don Slutz d...@cloudswitch.com
---
target-i386/cpu.c | 10 ++
1
On Wed, Sep 19, 2012 at 5:21 AM, Will Deacon will.dea...@arm.com wrote:
On Tue, Sep 18, 2012 at 11:01:27PM +0100, Christoffer Dall wrote:
On Tue, Sep 18, 2012 at 8:47 AM, Will Deacon will.dea...@arm.com wrote:
On Sat, Sep 15, 2012 at 04:34:43PM +0100, Christoffer Dall wrote:
+#define
On Tue, Sep 18, 2012 at 9:03 AM, Will Deacon will.dea...@arm.com wrote:
On Sat, Sep 15, 2012 at 04:34:55PM +0100, Christoffer Dall wrote:
From: Marc Zyngier marc.zyng...@arm.com
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm/mm/idmap.c |4
1 file changed, 4
Hi Michael,
FYI, there are new compile warnings show up in
tree: git://git.kernel.org/pub/scm/virt/kvm/kvm.git queue
head: 879238fecc051d95037ae76332916209a7770709
commit: 9fc77441e5e1bf80b794cc546d2243ee9f4afb75 [41/42] KVM: make processes
waiting on vcpu mutex killable
config:
-Original Message-
From: Avi Kivity [mailto:a...@redhat.com]
Sent: Wednesday, September 19, 2012 6:24 PM
To: Hao, Xudong
Cc: Marcelo Tosatti; kvm@vger.kernel.org; Zhang, Xiantao
Subject: Re: [PATCH v3] kvm/fpu: Enable fully eager restore kvm FPU
That may be:
static bool
On 09/19/2012 07:43 AM, Marcelo Tosatti wrote:
- error pfn / mmio pfn / invalid pfn relation
Have the meaning of this bits unified in a single function/helper, see
comment to patch 1 (perhaps you can further improve).
Sorry, more detail?
Should force the reader of the code to understand
On 09/20/2012 12:36 AM, Avi Kivity wrote:
'ac' essentially reconstructs the 'access' variable we already
have, except for the PFERR_PRESENT_MASK and PFERR_RSVD_MASK. As
these are not used by callees, just use 'access' directly.
Reviewed-by: Xiao Guangrong xiaoguangr...@linux.vnet.ibm.com
https://bugzilla.kernel.org/show_bug.cgi?id=47451
--- Comment #2 from Jay Ren yongjie@intel.com 2012-09-20 03:36:31 ---
(In reply to comment #1)
The steps to reproduce don't indicate what you've done in the host to prepare
the device. Is igbvf loaded in the host?
No, I don't load
On Wed, Sep 19, 2012, Steven wrote about what does SVM_EXIT_VMRUN mean?:
hi,
I am wondering what the exit code SVM_EXIT_VMRUN means? Its name is
not as clear as SVM_EXIT_READ_CR0.
Thanks.
This exit happens when the guest ran the VMRUN instruction. In other
words, the guest is a hypervisor and
https://bugzilla.kernel.org/show_bug.cgi?id=47451
--- Comment #3 from Alex Williamson alex.william...@redhat.com 2012-09-20
04:36:50 ---
(In reply to comment #2)
(In reply to comment #1)
Can we narrow down the kvm.git commit range at all? The
one provided is over 12k commits covering
On 18.09.2012 09:56, Dirk Heinrichs wrote:
Hi,
I have a really strange problem using USB devices in a Windows Vista (32bit)
guest. After adding a USB device (an Adroid phone or a GPS navigation device)
to the guest, Vista starts to install the driver(s) for the new device just
as
it
On Thu, Sep 20, 2012 at 08:16:08AM +0800, Fengguang Wu wrote:
Hi Michael,
FYI, there are new compile warnings show up in
tree: git://git.kernel.org/pub/scm/virt/kvm/kvm.git queue
head: 879238fecc051d95037ae76332916209a7770709
commit: 9fc77441e5e1bf80b794cc546d2243ee9f4afb75 [41/42]
I've got exactly the same symptoms as Dirk. I'm using the same host
kernel, qemu-kvm 1.2.0 and both WinXP-32 and Win7-64 guests. I've tried
both default-USB 1.1 and USB 2.0 settings for the guest USB
controller. In all cases, Windows loads the device drivers, but the
software on the gust cannot
From: Jan Kiszka jan.kis...@siemens.com
There are no external callers of this function as there is no concept of
resetting a vcpu from generic code.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/kvm/x86.c |8 +---
include/linux/kvm_host.h |1 -
2 files changed,
From: Jan Kiszka jan.kis...@siemens.com
No users outside of kvm/x86.c.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/kvm/x86.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 3701471..24f2278 100644
---
Hi,
+vbe_ioport_write_index(d-vga, 0, index);
+return vbe_ioport_read_data(d-vga, 0);
These functions are only available with CONFIG_BOCHS_VBE #defined, so
this code should be conditional as well.
But building without CONFIG_BOCHS_VBE is not very useful since it's
used by the
On 19.09.2012, at 05:37, Benjamin Herrenschmidt b...@kernel.crashing.org
wrote:
On Fri, 2012-09-14 at 03:44 +0200, Alexander Graf wrote:
We're slowly moving towards ONE_REG. ARM is already going full steam
ahead and I'd like to have every new register in PPC be modeled with
it as well.
On 19.09.2012, at 02:02, Paul Mackerras wrote:
On Tue, Sep 18, 2012 at 04:06:25PM +0200, Alexander Graf wrote:
Could you please merge the registers that you share with book3s pr
into shared code?
OK - that's just DAR and DSISR for this patch, isn't it?
Unfortunately yes. Basically all of
On 09/18/2012 07:02:42 PM, Paul Mackerras wrote:
On Tue, Sep 18, 2012 at 04:06:25PM +0200, Alexander Graf wrote:
Could you please merge the registers that you share with book3s pr
into shared code?
OK - that's just DAR and DSISR for this patch, isn't it?
And basically all of the FP/VMX/VSX
On 19.09.2012, at 19:14, Scott Wood scottw...@freescale.com wrote:
On 09/18/2012 07:02:42 PM, Paul Mackerras wrote:
On Tue, Sep 18, 2012 at 04:06:25PM +0200, Alexander Graf wrote:
Could you please merge the registers that you share with book3s pr
into shared code?
OK - that's just DAR
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