On Thu, Nov 01, 2012 at 08:21:51PM -0200, Marcelo Tosatti wrote:
On Fri, Nov 02, 2012 at 12:13:54AM +0200, Gleb Natapov wrote:
On Thu, Nov 01, 2012 at 06:56:11PM -0200, Marcelo Tosatti wrote:
On Thu, Nov 01, 2012 at 05:49:51PM +0400, Glauber Costa wrote:
On 11/01/2012 03:48 PM, Gleb
-Original Message-
From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org] On
Behalf Of Avi Kivity
Sent: Thursday, November 01, 2012 8:54 PM
To: Sanjay Lal
Cc: kvm@vger.kernel.org; linux-m...@linux-mips.org
Subject: Re: [PATCH 07/20] KVM/MIPS32: Dynamic binary
On 11/02/12 06:42, Xudong Hao wrote:
64 bit bar sizing and MMIO allocation. The 64 bit window is placed above high
memory, top down from the end of guest physical address space.
What problem you are trying to fix? The existing code should handle
64bit bars just fine. By default they are
On 11/01/2012 02:47 AM, Marcelo Tosatti wrote:
+ info = pvclock_get_vsyscall_time_info(cpu);
+
+ low = (int)__pa(info) | 1;
+ high = ((u64)__pa(per_cpu(hv_clock, cpu)) 32);
+ ret = native_write_msr_safe(MSR_KVM_USERSPACE_TIME, low, high);
+ printk(KERN_INFO kvm-clock:
The following series implements support for transparent huge pages and
hugetlbfs for KVM/ARM. The patch series is based on
kvm-arm-v13-vgic-timers with Will Deacon's hugetlb branch series merged.
These patches can also be fetched from here:
git://github.com/virtualopensystems/linux-kvm-arm.git
This should have been added a long time ago, and is at least required
for user space to take advantage of hugetlbfs.
Signed-off-by: Christoffer Dall c.d...@virtualopensystems.com
---
arch/arm/kvm/arm.c |1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
The arguments where shifted and printed a 64 bit integer as a 32 bit
integer.
Signed-off-by: Christoffer Dall c.d...@virtualopensystems.com
---
arch/arm/kvm/trace.h |8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/kvm/trace.h b/arch/arm/kvm/trace.h
index
Factor out parts of the functionality to make the code more readable and
rename to unmap_stage2_range while supporting unmapping ranges in one
go.
Signed-off-by: Christoffer Dall c.d...@virtualopensystems.com
---
arch/arm/kvm/mmu.c | 122 +++-
1
Support transparent huge pages in KVM/ARM. This requires quite a bit of
checkint and for qemu support to take advantage of this, you need to
make sure qemu allocates pages on aligned to the PMD size.
Signed-off-by: Christoffer Dall c.d...@virtualopensystems.com
---
On 10/31/2012 07:12 AM, Marcelo Tosatti wrote:
On Tue, Oct 30, 2012 at 11:39:32AM +0200, Avi Kivity wrote:
On 10/29/2012 08:40 PM, Marcelo Tosatti wrote:
On Mon, Oct 29, 2012 at 10:44:41AM -0700, Jeremy Fitzhardinge wrote:
On 10/29/2012 07:45 AM, Glauber Costa wrote:
On 10/24/2012 05:13 PM,
On 11/02/2012 01:39 AM, Marcelo Tosatti wrote:
On Thu, Nov 01, 2012 at 06:28:31PM +0400, Glauber Costa wrote:
On 11/01/2012 02:47 AM, Marcelo Tosatti wrote:
Allow a guest to register a second location for the VCPU time info
structure for each vcpu (as described by MSR_KVM_SYSTEM_TIME_NEW).
On 11/02/2012 04:33 AM, Marcelo Tosatti wrote:
On Thu, Nov 01, 2012 at 07:42:43PM -0200, Marcelo Tosatti wrote:
On Thu, Nov 01, 2012 at 06:41:46PM +0400, Glauber Costa wrote:
On 11/01/2012 02:47 AM, Marcelo Tosatti wrote:
+#ifdef CONFIG_PARAVIRT_CLOCK
+
+static notrace const struct
We should avoid kfree()ing error pointer in kvm_vcpu_ioctl() and
kvm_arch_vcpu_ioctl().
Signed-off-by: Guo Chao y...@linux.vnet.ibm.com
---
arch/x86/kvm/x86.c | 19 ++-
virt/kvm/kvm_main.c |2 ++
2 files changed, 8 insertions(+), 13 deletions(-)
diff --git
Return value of this function will be that of ioctl().
#include stdio.h
#include linux/kvm.h
int main () {
int fd;
fd = open (/dev/kvm, 0);
fd = ioctl (fd, KVM_CREATE_VM, 0);
ioctl (fd, KVM_SET_TSS_ADDR, 0xf000);
perror ();
return 0;
}
No need to check return value before breaking switch.
Signed-off-by: Guo Chao y...@linux.vnet.ibm.com
---
arch/x86/kvm/x86.c | 32
virt/kvm/kvm_main.c | 30 --
2 files changed, 62 deletions(-)
diff --git a/arch/x86/kvm/x86.c
On Fri, Nov 02, 2012 at 01:42:08PM +0800, Xudong Hao wrote:
64 bit bar sizing and MMIO allocation. The 64 bit window is placed above high
memory, top down from the end of guest physical address space.
Your patch seems to be against an old version of SeaBIOS. The latest
SeaBIOS already supports
Il 30/10/2012 19:21, Jan Kiszka ha scritto:
Aren't we still dependent on the order of processing? If the APIC is
restored after the device, won't we get the same problem?
Strictly speaking yes, but CPUs and APICs are always the first devices
to be saved.
Hmm, thinking about this
On 2012-11-02 15:53, Paolo Bonzini wrote:
Il 30/10/2012 19:21, Jan Kiszka ha scritto:
Aren't we still dependent on the order of processing? If the APIC is
restored after the device, won't we get the same problem?
Strictly speaking yes, but CPUs and APICs are always the first devices
to be
Hi,
I think deferring IRQ events to the point when the complete vmstate is
loaded is the cleaner and more robust approach.
Agree. Just schedule a bh in post_load.
See also a229c0535bd336efaec786dd6e352a54e0a8187d
cheers,
Gerd
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Hi,
I think deferring IRQ events to the point when the complete vmstate
is
loaded is the cleaner and more robust approach.
Agree. Just schedule a bh in post_load.
See also a229c0535bd336efaec786dd6e352a54e0a8187d
No, it cannot a bh. Right now incoming migration is blocking,
but
On 11/02/12 16:13, Paolo Bonzini wrote:
Hi,
I think deferring IRQ events to the point when the complete vmstate
is
loaded is the cleaner and more robust approach.
Agree. Just schedule a bh in post_load.
See also a229c0535bd336efaec786dd6e352a54e0a8187d
No, it cannot a bh. Right now
Il 02/11/2012 16:17, Gerd Hoffmann ha scritto:
On 11/02/12 16:13, Paolo Bonzini wrote:
Hi,
I think deferring IRQ events to the point when the complete vmstate
is loaded is the cleaner and more robust approach.
Agree. Just schedule a bh in post_load.
See also
On 11/01/2012 11:24 PM, Isaku Yamahata wrote:
+++ b/qapi-schema.json
@@ -2095,7 +2095,8 @@
##
{ 'command': 'migrate',
'data': {'uri': 'str', '*blk': 'bool', '*inc': 'bool', '*detach': 'bool'
,
- '*postcopy': 'bool', '*nobg': 'bool'} }
+ '*postcopy': 'bool',
Am 31.10.2012 10:40, schrieb Marcelo Tosatti:
From: Eduardo Habkost ehabk...@redhat.com
Change the kvm_cpu_fill_host() function to use
kvm_arch_get_supported_cpuid() instead of running the CPUID instruction
directly, when checking for supported CPUID features.
This should solve two
Am 02.11.2012 16:34, schrieb Andreas Färber:
Am 31.10.2012 10:40, schrieb Marcelo Tosatti:
From: Eduardo Habkost ehabk...@redhat.com
Change the kvm_cpu_fill_host() function to use
kvm_arch_get_supported_cpuid() instead of running the CPUID instruction
directly, when checking for supported
On Fri, Nov 02, 2012 at 04:34:00PM +0100, Andreas Färber wrote:
Am 31.10.2012 10:40, schrieb Marcelo Tosatti:
From: Eduardo Habkost ehabk...@redhat.com
Change the kvm_cpu_fill_host() function to use
kvm_arch_get_supported_cpuid() instead of running the CPUID instruction
directly, when
This fixes the following:
target-i386/cpu.o: In function `kvm_cpu_fill_host':
target-i386/cpu.c:783: undefined reference to `kvm_state'
I didn't notice the problem before because GCC was optimizing the entire
kvm_cpu_fill_host() function out (because all calls are conditional on
Am 02.11.2012 17:25, schrieb Eduardo Habkost:
This fixes the following:
target-i386/cpu.o: In function `kvm_cpu_fill_host':
target-i386/cpu.c:783: undefined reference to `kvm_state'
I didn't notice the problem before because GCC was optimizing the entire
kvm_cpu_fill_host() function out
On Nov 1, 2012, at 11:24 AM, Avi Kivity wrote:
On 10/31/2012 05:19 PM, Sanjay Lal wrote:
Currently, the following instructions are translated:
- CACHE (indexed)
- CACHE (va based): translated to a synci, overkill on D-CACHE operations,
but still much faster than a trap.
- mfc0/mtc0: the
On Nov 1, 2012, at 11:24 AM, Avi Kivity wrote:
On 10/31/2012 05:19 PM, Sanjay Lal wrote:
Currently, the following instructions are translated:
- CACHE (indexed)
- CACHE (va based): translated to a synci, overkill on D-CACHE operations,
but still much faster than a trap.
- mfc0/mtc0: the
On Nov 1, 2012, at 11:04 AM, Avi Kivity wrote:
On 10/31/2012 05:18 PM, Sanjay Lal wrote:
+
+/* Special address that contains the comm page, used for reducing # of
traps */
+#define KVM_GUEST_COMMPAGE_ADDR 0x0
+
+struct kvm_arch
+{
+/* Guest GVA-HPA page table */
+ulong
On Nov 1, 2012, at 10:51 AM, Avi Kivity wrote:
On 10/31/2012 05:17 PM, Sanjay Lal wrote:
The following patchset implements KVM support for MIPS32R2 processors,
using Trap Emulate, with basic runtime binary translation to improve
performance. The goal has been to keep the Guest kernel
On Wed, 31 Oct 2012, Sanjay Lal wrote:
diff --git a/arch/mips/include/asm/stackframe.h
b/arch/mips/include/asm/stackframe.h
index cb41af5..59c9245 100644
--- a/arch/mips/include/asm/stackframe.h
+++ b/arch/mips/include/asm/stackframe.h
@@ -30,7 +30,7 @@
#define STATMASK 0x1f
#endif
From: Michael S. Tsirkin m...@redhat.com
Date: Thu, 1 Nov 2012 21:16:17 +0200
tun supports zero copy transmit since
0690899b4d4501b3505be069b9a687e68ccbe15b,
however you can only enable this mode if you know your workload does not
trigger heavy guest to host/host to guest traffic -
On Fri, Nov 02, 2012 at 02:23:06PM +0400, Glauber Costa wrote:
On 11/02/2012 01:39 AM, Marcelo Tosatti wrote:
On Thu, Nov 01, 2012 at 06:28:31PM +0400, Glauber Costa wrote:
On 11/01/2012 02:47 AM, Marcelo Tosatti wrote:
Allow a guest to register a second location for the VCPU time info
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