Hi Marcelo,
Thanks for your patience. I was reading your reply over and over again, i would
like to argue it more :).
Please see below.
On 11/29/2012 08:21 AM, Marcelo Tosatti wrote:
https://lkml.org/lkml/2012/11/17/75
Does unshadowing work with large sptes at reexecute_instruction? That
On 11/30/2012 09:55 PM, Pavel Emelyanov wrote:
Hello,
This is an attempt to implement support for memory snapshot for the the
checkpoint-restore project (http://criu.org).
To create a dump of an application(s) we save all the information about it
to files. No surprise, the biggest part of
On Mon, Dec 03, 2012 at 03:01:01PM +0800, Yang Zhang wrote:
When PIT connects to IOAPIC, it route to pin 2 not pin 0.
This hack didn't work for a long time and nobody complained. It
should be safe to get rid of it.
Signed-off-by: Yang Zhang yang.z.zh...@intel.com
---
virt/kvm/ioapic.c |
On Mon, Dec 03, 2012 at 02:05:27PM +0800, Jason Wang wrote:
On Monday, December 03, 2012 12:34:08 PM Rusty Russell wrote:
Jason Wang jasow...@redhat.com writes:
+static const struct ethtool_ops virtnet_ethtool_ops;
+
+/*
+ * Converting between virtqueue no. and kernel tx/rx queue
On 12/03/2012 05:47 PM, Michael S. Tsirkin wrote:
On Mon, Dec 03, 2012 at 02:05:27PM +0800, Jason Wang wrote:
On Monday, December 03, 2012 12:34:08 PM Rusty Russell wrote:
Jason Wang jasow...@redhat.com writes:
+static const struct ethtool_ops virtnet_ethtool_ops;
+
+/*
+ * Converting
On Tue, Nov 27, 2012 at 06:15:59PM +0800, Jason Wang wrote:
- if (!try_fill_recv(vi-rq, GFP_KERNEL))
- schedule_delayed_work(vi-rq.refill, 0);
+ for (i = 0; i vi-max_queue_pairs; i++)
+ if (!try_fill_recv(vi-rq[i], GFP_KERNEL))
+
On 12/03/2012 06:14 PM, Michael S. Tsirkin wrote:
On Tue, Nov 27, 2012 at 06:15:59PM +0800, Jason Wang wrote:
- if (!try_fill_recv(vi-rq, GFP_KERNEL))
- schedule_delayed_work(vi-rq.refill, 0);
+ for (i = 0; i vi-max_queue_pairs; i++)
+ if (!try_fill_recv(vi-rq[i],
On 30/11/12 18:49, Christoffer Dall wrote:
On Fri, Nov 30, 2012 at 12:14 PM, Will Deacon will.dea...@arm.com wrote:
On Fri, Nov 30, 2012 at 04:47:40PM +, Christoffer Dall wrote:
On Fri, Nov 30, 2012 at 10:15 AM, Will Deacon will.dea...@arm.com wrote:
At this point, VM1 is running and
On Sat, Dec 01, 2012 at 02:52:13AM +, Christoffer Dall wrote:
On Wed, Nov 28, 2012 at 8:11 AM, Will Deacon will.dea...@arm.com wrote:
On Sat, Nov 10, 2012 at 03:44:51PM +, Christoffer Dall wrote:
+ kvm-arch.vgic.vgic_dist_base = addr;
+ break;
+ case
Add RFS support to virtio network device.
Add a new feature flag VIRTIO_NET_F_RFS for this feature, a new
configuration field max_virtqueue_pairs to detect supported number of
virtqueues as well as a new command VIRTIO_NET_CTRL_RFS to program
packet steering for unidirectional protocols.
---
On Mon, Dec 03, 2012 at 06:30:49PM +0800, Jason Wang wrote:
On 12/03/2012 06:14 PM, Michael S. Tsirkin wrote:
On Tue, Nov 27, 2012 at 06:15:59PM +0800, Jason Wang wrote:
-if (!try_fill_recv(vi-rq, GFP_KERNEL))
-schedule_delayed_work(vi-rq.refill, 0);
+
On Fri, Nov 30, 2012 at 08:22:28PM +, Christoffer Dall wrote:
On Mon, Nov 19, 2012 at 10:01 AM, Will Deacon will.dea...@arm.com wrote:
On Sat, Nov 10, 2012 at 03:43:13PM +, Christoffer Dall wrote:
This should probably be 0xff and also use the macros that Lorenzo is
introducing:
On Mon, Dec 03, 2012 at 06:01:58PM +0800, Jason Wang wrote:
On 12/03/2012 05:47 PM, Michael S. Tsirkin wrote:
On Mon, Dec 03, 2012 at 02:05:27PM +0800, Jason Wang wrote:
On Monday, December 03, 2012 12:34:08 PM Rusty Russell wrote:
Jason Wang jasow...@redhat.com writes:
+static const
On Mon, Dec 03, 2012 at 01:15:01PM +0800, Jason Wang wrote:
+
+ /* Work struct for refilling if we run low on memory. */
+ struct delayed_work refill;
I can't really see the justificaiton for a refill per queue. Just have
one work iterate all the queues if it happens,
From: Dong Aisheng dong.aish...@linaro.org
Add vgic state save and retore via KVM_SET_IRQCHIP/KVM_GET_IRQCHIP.
Signed-off-by: Dong Aisheng dong.aish...@linaro.org
---
The patch is mainly for implementing the vgic state save and retore function.
I'm not sure the current implementation method is
On Mon, Dec 03, 2012 at 02:09:28PM +0800, Jason Wang wrote:
On Sunday, December 02, 2012 06:09:06 PM Michael S. Tsirkin wrote:
On Tue, Nov 27, 2012 at 06:16:00PM +0800, Jason Wang wrote:
This patch implement the {set|get}_channels method of ethool to allow user
to change the number of
On Mon, Dec 03, 2012 at 03:01:03PM +0800, Yang Zhang wrote:
Virtual interrupt delivery avoids KVM to inject vAPIC interrupts
manually, which is fully taken care of by the hardware. This needs
some special awareness into existing interrupr injection path:
- for pending interrupt, instead of
On 3 December 2012 10:36, Dong Aisheng b29...@freescale.com wrote:
The patch is mainly for implementing the vgic state save and retore function.
I'm not sure the current implementation method is the most proper way.
So i'd like to send out the patch for RFC on the direction and issues i met
Thus spake Gleb Natapov g...@redhat.com:
On Thu, Nov 29, 2012 at 03:07:38PM +0100, Julian Stecklina wrote:
Hello,
we have noticed that at least on 3.6.8 with VMX after a VCPU has been
reset via the INIT-SIPI-SIPI sequence its register state violates
Intel's specification.
[...]
Shouldn't
On Fri, Nov 30, 2012 at 09:40:37PM +, Christoffer Dall wrote:
On Mon, Nov 19, 2012 at 10:07 AM, Will Deacon will.dea...@arm.com wrote:
Why are PIPT caches affected by this? The virtual address is irrelevant.
The comment is slightly misleading, and I'll update it. Just so we're
https://bugzilla.kernel.org/show_bug.cgi?id=50891
liyi yiliker...@gmail.com changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|
On 3 December 2012 12:02, Peter Maydell peter.mayd...@linaro.org wrote:
By far the largest part of the save/restore work here is figuring out
what the right state to expose to userspace is so we can retain that
compatibility guarantee.
Some further thoughts on this...
What we're really
Hi Marc,
I've managed to look at some more of the vgic code, so here is some more
feedback. I've still not got to the end of the series, but there's light at
the end of the tunnel...
On Sat, Nov 10, 2012 at 03:45:05PM +, Christoffer Dall wrote:
From: Marc Zyngier marc.zyng...@arm.com
Add
On Sat, Nov 10, 2012 at 03:45:11PM +, Christoffer Dall wrote:
From: Marc Zyngier marc.zyng...@arm.com
An interrupt may have been disabled after being made pending on the
CPU interface (the classic case is a timer running while we're
rebooting the guest - the interrupt would kick as soon
On Sat, Nov 10, 2012 at 03:45:18PM +, Christoffer Dall wrote:
From: Marc Zyngier marc.zyng...@arm.com
Plug the interrupt injection code. Interrupts can now be generated
from user space.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
Signed-off-by: Christoffer Dall
On Sat, Nov 10, 2012 at 03:45:25PM +, Christoffer Dall wrote:
From: Marc Zyngier marc.zyng...@arm.com
Enable the VGIC control interface to be save-restored on world switch.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
Signed-off-by: Christoffer Dall c.d...@virtualopensystems.com
On Tue, Nov 27, 2012 at 02:18:47PM +0200, Gleb Natapov wrote:
Eric, can you ACK it?
Eric, ping.
On Tue, Nov 27, 2012 at 11:26:02AM +0800, Zhang Yanfei wrote:
This patch provides a way to VMCLEAR VMCSs related to guests
on all cpus before executing the VMXOFF when doing kdump. This
is
Floating point initialization is moved to kvm_arch_vcpu_init. Added general
purpose
register clearing to the same function. SVM code now properly initializes
EDX.
Signed-off-by: Julian Stecklina jstec...@os.inf.tu-dresden.de
---
arch/x86/kvm/cpuid.c | 1 +
arch/x86/kvm/svm.c | 7 +--
Thus spake Gleb Natapov g...@redhat.com:
It should, so why not move the fix to kvm_vcpu_reset() so it will work
for both. Also what about R8-R15? Intel SDM says nothing about them in
the section you mention, but in Volume 1 section 3.4.1.1 is says:
[...]
I take it that they are undefined on
On 03/12/12 13:23, Will Deacon wrote:
Hi Marc,
I've managed to look at some more of the vgic code, so here is some more
feedback. I've still not got to the end of the series, but there's light at
the end of the tunnel...
On Sat, Nov 10, 2012 at 03:45:05PM +, Christoffer Dall wrote:
On 03/12/12 13:25, Will Deacon wrote:
On Sat, Nov 10, 2012 at 03:45:18PM +, Christoffer Dall wrote:
From: Marc Zyngier marc.zyng...@arm.com
Plug the interrupt injection code. Interrupts can now be generated
from user space.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
On 03/12/12 13:31, Will Deacon wrote:
On Sat, Nov 10, 2012 at 03:45:25PM +, Christoffer Dall wrote:
From: Marc Zyngier marc.zyng...@arm.com
Enable the VGIC control interface to be save-restored on world switch.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
Signed-off-by: Christoffer
On Mon, Dec 03, 2012 at 02:11:03PM +, Marc Zyngier wrote:
On 03/12/12 13:23, Will Deacon wrote:
+#define VGIC_HCR_EN(1 0)
+#define VGIC_HCR_UIE (1 1)
+
+#define VGIC_LR_VIRTUALID (0x3ff 0)
+#define VGIC_LR_PHYSID_CPUID (7 10)
+#define
[...]
+
+ clear_bit(c, sources);
+ }
+
+ if (!sources)
+ clear_bit(i, pending);
What does this signify and how does it happen? An SGI without a source
sounds pretty weird...
See the clear_bit() just above. Once
[...]
+
+static bool vgic_update_irq_state(struct kvm *kvm, int cpuid,
+ unsigned int irq_num, bool level)
+{
+struct vgic_dist *dist = kvm-arch.vgic;
+struct kvm_vcpu *vcpu;
+int is_edge, is_level, state;
+int enabled;
+bool ret = true;
On Mon, Dec 3, 2012 at 8:06 AM, Will Deacon will.dea...@arm.com wrote:
On Fri, Nov 30, 2012 at 09:40:37PM +, Christoffer Dall wrote:
On Mon, Nov 19, 2012 at 10:07 AM, Will Deacon will.dea...@arm.com wrote:
Why are PIPT caches affected by this? The virtual address is irrelevant.
The
On Mon, Dec 3, 2012 at 5:33 AM, Marc Zyngier marc.zyng...@arm.com wrote:
On 30/11/12 18:49, Christoffer Dall wrote:
On Fri, Nov 30, 2012 at 12:14 PM, Will Deacon will.dea...@arm.com wrote:
On Fri, Nov 30, 2012 at 04:47:40PM +, Christoffer Dall wrote:
On Fri, Nov 30, 2012 at 10:15 AM, Will
On 03/12/12 14:34, Will Deacon wrote:
On Mon, Dec 03, 2012 at 02:11:03PM +, Marc Zyngier wrote:
On 03/12/12 13:23, Will Deacon wrote:
+#define VGIC_HCR_EN(1 0)
+#define VGIC_HCR_UIE (1 1)
+
+#define VGIC_LR_VIRTUALID (0x3ff 0)
+#define VGIC_LR_PHYSID_CPUID
Hi
Please send in any agenda topics you are interested in.
- migration troubles from 1.2 - 1.3 due to qemu-kvm integration
Later, Juan.
--
To unsubscribe from this list: send the line unsubscribe kvm in
the body of a message to majord...@vger.kernel.org
More majordomo info at
On 12/01/2012 07:58:25 AM, Alexander Graf wrote:
In BookE, EPCR is defined and valid when either the HV or the 64bit
category are implemented. Reflect this in the field definition.
Today the only KVM target on 64bit is HV enabled, so there is no
change in actual source code, but this keeps the
These packet counters are used to drive the zercopy
selection heuristic so nothing too bad happens if they are off a bit -
and they are also reset once in a while.
But it's cleaner to clear them when backend is set so that
we start in a known state.
Signed-off-by: Michael S. Tsirkin
On Mon, 2012-12-03 at 13:52 +1100, Alexey Kardashevskiy wrote:
This patch initializes IOMMU groups based on the IOMMU
configuration discovered during the PCI scan on POWERNV
(POWER non virtualized) platform. The IOMMU groups are
to be used later by VFIO driver (PCI pass through).
It also
On 03.12.2012, at 17:47, Scott Wood wrote:
On 12/01/2012 07:58:25 AM, Alexander Graf wrote:
In BookE, EPCR is defined and valid when either the HV or the 64bit
category are implemented. Reflect this in the field definition.
Today the only KVM target on 64bit is HV enabled, so there is no
On Mon, 2012-12-03 at 13:52 +1100, Alexey Kardashevskiy wrote:
VFIO implements platform independent stuff such as
a PCI driver, BAR access (via read/write on a file descriptor
or direct mapping when possible) and IRQ signaling.
The platform dependent part includes IOMMU initialization
and
From: Michael S. Tsirkin m...@redhat.com
Date: Mon, 3 Dec 2012 19:31:51 +0200
These packet counters are used to drive the zercopy
selection heuristic so nothing too bad happens if they are off a bit -
and they are also reset once in a while.
But it's cleaner to clear them when backend is set
On Mon, Dec 3, 2012 at 6:05 AM, Will Deacon will.dea...@arm.com wrote:
On Fri, Nov 30, 2012 at 08:22:28PM +, Christoffer Dall wrote:
On Mon, Nov 19, 2012 at 10:01 AM, Will Deacon will.dea...@arm.com wrote:
On Sat, Nov 10, 2012 at 03:43:13PM +, Christoffer Dall wrote:
This should
On Mon, Dec 3, 2012 at 9:21 AM, Marc Zyngier marc.zyng...@arm.com wrote:
On 03/12/12 13:25, Will Deacon wrote:
On Sat, Nov 10, 2012 at 03:45:18PM +, Christoffer Dall wrote:
From: Marc Zyngier marc.zyng...@arm.com
Plug the interrupt injection code. Interrupts can now be generated
from
On 03/12/12 19:13, Christoffer Dall wrote:
On Mon, Dec 3, 2012 at 9:21 AM, Marc Zyngier marc.zyng...@arm.com wrote:
On 03/12/12 13:25, Will Deacon wrote:
On Sat, Nov 10, 2012 at 03:45:18PM +, Christoffer Dall wrote:
From: Marc Zyngier marc.zyng...@arm.com
Plug the interrupt injection
On Mon, Dec 03, 2012 at 04:33:01PM +0800, Xiao Guangrong wrote:
Hi Marcelo,
Thanks for your patience. I was reading your reply over and over again, i
would
like to argue it more :).
Please see below.
On 11/29/2012 08:21 AM, Marcelo Tosatti wrote:
On Wed, Nov 28, 2012 at 10:40:56AM +0530, Raghavendra K T wrote:
On 11/28/2012 06:42 AM, Marcelo Tosatti wrote:
Don't understand the reasoning behind why 3 is a good choice.
Here is where I came from. (explaining from scratch for
completeness, forgive me :))
In moderate overcommits, we
On Mon, Dec 03, 2012 at 12:36:33PM +0400, Glauber Costa wrote:
On 11/30/2012 09:55 PM, Pavel Emelyanov wrote:
Hello,
This is an attempt to implement support for memory snapshot for the the
checkpoint-restore project (http://criu.org).
To create a dump of an application(s) we save
There are two cases we need to adjust page size in set_spte:
1): the one is other vcpu creates new sp in the window between mapping_level()
and acquiring mmu-lock.
2): the another case is the new sp is created by itself (page-fault path) when
guest uses the target gfn as its page table.
struct kvm_memory_slot is currently 52 bytes (LP64), not counting the
arch data. On x86 this means the memslot array to support a tiny 32+3
entries (user+private) is over 2k. We'd like to support more slots
so that we can support more assigned devices, but it doesn't make
sense to penalize
Start with zero and grow up to KVM_MEM_SLOTS_NUM. A modest guest
without device assignment likely uses around 1/4 of the total
entries. We don't attempt to shrink the array when slots are
released. Both x86 and powerpc still have some statically sized
elements elsewhere, but this covers the
Memory slots are currently a fixed resource with a relatively small
limit. When using PCI device assignment in a qemu guest it's fairly
easy to exhaust the number of available slots. I posted patches
exploring growing the number of memory slots a while ago, but it was
prior to caching memory
It's easy to confuse KVM_MEMORY_SLOTS and KVM_MEM_SLOTS_NUM. One is
the user accessible slots and the other is user + private. Make this
more obvious.
Signed-off-by: Alex Williamson alex.william...@redhat.com
---
arch/ia64/include/asm/kvm_host.h|2 +-
arch/ia64/kvm/kvm-ia64.c
Seems like everyone copied x86 and defined 4 private memory slots
that never actually get used. Even x86 only uses 3 of the 4. These
aren't exposed so there's no need to add padding.
Signed-off-by: Alex Williamson alex.william...@redhat.com
---
arch/ia64/include/asm/kvm_host.h|2 --
This allows us to resize this structure and therefore the number of
memslots as part of the RCU update.
Signed-off-by: Alex Williamson alex.william...@redhat.com
---
include/linux/kvm_host.h |5 ++---
virt/kvm/kvm_main.c |4 ++--
2 files changed, 4 insertions(+), 5 deletions(-)
In order to make the memslots array grow on demand, move the private
slots to the lower indexes of the array. The private slots are
assumed likely to be in use, so if we didn't do this we'd end up
allocating the full memslots array all the time.
Signed-off-by: Alex Williamson
On Mon, 2012-12-03 at 13:25 +0200, Michael S. Tsirkin wrote:
On Mon, Dec 03, 2012 at 02:09:28PM +0800, Jason Wang wrote:
On Sunday, December 02, 2012 06:09:06 PM Michael S. Tsirkin wrote:
On Tue, Nov 27, 2012 at 06:16:00PM +0800, Jason Wang wrote:
This patch implement the
Peter Maydell peter.mayd...@linaro.org writes:
On 3 December 2012 10:36, Dong Aisheng b29...@freescale.com wrote:
and via current ONE_REG interface we do not know which CPU
is performing the register access, so the banked registers are not
suppported well,
Actually you do, because it's a
The cpu inject the interrupt to vcpu which vcpu-cpu is the same as it.
And it maybe avoid a IPI between the cpu core.
Signed-off-by: Yi Li yiliker...@gmail.com
--- linux/virt/kvm/irq_comm.c 2012-12-04 10:14:57.711024619 +0800
+++ linux/virt/kvm/irq_comm.c 2012-12-04
Jason Wang jasow...@redhat.com writes:
On Monday, December 03, 2012 12:25:42 PM Rusty Russell wrote:
+
+ /* Work struct for refilling if we run low on memory. */
+ struct delayed_work refill;
I can't really see the justificaiton for a refill per queue. Just have
one work iterate all
Maybe the patch have a risk to break the process of lapic.just avoid
a IPI between the cpu core asap.
Thanks
YiLi
2012/12/4 yi li yiliker...@gmail.com:
The cpu inject the interrupt to vcpu which vcpu-cpu is the same as it.
And it maybe avoid a IPI between the cpu core.
Gleb Natapov wrote on 2012-12-03:
On Mon, Dec 03, 2012 at 03:01:01PM +0800, Yang Zhang wrote:
When PIT connects to IOAPIC, it route to pin 2 not pin 0.
This hack didn't work for a long time and nobody complained. It
should be safe to get rid of it.
This hack is used to work around an issue
From: Zhang Xiantao xiantao.zh...@intel.com
This two bits{bit 6 in exit_qualification, and bit 24 in VMX_EPT_VPID_CAP_MSR}
are not available in SDM, remove them for consistence.
Zhang Xiantao (2):
kvm: remove unnecessary bit checking for ept violation
kvm: don't use bit24 for detecting
From: Zhang Xiantao xiantao.zh...@intel.com
Bit 6 in EPT vmexit's exit qualification is not defined in SDM, so remove it.
Signed-off-by: Zhang Xiantao xiantao.zh...@intel.com
---
arch/x86/kvm/vmx.c |5 -
1 files changed, 0 insertions(+), 5 deletions(-)
diff --git a/arch/x86/kvm/vmx.c
From: Zhang Xiantao xiantao.zh...@intel.com
Bit24 in VMX_EPT_VPID_CAP_MASI is not used for address-specific invalidation
capability
reporting, so remove it from KVM to avoid conflicts in future.
Signed-off-by: Zhang Xiantao xiantao.zh...@intel.com
---
arch/x86/include/asm/vmx.h |3 +--
Gleb Natapov wrote on 2012-12-03:
On Mon, Dec 03, 2012 at 03:01:03PM +0800, Yang Zhang wrote:
Virtual interrupt delivery avoids KVM to inject vAPIC interrupts
manually, which is fully taken care of by the hardware. This needs
some special awareness into existing interrupr injection path:
-
On Mon, Dec 03, 2012 at 06:30:49PM +0800, Jason Wang wrote:
On 12/03/2012 06:14 PM, Michael S. Tsirkin wrote:
On Tue, Nov 27, 2012 at 06:15:59PM +0800, Jason Wang wrote:
-if (!try_fill_recv(vi-rq, GFP_KERNEL))
-schedule_delayed_work(vi-rq.refill, 0);
+
On 12/04/2012 12:16 AM, Marcelo Tosatti wrote:
On Mon, Dec 03, 2012 at 12:36:33PM +0400, Glauber Costa wrote:
On 11/30/2012 09:55 PM, Pavel Emelyanov wrote:
Hello,
This is an attempt to implement support for memory snapshot for the the
checkpoint-restore project (http://criu.org).
To
On 12/01/2012 07:58:25 AM, Alexander Graf wrote:
In BookE, EPCR is defined and valid when either the HV or the 64bit
category are implemented. Reflect this in the field definition.
Today the only KVM target on 64bit is HV enabled, so there is no
change in actual source code, but this keeps the
On 03.12.2012, at 17:47, Scott Wood wrote:
On 12/01/2012 07:58:25 AM, Alexander Graf wrote:
In BookE, EPCR is defined and valid when either the HV or the 64bit
category are implemented. Reflect this in the field definition.
Today the only KVM target on 64bit is HV enabled, so there is no
73 matches
Mail list logo
