Re: [PATCH 1/6] KVM: PPC: Book3S PR: Ignore PMU SPRs

2014-05-02 Thread Alexander Graf
On 05/01/2014 12:12 AM, Paul Mackerras wrote: On Tue, Apr 29, 2014 at 06:17:37PM +0200, Alexander Graf wrote: When we expose a POWER8 CPU into the guest, it will start accessing PMU SPRs that we don't emulate. Just ignore accesses to them. Signed-off-by: Alexander Graf ag...@suse.de This

Re: [PATCH/RFC 00/11] perf/s390/kvm: trace events, perf kvm stat

2014-05-02 Thread Jiri Olsa
On Fri, Apr 25, 2014 at 11:12:22AM +0200, Christian Borntraeger wrote: The goal of this series is to - enable perf kvm stat on s390 - get rid of a perf warning insn_to_mnemonic not found when it tries to decode s390 perf trace events perf tools changes look good to me Review feedback is

Re: [PATCH v2 1/4] KVM: PPC: e500mc: Revert add load inst fixup

2014-05-02 Thread Alexander Graf
On 05/01/2014 02:45 AM, Mihai Caraman wrote: The commit 1d628af7 add load inst fixup made an attempt to handle failures generated by reading the guest current instruction. The fixup code that was added works by chance hiding the real issue. Load external pid (lwepx) instruction, used by KVM to

Re: KVM Nested L2 guest startup problems

2014-05-02 Thread Paolo Bonzini
Il 02/05/2014 03:43, Hu Yaohui ha scritto: Hi all, I have a problem running the latest version of kvm with nested configuration. I used to run it with kernel 3.2.2 both for L0 and L1, which works perfectly. When I change my L0 to kernel 3.10.36, L1 to kernel 3.12.10. When I start L2 guest in L1

Re: [PATCH v2 3/4] KVM: PPC: Alow kvmppc_get_last_inst() to fail

2014-05-02 Thread Alexander Graf
On 05/01/2014 02:45 AM, Mihai Caraman wrote: On book3e, guest last instruction was read on the exist path using load external pid (lwepx) dedicated instruction. lwepx failures have to be handled by KVM and this would require additional checks in DO_KVM hooks (beside MSR[GS] = 1). However extra

Re: [PATCH v2 4/4] KVM: PPC: Bookehv: Get vcpu's last instruction for emulation

2014-05-02 Thread Alexander Graf
On 05/01/2014 02:45 AM, Mihai Caraman wrote: On bookehv vcpu's last instruction is read using load external pid (lwepx) instruction. lwepx exceptions (DTLB_MISS, DSI and LRAT) need to be handled by KVM. These exceptions originate from host state (MSR[GS] = 0) which implies additional checks in

RE: [PATCH v2 4/4] KVM: PPC: Bookehv: Get vcpu's last instruction for emulation

2014-05-02 Thread David Laight
From: Alexander Graf ... + page = pfn_to_page(pfn); + eaddr = (unsigned long)kmap_atomic(page); + eaddr |= addr ~PAGE_MASK; + *instr = *(u32 *)eaddr; + kunmap_atomic((u32 *)eaddr); I think I'd rather write this as *instr = *(u32 *)(eaddr | (addr ~PAGE));

Re: [PATCH v2 4/4] KVM: PPC: Bookehv: Get vcpu's last instruction for emulation

2014-05-02 Thread Alexander Graf
On 05/02/2014 12:12 PM, David Laight wrote: From: Alexander Graf ... + page = pfn_to_page(pfn); + eaddr = (unsigned long)kmap_atomic(page); + eaddr |= addr ~PAGE_MASK; + *instr = *(u32 *)eaddr; + kunmap_atomic((u32 *)eaddr); I think I'd rather write this as

[GIT PULL] KVM changes for 3.15-rc4

2014-05-02 Thread Paolo Bonzini
Linus, The following changes since commit 0f689a33ad17845363acdc6d52783befd6ad116c: Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux (2014-04-16 11:28:25 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/virt/kvm/kvm.git

Re: KVM Nested L2 guest startup problems

2014-05-02 Thread Hu Yaohui
Hi Paolo, I have tried L0 with linux kernel 3.14.2 and L1 with linux kernel 3.14.2 L1 QEMU qemu-1.7.0 L2 QEMU qemu-1.7.0. I still get the same error when running qemu in L1 guest. log KVM: entry failed, hardware error 0x0 EAX= EBX= ECX= EDX=0f61 ESI=

Re: [PATCH v2 4/4] KVM: PPC: Bookehv: Get vcpu's last instruction for emulation

2014-05-02 Thread Scott Wood
On Fri, 2014-05-02 at 13:10 +0200, Alexander Graf wrote: On 05/02/2014 12:12 PM, David Laight wrote: You also probably want the page mapped uncached - no point polluting the data cache. We can't do that without creating an architecturally illegal alias between cacheable and non-cacheable

[PATCH 1/1] KVM: x86: improve the usability of the 'kvm_pio' tracepoint

2014-05-02 Thread Ulrich Obergfell
This patch moves the 'kvm_pio' tracepoint to emulator_pio_in_emulated() and emulator_pio_out_emulated(), and it adds an argument (a pointer to the 'pio_data'). A single 8-bit or 16-bit or 32-bit data item is fetched from 'pio_data' (depending on 'size'), and the value is included in the trace

Re: KVM Nested L2 guest startup problems

2014-05-02 Thread Paolo Bonzini
Il 02/05/2014 17:17, Hu Yaohui ha scritto: Hi Paolo, I have tried L0 with linux kernel 3.14.2 and L1 with linux kernel 3.14.2 L1 QEMU qemu-1.7.0 L2 QEMU qemu-1.7.0. Do you mean L0 and L1? What is your QEMU command line, and what is the processor? Also, what guest you are running? Paolo

[PATCH 0/1] KVM: x86: improve the usability of the 'kvm_pio' tracepoint

2014-05-02 Thread Ulrich Obergfell
The current implementation of the 'kvm_pio' tracepoint in emulator_pio_in_out() only tells us that 'something' has been read from or written to an I/O port. To improve the usability of the tracepoint, I propose to include the value/content that has been read or written in the trace output. The

[PATCH 3.13 077/151] MIPS: KVM: Pass reserved instruction exceptions to guest

2014-05-02 Thread Kamal Mostafa
3.13.11.1 -stable review patch. If anyone has any objections, please let me know. -- From: James Hogan james.ho...@imgtec.com commit 15505679362270d02c449626385cb74af8905514 upstream. Previously a reserved instruction exception while in guest code would cause a KVM internal

No-downtime ROM upgrades

2014-05-02 Thread Andrey Korolyov
Hello, As it shows up, upgrading of any system ROMs loaded to the emulator initially is not possible without complete restart of the emulator itself, as live migration refuses to complete with different payload at both ends. Assuming that the guest side payload for vga/ethernet can be actually

Re: KVM Nested L2 guest startup problems

2014-05-02 Thread Hu Yaohui
On Fri, May 2, 2014 at 11:52 AM, Paolo Bonzini pbonz...@redhat.com wrote: Il 02/05/2014 17:17, Hu Yaohui ha scritto: Hi Paolo, I have tried L0 with linux kernel 3.14.2 and L1 with linux kernel 3.14.2 L1 QEMU qemu-1.7.0 L2 QEMU qemu-1.7.0. Do you mean L0 and L1? Yes. What is your QEMU

Re: [RFC PATCH v5 11/11] VFIO_PLATFORM: Support for maskable and automasked interrupts

2014-05-02 Thread Antonios Motakis
On Mon, Apr 28, 2014 at 7:46 PM, Alex Williamson alex.william...@redhat.com wrote: On Mon, 2014-04-28 at 17:52 +0200, Antonios Motakis wrote: Adds support to mask interrupts, and also for automasked interrupts. Level sensitive interrupts are exposed as automasked interrupts and are masked

Re: [PATCH/RFC 00/11] perf/s390/kvm: trace events, perf kvm stat

2014-05-02 Thread David Ahern
On 5/2/14, 3:16 AM, Jiri Olsa wrote: On Fri, Apr 25, 2014 at 11:12:22AM +0200, Christian Borntraeger wrote: The goal of this series is to - enable perf kvm stat on s390 - get rid of a perf warning insn_to_mnemonic not found when it tries to decode s390 perf trace events perf tools changes

Re: KVM Nested L2 guest startup problems

2014-05-02 Thread Bandan Das
Hu Yaohui loki2...@gmail.com writes: On Fri, May 2, 2014 at 11:52 AM, Paolo Bonzini pbonz...@redhat.com wrote: Il 02/05/2014 17:17, Hu Yaohui ha scritto: Hi Paolo, I have tried L0 with linux kernel 3.14.2 and L1 with linux kernel 3.14.2 L1 QEMU qemu-1.7.0 L2 QEMU qemu-1.7.0. Do you mean

Re: KVM Nested L2 guest startup problems

2014-05-02 Thread Hu Yaohui
On Fri, May 2, 2014 at 2:39 PM, Bandan Das b...@redhat.com wrote: Hu Yaohui loki2...@gmail.com writes: On Fri, May 2, 2014 at 11:52 AM, Paolo Bonzini pbonz...@redhat.com wrote: Il 02/05/2014 17:17, Hu Yaohui ha scritto: Hi Paolo, I have tried L0 with linux kernel 3.14.2 and L1 with linux

Warning: Security Alert

2014-05-02 Thread Fototeca Alinari
This Message is From Helpdesk. Due to our latest IP Security upgrades we have reason to believe that your webmail account was accessed by a third party. Protecting the security of your webmail account is our primary concern, we have limited access to sensitive webmail account features.Failure

[Bug 75331] New: soft lockup CPU#0 stuck for 23s regression on 32bit 3.13.0+ kernels.

2014-05-02 Thread bugzilla-daemon
https://bugzilla.kernel.org/show_bug.cgi?id=75331 Bug ID: 75331 Summary: soft lockup CPU#0 stuck for 23s regression on 32bit 3.13.0+ kernels. Product: Virtualization Version: unspecified Kernel Version: 3.13.0+

[Bug 75331] soft lockup CPU#0 stuck for 23s regression on 32bit 3.13.0+ kernels.

2014-05-02 Thread bugzilla-daemon
https://bugzilla.kernel.org/show_bug.cgi?id=75331 Ivan Kalvachev i...@yahoo.com changed: What|Removed |Added CC||i...@yahoo.com

RE: [PATCH v2 1/4] KVM: PPC: e500mc: Revert add load inst fixup

2014-05-02 Thread mihai.cara...@freescale.com
From: Alexander Graf ag...@suse.de Sent: Friday, May 2, 2014 12:24 PM To: Caraman Mihai Claudiu-B02008 Cc: kvm-...@vger.kernel.org; kvm@vger.kernel.org; linuxppc-...@lists.ozlabs.org Subject: Re: [PATCH v2 1/4] KVM: PPC: e500mc: Revert add load inst fixup On 05/01/2014 02:45 AM, Mihai

Re

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Re: [PATCH 1/6] KVM: PPC: Book3S PR: Ignore PMU SPRs

2014-05-02 Thread Alexander Graf
On 05/01/2014 12:12 AM, Paul Mackerras wrote: On Tue, Apr 29, 2014 at 06:17:37PM +0200, Alexander Graf wrote: When we expose a POWER8 CPU into the guest, it will start accessing PMU SPRs that we don't emulate. Just ignore accesses to them. Signed-off-by: Alexander Graf ag...@suse.de This

Re: [PATCH v2 1/4] KVM: PPC: e500mc: Revert add load inst fixup

2014-05-02 Thread Alexander Graf
On 05/01/2014 02:45 AM, Mihai Caraman wrote: The commit 1d628af7 add load inst fixup made an attempt to handle failures generated by reading the guest current instruction. The fixup code that was added works by chance hiding the real issue. Load external pid (lwepx) instruction, used by KVM to

Re: [PATCH v2 3/4] KVM: PPC: Alow kvmppc_get_last_inst() to fail

2014-05-02 Thread Alexander Graf
On 05/01/2014 02:45 AM, Mihai Caraman wrote: On book3e, guest last instruction was read on the exist path using load external pid (lwepx) dedicated instruction. lwepx failures have to be handled by KVM and this would require additional checks in DO_KVM hooks (beside MSR[GS] = 1). However extra

Re: [PATCH v2 4/4] KVM: PPC: Bookehv: Get vcpu's last instruction for emulation

2014-05-02 Thread Alexander Graf
On 05/01/2014 02:45 AM, Mihai Caraman wrote: On bookehv vcpu's last instruction is read using load external pid (lwepx) instruction. lwepx exceptions (DTLB_MISS, DSI and LRAT) need to be handled by KVM. These exceptions originate from host state (MSR[GS] = 0) which implies additional checks in

RE: [PATCH v2 4/4] KVM: PPC: Bookehv: Get vcpu's last instruction for emulation

2014-05-02 Thread David Laight
From: Alexander Graf ... + page = pfn_to_page(pfn); + eaddr = (unsigned long)kmap_atomic(page); + eaddr |= addr ~PAGE_MASK; + *instr = *(u32 *)eaddr; + kunmap_atomic((u32 *)eaddr); I think I'd rather write this as *instr = *(u32 *)(eaddr | (addr ~PAGE));

Re: [PATCH v2 4/4] KVM: PPC: Bookehv: Get vcpu's last instruction for emulation

2014-05-02 Thread Scott Wood
On Fri, 2014-05-02 at 13:10 +0200, Alexander Graf wrote: On 05/02/2014 12:12 PM, David Laight wrote: You also probably want the page mapped uncached - no point polluting the data cache. We can't do that without creating an architecturally illegal alias between cacheable and non-cacheable

RE: [PATCH v2 1/4] KVM: PPC: e500mc: Revert add load inst fixup

2014-05-02 Thread mihai.cara...@freescale.com
From: Alexander Graf ag...@suse.de Sent: Friday, May 2, 2014 12:24 PM To: Caraman Mihai Claudiu-B02008 Cc: kvm-ppc@vger.kernel.org; k...@vger.kernel.org; linuxppc-...@lists.ozlabs.org Subject: Re: [PATCH v2 1/4] KVM: PPC: e500mc: Revert add load inst fixup On 05/01/2014 02:45 AM, Mihai