Hello,
Using this Qemu patchset as well as recent irqfd work, I’ve tried to make
vhost-net working on Cortex-A15.
Unfortunately, even if I can correctly generate irqs to the guest through
irqfd, it seems to me that some pieces are still missing….
Indeed, virtio mmio interrupt status register
https://bugzilla.kernel.org/show_bug.cgi?id=86161
GC Ngu ng...@qq.com changed:
What|Removed |Added
Summary|PROBLEM: On KVM, Windows 7 |On KVM, Windows 7 32bit
Hi folks,
I run kernel build in the guest and use perf kvm to get some VM-Exit result as
the following:
Analyze events for all VCPUs:
VM-EXITSamples Samples% Time% Min Time Max Time
A
MSR_WRITE361390857.53%18.97%5us 1362us
Correct the typo in the subject.
-Original Message-
From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org] On
Behalf Of Wu, Feng
Sent: Thursday, October 16, 2014 4:16 PM
To: kvm@vger.kernel.org
Cc: Xiao Guangrong
Subject: A question about HTL VM-Exit handling time
Hi
Hi Victor,
On Thu, Oct 16, 2014 at 1:54 AM, Victor Kamensky
victor.kamen...@linaro.org wrote:
On 14 October 2014 08:21, Victor Kamensky victor.kamen...@linaro.org wrote:
On 14 October 2014 02:47, Marc Zyngier marc.zyng...@arm.com wrote:
On Sun, Sep 28 2014 at 03:04:26 PM, Christoffer Dall
This patch introduced the API to return device tree info about
a PLATFORM device (if described by a device tree) and the skeleton
of the implementation for VFIO_PLATFORM. Information about any device
node bound by VFIO_PLATFORM should be queried via the introduced ioctl
Certain properties of a device tree node are accessible as an array
of unsigned integers, either u32, u16, or u8. Let the VFIO user query
this type of device node properties. Accessing u64 arrays is not yet
implemented in this RFC.
Signed-off-by: Antonios Motakis a.mota...@virtualopensystems.com
The available properties of a device are not indexed numerically,
instead they are accessible by property name.
Passing type = VFIO_DEVTREE_PROP_LIST to VFIO_DEVICE_GET_DEVTREE_INFO,
returns a list of strings with the available properties that the VFIO
user can access.
Signed-off-by: Antonios
Certain device tree properties (e.g. the device node name, the compatible
string), are available as a list of strings (separated by the null
terminating character). Let the VFIO user query this type of properties.
Signed-off-by: Antonios Motakis a.mota...@virtualopensystems.com
---
This patch adds the necessary XEN specific code to allow XEN to
support the CPU halting and kicking operations needed by the queue
spinlock PV code.
Signed-off-by: Waiman Long waiman.l...@hp.com
---
arch/x86/xen/spinlock.c | 149 +--
This patch adds the necessary KVM specific code to allow KVM to
support the CPU halting and kicking operations needed by the queue
spinlock PV code.
Two KVM guests of 20 CPU cores (2 nodes) were created for performance
testing in one of the following three configurations:
1) Only 1 VM is active
This patch adds para-virtualization support to the queue spinlock
code base with minimal impact to the native case. There are some
minor code changes in the generic qspinlock.c file which should be
usable in other architectures. The other code changes are specific
to x86 processors and so are all
This patch renames the paravirt_ticketlocks_enabled static key to a
more generic paravirt_spinlocks_enabled name.
Signed-off-by: Waiman Long waiman.l...@hp.com
Signed-off-by: Peter Zijlstra pet...@infradead.org
---
arch/x86/include/asm/spinlock.h |4 ++--
arch/x86/kernel/kvm.c
From: Peter Zijlstra pet...@infradead.org
When we detect a hypervisor (!paravirt, see qspinlock paravirt support
patches), revert to a simple test-and-set lock to avoid the horrors
of queue preemption.
Signed-off-by: Peter Zijlstra pet...@infradead.org
Signed-off-by: Waiman Long
Currently, atomic_cmpxchg() is used to get the lock. However, this
is not really necessary if there is more than one task in the queue
and the queue head don't need to reset the tail code. For that case,
a simple write to set the lock bit is enough as the queue head will
be the only one eligible
From: Peter Zijlstra pet...@infradead.org
When we allow for a max NR_CPUS 2^14 we can optimize the pending
wait-acquire and the xchg_tail() operations.
By growing the pending bit to a byte, we reduce the tail to 16bit.
This means we can use xchg16 for the tail part and do away with all
the
This patch makes the necessary changes at the x86 architecture
specific layer to enable the use of queue spinlock for x86-64. As
x86-32 machines are typically not multi-socket. The benefit of queue
spinlock may not be apparent. So queue spinlock is not enabled.
Currently, there is some
This patch introduces a new generic queue spinlock implementation that
can serve as an alternative to the default ticket spinlock. Compared
with the ticket spinlock, this queue spinlock should be almost as fair
as the ticket spinlock. It has about the same speed in single-thread
and it can be much
This is a preparatory patch that extracts out the following 2 code
snippets to prepare for the next performance optimization patch.
1) the logic for the exchange of new and previous tail code words
into a new xchg_tail() function.
2) the logic for clearing the pending bit and setting the
From: Peter Zijlstra pet...@infradead.org
Because the qspinlock needs to touch a second cacheline (the per-cpu
mcs_nodes[]); add a pending bit and allow a single in-word spinner
before we punt to the second cacheline.
It is possible so observe the pending bit without the locked bit when
the last
v11-v12:
- Based on PeterZ's version of the qspinlock patch
(https://lkml.org/lkml/2014/6/15/63).
- Incorporated many of the review comments from Konrad Wilk and
Paolo Bonzini.
- The pvqspinlock code is largely from my previous version with
PeterZ's way of going from queue tail to head
On 10/15/2014 01:40 PM, Rusty Russell wrote:
Jason Wang jasow...@redhat.com writes:
Below should be useful for some experiments Jason is doing.
I thought I'd send it out for early review/feedback.
event idx feature allows us to defer interrupts until
a specific # of descriptors were used.
To enter guest, primary hwtherad schedules the stopper func on
secondary threads and force them into NAP mode.
When exit to host,secondary threads hardcode to restore the stack,
then switch back to the stopper func, i.e host.
Signed-off-by: Liu Ping Fan pingf...@linux.vnet.ibm.com
---
(This is a place holder patch.)
We need to store the time base for host on secondary hwthread.
Later when switching back, we need to reprogram it with elapse
time.
Signed-off-by: Liu Ping Fan pingf...@linux.vnet.ibm.com
---
arch/powerpc/kvm/book3s_hv_rmhandlers.S | 6 ++
1 file changed, 6
The proto will be:
cpu1 cpuX
stop_cpus_async()
bring cpuX to a special state
signal flag and trapped
check for flag
The func help powerpc to reuse the scheme of cpu_stopper_task
to force the
When kvm is enabled on a core, we migrate all external irq to primary
thread. Since currently, the kvmirq logic is handled by the primary
hwthread.
Todo: this patch lacks re-enable of irqbalance when kvm is disable on
the core
Signed-off-by: Liu Ping Fan pingf...@linux.vnet.ibm.com
---
(This patch is a place holder.)
If there is only one vcpu thread is ready(the other vcpu thread can
wait for it to execute), the primary thread can enter tickless mode,
which causes the primary keeps running, so the secondary has no
opportunity to exit to host, even they have other tsk on them.
Signed-off-by: Liu Ping Fan pingf...@linux.vnet.ibm.com
---
arch/powerpc/kvm/Kconfig | 4
1 file changed, 4 insertions(+)
diff --git a/arch/powerpc/kvm/Kconfig b/arch/powerpc/kvm/Kconfig
index 602eb51..de38566 100644
--- a/arch/powerpc/kvm/Kconfig
+++ b/arch/powerpc/kvm/Kconfig
@@ -93,6
Nowadays, powerKVM runs with secondary hwthread offline. Although
we can make all secondary hwthread online later, we still preserve
this behavior for dedicated KVM env. Achieve this by setting
paca-online as false.
Signed-off-by: Liu Ping Fan pingf...@linux.vnet.ibm.com
---
The secondary thread can only jump back to host until primary has set
up the env. Add host_ready field in kvm_vcore to sync this action.
Signed-off-by: Liu Ping Fan pingf...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/kvm_host.h | 3 +++
arch/powerpc/kernel/asm-offsets.c | 3 +++
When vcpu thread runs at the first time, it will ensure to stick
to the primary thread.
Signed-off-by: Liu Ping Fan pingf...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/kvm_host.h | 3 +++
arch/powerpc/kvm/book3s_hv.c| 17 +
2 files changed, 20 insertions(+)
diff
The primary hwthread ceases the scheduler of secondary hwthread by
bringing them into NAP. Then, the secondary is ready for guest.
Signed-off-by: Liu Ping Fan pingf...@linux.vnet.ibm.com
---
arch/powerpc/kvm/book3s_hv.c | 7 +++
1 file changed, 7 insertions(+)
diff --git
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