On 08/07/15 12:38, Paolo Bonzini wrote:
On 07/08/2015 01:02, Laszlo Ersek wrote:
The trace covers the full lifetime of the guest (I started tracing
before launching the guest, and I passed -no-reboot to qemu, so when the
guest crashed, QEMU exited.)
This was on 3.10.0-299.el7.x86_64.
I
On 07/08/2015 15:47, Nicholas Krause wrote:
- kvm_set_irq_routing(opp-kvm, routing, 0, 0);
+ ret = kvm_set_irq_routing(opp-kvm, routing, 0, 0);
+ if (ret) {
+ kfree(routing);
+ return ret;
+ }
kfree(routing);
return 0;
You could
On 07/08/2015 15:47, Nicholas Krause wrote:
- kvm_set_irq_routing(opp-kvm, routing, 0, 0);
+ ret = kvm_set_irq_routing(opp-kvm, routing, 0, 0);
+ if (ret) {
+ kfree(routing);
+ return ret;
+ }
kfree(routing);
return 0;
You could
According to AMD programmer's manual, AMD PERFCTRn is 64-bit MSR which,
unlike Intel perf counters, doesn't require signed extension. This
patch removes the unnecessary conversion in SVM vPMU code when PERFCTRn
is being updated.
Signed-off-by: Wei Huang w...@redhat.com
---
arch/x86/kvm/pmu_amd.c
-Original Message-
From: Paolo Bonzini [mailto:paolo.bonz...@gmail.com] On Behalf Of Paolo
Bonzini
Sent: Friday, August 07, 2015 6:17 PM
To: Wu, Feng; linux-ker...@vger.kernel.org; kvm@vger.kernel.org
Cc: Steve Rutherford; rkrc...@redhat.com
Subject: Re: [PATCH 8/9] KVM: x86: Add
-Original Message-
From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org] On
Behalf Of Paolo Bonzini
Sent: Wednesday, August 05, 2015 11:24 PM
To: linux-ker...@vger.kernel.org; kvm@vger.kernel.org
Cc: Steve Rutherford; rkrc...@redhat.com
Subject: [PATCH 8/9] KVM: x86:
On 07/08/15 08:05, Eric Auger wrote:
Hi Marc,
On 08/06/2015 06:44 PM, Marc Zyngier wrote:
On 05/08/15 14:47, Christoffer Dall wrote:
On Wed, Aug 05, 2015 at 01:47:27PM +0200, Eric Auger wrote:
On 08/05/2015 12:53 PM, Christoffer Dall wrote:
On Wed, Aug 05, 2015 at 10:44:09AM +0100, Marc
Am 06.08.2015 um 19:05 schrieb Nicholas Krause:
This fixes the assumption that kvm_set_irq_routing is always run
successfully by instead making it equal to the variable r which
we use for returning in the function kvm_arch_vm_ioctl instead
of making r equal to zero when calling this particular
Hi Marc,
On 08/06/2015 06:44 PM, Marc Zyngier wrote:
On 05/08/15 14:47, Christoffer Dall wrote:
On Wed, Aug 05, 2015 at 01:47:27PM +0200, Eric Auger wrote:
On 08/05/2015 12:53 PM, Christoffer Dall wrote:
On Wed, Aug 05, 2015 at 10:44:09AM +0100, Marc Zyngier wrote:
On 05/08/15 08:32, Eric
On 07/08/2015 07:43, Wu, Feng wrote:
+#ifdef CONFIG_HAVE_KVM_IRQCHIP
+struct kvm_irq_routing_table {
+ int chip[KVM_NR_IRQCHIPS][KVM_IRQCHIP_NUM_PINS];
+ struct kvm_kernel_irq_routing_entry *rt_entries;
This filed doesn't exist anymore. In fact, this changes is also in my
VT-d PI
On Thu, Aug 06, 2015 at 07:29:00PM +0100, Alex Bennée wrote:
Andrew Jones drjo...@redhat.com writes:
Inspired by a patch by Alex Bennée. This version uses a new
unittests.cfg variable and includes support for DRYRUN.
Signed-off-by: Andrew Jones drjo...@redhat.com
---
Another
On Thu, Aug 06, 2015 at 10:10:23PM -0400, Nicholas Krause wrote:
This fixes error checking in the function pf_interception by
checking if the call to kvm_mmu_unprotect_page_virt returns
zero to indicate the function has failed internally and if
this occurs we must return immediately to the
On 06/08/2015 16:13, Nicholas Krause wrote:
This fixes the calls to x86_memory_region to trigger a kernel
oopes for tracing if a bug arises in the function kvm_arch_destroy
due to the failing of any of its internal calls to x86_set_memory_region.
Signed-off-by: Nicholas Krause
On 06/08/2015 19:05, Nicholas Krause wrote:
This fixes the assumption that kvm_set_irq_routing is always run
successfully by instead making it equal to the variable r which
we use for returning in the function kvm_arch_vm_ioctl instead
of making r equal to zero when calling this particular
The recent BlackHat 2015 presentation The Memory Sinkhole
mentions that the IDT limit is zeroed on entry to SMM.
This is not documented, and must have changed some time after 2010
(see http://www.ssi.gouv.fr/uploads/IMG/pdf/IT_Defense_2010_final.pdf).
KVM was not doing it, but the fix is easy.
On 06/08/2015 19:13, Nicholas Krause wrote:
diff --git a/arch/powerpc/kvm/mpic.c b/arch/powerpc/kvm/mpic.c
index 6249cdc..5a18859 100644
--- a/arch/powerpc/kvm/mpic.c
+++ b/arch/powerpc/kvm/mpic.c
@@ -1641,13 +1641,16 @@ static void mpic_destroy(struct kvm_device *dev)
static int
On 06/08/2015 19:13, Nicholas Krause wrote:
diff --git a/arch/powerpc/kvm/mpic.c b/arch/powerpc/kvm/mpic.c
index 6249cdc..5a18859 100644
--- a/arch/powerpc/kvm/mpic.c
+++ b/arch/powerpc/kvm/mpic.c
@@ -1641,13 +1641,16 @@ static void mpic_destroy(struct kvm_device *dev)
static int
On 07/08/2015 01:02, Laszlo Ersek wrote:
The trace covers the full lifetime of the guest (I started tracing
before launching the guest, and I passed -no-reboot to qemu, so when the
guest crashed, QEMU exited.)
This was on 3.10.0-299.el7.x86_64.
I repeated the test with EPT off. The
On Fri, Aug 07, 2015 at 12:57:38PM +0200, Peter Zijlstra wrote:
+void __finish_swait(struct swait_queue_head *q, struct swait_queue *wait)
this one has no users the __ suggests that it is locked edition. Maybe
it is for the completions…
Yeah, who knows, I certainly do not anymore ;-)
On 07/08/2015 05:24, Haozhong Zhang wrote:
When kvm_set_msr_common() handles a guest's write to
MSR_IA32_TSC_ADJUST, it will calcuate an adjustment based on the data
written by guest and then use it to adjust TSC offset by calling a
call-back adjust_tsc_offset(). The 3rd parameter of
On 07/08/2015 09:46, Wu, Feng wrote:
If I understand it correctly, here you reserve the low part of the routing
table, and insert entries with KVM_IRQ_ROUTING_MSI type in them,
then you use this as a hint to KVM to set the EOI bit map. I have two
concerns:
- Currently, GSI 2 is used for
On Wed, Feb 25, 2015 at 10:02:50PM +0100, Sebastian Andrzej Siewior wrote:
+static inline int swait_active(struct swait_queue_head *q)
+{
+return !list_empty(q-task_list);
In RT there was a smp_mb() which you dropped and I assume you had
reasons for it.
Yeah, RT didn't have a reason
kvm_arch_vcpu_runnable now also checks whether the power_off
flag is set.
Signed-off-by: Eric Auger eric.au...@linaro.org
---
arch/arm/kvm/arm.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
index 3ac6b4c..4f50be3 100644
---
The kvm_vcpu_arch pause field is renamed into power_off to prepare
for the introduction of a new pause field. Also vcpu_pause is renamed
into vcpu_sleep since we will sleep until both power_off and pause are
false.
Signed-off-by: Eric Auger eric.au...@linaro.org
---
v1 - v2:
- rename pause in
This series introduces the capability to synchronously exit the guest
and prevent it from being re-entered. This modality will be used by
IRQ forwarding series when changing the state of the IRQ.
Former pause flag used when starting the vcpu in KVM_ARM_VCPU_POWER_OFF
state, in PSCI calls and in
On Thu, Aug 06, 2015 at 07:39:44PM +0100, Josh Triplett wrote:
The IO error path in kvm__emulate_io would call br_read_unlock(), then
goto error, which would call br_read_unlock() again. Refactor the
control flow to have only one exit path and one call to
br_read_unlock().
Thanks, Josh. I
In order to be able to feed physical interrupts to a guest, we need
to be able to establish the virtual-physical mapping between the two
worlds.
The mappings are kept in a set of RCU lists, indexed by virtual interrupts.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm/kvm/arm.c
As we now inject the timer interrupt when we're about to enter
the guest, it makes a lot more sense to make sure this happens
before the vgic code queues the pending interrupts.
Otherwise, we get the interrupt on the following exit, which is
not great for latency (and leads to all kind of bizarre
Now that struct vgic_lr supports the LR_HW bit and carries a hwirq
field, we can encode that information into the list registers.
This patch provides implementations for both GICv2 and GICv3.
Reviewed-by: Christoffer Dall christoffer.d...@linaro.org
Signed-off-by: Marc Zyngier
We introduce kvm_arm_halt_guest and resume functions. They
will be used for IRQ forward state change.
Halt is synchronous and prevents the guest from being re-entered.
We use the same mechanism put in place for PSCI former pause,
now renamed power_off. A new flag is introduced in arch vcpu state,
In case KVM_SET_MP_STATE ioctl is called just after we executed the
vcpu_sleep check, we can enter the guest although KVM_MP_STATE_STOPPED
is set. Let's check the power_off state in the critical section,
just before entering the guest.
Signed-off-by: Eric Auger eric.au...@linaro.org
Reported-by:
We only set the irq_queued flag for level interrupts, meaning
that !vgic_irq_is_queued(vcpu, irq) is a good enough predicate
for all interrupts.
This will allow us to inject edge HW interrupts, for which the
state ACTIVE+PENDING is not allowed.
Reviewed-by: Christoffer Dall
In order to control the active state of an interrupt, introduce
a pair of accessors allowing the state to be set/queried.
This only affects the logical state, and the HW state will only be
applied at world-switch time.
Acked-by: Christoffer Dall christoffer.d...@linaro.org
Signed-off-by: Marc
From day 1, our timer code has been using a terrible hack: whenever
the guest is scheduled with a timer interrupt pending (i.e. the HW
timer has expired), we restore the timer state with the MASK bit set,
in order to avoid the physical interrupt to fire again. And again. And
again...
This is
Virtual interrupts mapped to a HW interrupt should only be triggered
from inside the kernel. Otherwise, you could end up confusing the
kernel (and the GIC's) state machine.
Rearrange the injection path so that kvm_vgic_inject_irq is
used for non-mapped interrupts, and kvm_vgic_inject_mapped_irq
To allow a HW interrupt to be injected into a guest, we lookup the
guest virtual interrupt in the irq_phys_map list, and if we have
a match, encode both interrupts in the LR.
We also mark the interrupt as active at the host distributor level.
On guest EOI on the virtual interrupt, the host
As we're about to introduce some serious GIC-poking to the vgic code,
it is important to make sure that we're going to poke the part of
the GIC that belongs to the CPU we're about to run on (otherwise,
we'd end up with some unexpected interrupts firing)...
Introducing a non-preemptible section in
So far, the only use of the HW interrupt facility is the timer,
implying that the active state is context-switched for each vcpu,
as the device is is shared across all vcpus.
This does not work for a device that has been assigned to a VM,
as the guest is entierely in control of that device (the
In order to remove the crude hack where we sneak the masked bit
into the timer's control register, make use of the phys_irq_map
API control the active state of the interrupt.
This causes some limited changes to allow for potential error
propagation.
Reviewed-by: Christoffer Dall
As we're about to cram more information in the vgic_lr structure
(HW interrupt number and additional state information), we switch
to a layout similar to the HW's:
- use bitfields to save space (we don't need more than 10 bits
to represent the irq numbers)
- source CPU and HW interrupt can
On Fri, Aug 07, 2015 at 01:14:15PM +0200, Peter Zijlstra wrote:
On that, we cannot convert completions to swait. Because swait wake_all
must not happen from IRQ context, and complete_all() typically is used
from just that.
If swait queues aren't useable from IRQ context they will be fairly
On Fri, Aug 07, 2015 at 09:41:31AM -0700, Christoph Hellwig wrote:
On Fri, Aug 07, 2015 at 01:14:15PM +0200, Peter Zijlstra wrote:
On that, we cannot convert completions to swait. Because swait wake_all
must not happen from IRQ context, and complete_all() typically is used
from just that.
On Mon, 2015-08-03 at 19:20 +0200, Eric Auger wrote:
This patch adds the registration/unregistration of an
irq_bypass_consumer on irqfd assignment/deassignment.
Signed-off-by: Eric Auger eric.au...@linaro.org
Signed-off-by: Feng Wu feng...@intel.com
---
v2 - v3 (Feng Wu):
- Use
These two trivial patches are related to x86 vPMU code. They were
actually suggested by Andrew Jones while he was reviewing the last
big vPMU patch set.
These patches have been compiled and tested on AMD system using
a 64-bit guest VM with various perf commands (e.g. bench, test, top,
stat). No
Instead of being defined in a common header file, the kvm_pmu_ops struct
is arch (vmx/svm) specific. This trivial patch relocates two extern
variable definition to their arch-specific files.
Signed-off-by: Wei Huang w...@redhat.com
---
arch/x86/kvm/pmu.h | 2 --
arch/x86/kvm/svm.c | 1 +
On Mon, 2015-08-03 at 19:20 +0200, Eric Auger wrote:
This patch introduces
- kvm_arch_irq_bypass_add_producer
- kvm_arch_irq_bypass_del_producer
- kvm_arch_irq_bypass_stop
- kvm_arch_irq_bypass_start
They make possible to specialize the KVM IRQ bypass consumer in
case
Hi all,
While I was looking at rdtsc() code in kvm-unit-tests (e.g. x86/vmexit.c),
I was getting curious that out-of-order execution on the processor
may make rdtsc() executed not in the place we expect.
Referring to this document from intel,
47 matches
Mail list logo
