[PATCH v5 09/10] arm: add support for supplying GICv3 redistributor addresses

) header files to allow compilation for ARM. Signed-off-by: Andre Przywara andre.przyw...@arm.com Reviewed-by: Marc Zyngier marc.zyng...@arm.com --- arm/gic.c | 36 +++- arm/include/arm-common/gic.h | 1 + arm/include/arm-common/kvm-arch.h

[PATCH v5 04/10] AArch{32,64}: dynamically configure the number of GIC interrupts

. [Andre: rename to gic__init_gic() to ease future expansion] Signed-off-by: Marc Zyngier marc.zyng...@arm.com Signed-off-by: Andre Przywara andre.przyw...@arm.com --- arm/gic.c | 25 + 1 file changed, 25 insertions(+) diff --git a/arm/gic.c b/arm/gic.c index 1ff3663

[PATCH v5 06/10] arm: simplify MMIO dispatching

extensions (like expanding the GIC regions). To be in line with the other architectures, move the now simpler code into a header file. Signed-off-by: Andre Przywara andre.przyw...@arm.com Reviewed-by: Marc Zyngier marc.zyng...@arm.com --- arm/include/arm-common/kvm-arch.h | 12 arm

[PATCH v5 10/10] arm: use new irqchip parameter to create different vGIC types

Currently we unconditionally create a virtual GICv2 in the guest. Add a --irqchip= parameter to let the user specify a different GIC type for the guest, when omitting this parameter it still defaults to --irqchip=gicv2. For now the only other supported type is --irqchip=gicv3 Signed-off-by: Andre

[PATCH v5 07/10] limit number of VCPUs on demand

. Signed-off-by: Andre Przywara andre.przyw...@arm.com --- arm/gic.c | 6 -- 1 file changed, 6 deletions(-) diff --git a/arm/gic.c b/arm/gic.c index 99f0d2b..05f85a2 100644 --- a/arm/gic.c +++ b/arm/gic.c @@ -84,12 +84,6 @@ int gic__create(struct kvm *kvm) { int err; - if (kvm

[PATCH v5 08/10] arm: prepare for instantiating different IRQ chip devices

Extend the vGIC handling code to potentially deal with different IRQ chip devices instead of hard-coding the GICv2 in. We extend most vGIC functions to take a type parameter, but still put GICv2 in at the top for the time being. Signed-off-by: Andre Przywara andre.przyw...@arm.com Reviewed

[PATCH v5 05/10] arm: finish VGIC initialisation explicitly

-off-by: Andre Przywara andre.przyw...@arm.com Reviewed-by: Marc Zyngier marc.zyng...@arm.com --- arm/gic.c | 25 ++--- 1 file changed, 22 insertions(+), 3 deletions(-) diff --git a/arm/gic.c b/arm/gic.c index 8560c9b..99f0d2b 100644 --- a/arm/gic.c +++ b/arm/gic.c @@ -98,24

Re: [PATCH 1/7] KVM: api: add kvm_irq_routing_extended_msi

Hi Eric, On 02/07/15 15:49, Eric Auger wrote: Hi Pavel, On 07/02/2015 09:26 AM, Pavel Fedin wrote: Hello! -Original Message- From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org] On Behalf Of Eric Auger Sent: Monday, June 29, 2015 6:37 PM To: eric.au...@st.com;

Re: [PATCH 7/7] KVM: arm: implement kvm_set_msi by gsi direct mapping

Hi Eric, On 29/06/15 16:37, Eric Auger wrote: If the ITS modality is not available, let's simply support MSI injection by transforming the MSI.data into an SPI ID. This becomes possible to use KVM_SIGNAL_MSI ioctl for arm too. Signed-off-by: Eric Auger eric.au...@linaro.org ---

Re: [PATCH 2/7] KVM: kvm_host: add kvm_extended_msi

Hi Eric, just played a bit with the code and I could make things easier by the following change: On 29/06/15 16:37, Eric Auger wrote: Add a new kvm_extended_msi struct to store the additional device ID specific to ARM. kvm_kernel_irq_routing_entry union now encompasses this new struct.

Re: [PATCH 4/7] KVM: arm/arm64: enable irqchip routing

Hi Eric, On 29/06/15 16:37, Eric Auger wrote: This patch adds compilation and link against irqchip. On ARM, irqchip routing is not really useful since there is a single irqchip. However main motivation behind using irqchip code is to enable MSI routing code. With the support of in-kernel

Re: [PATCH v4 10/10] arm: use new irqchip parameter to create different vGIC types

On 30/06/15 17:13, Will Deacon wrote: On Fri, Jun 26, 2015 at 02:16:18PM +0100, Andre Przywara wrote: Currently we unconditionally create a virtual GICv2 in the guest. Add a --irqchip= parameter to let the user specify a different GIC type for the guest, when omitting this parameter it still

Re: [PATCH v4 07/10] limit number of VCPUs on demand

Hi, On 30/06/15 17:09, Will Deacon wrote: On Fri, Jun 26, 2015 at 02:16:15PM +0100, Andre Przywara wrote: Currently the ARM GIC checks the number of VCPUs against a fixed limit, which is GICv2 specific. Don't pretend we know better than the kernel and let's get rid of that explicit check

Re: [PATCH] kvmtool: don't use PCI config space IRQ line field

Hi Will, On 29/06/15 11:10, Will Deacon wrote: Hi Andre, On Thu, Jun 18, 2015 at 06:19:53PM +0100, Andre Przywara wrote: I am tempted to remove shmem, since it's broken: a) there is no upstream driver, only some out-of-tree uio driver module in some Github repo Right, but that's

Re: [PATCH 0/3] KVM: arm: Implement software vGICv2 emulation

Hi, On 29/06/15 13:52, Christoffer Dall wrote: Hi Pavel, [Please cc the kvm/arm list for such patches according to the MAINTAINERS file in the future] On Mon, Jun 29, 2015 at 12:53:46PM +0300, Pavel Fedin wrote: Some hardware (like Raspberry Pi 2) is capable of running KVM, however lacks

Re: [PATCH 02/13] KVM: extend struct kvm_msi to hold a 32-bit device ID

Hi Christoffer, thanks for your time to reviewing this! Was probably no pleasure ;-) On 28/06/15 20:12, Christoffer Dall wrote: On Fri, May 29, 2015 at 10:53:18AM +0100, Andre Przywara wrote: The ARM GICv3 ITS MSI controller requires a device ID to be able to assign the proper interrupt

[PATCH] kvmtool: vhost-net: fix ioeventfd registration

. Signed-off-by: Andre Przywara andre.przyw...@arm.com --- virtio/pci.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/virtio/pci.c b/virtio/pci.c index 2dff13b..90fcd64 100644 --- a/virtio/pci.c +++ b/virtio/pci.c @@ -25,7 +25,7 @@ static int virtio_pci__init_ioeventfd

[PATCH v4 01/10] AArch64: Reserve two 64k pages for GIC CPU interface

Zyngier marc.zyng...@arm.com Signed-off-by: Andre Przywara andre.przyw...@arm.com --- arm/aarch64/include/kvm/kvm-arch.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arm/aarch64/include/kvm/kvm-arch.h b/arm/aarch64/include/kvm/kvm-arch.h index 2f08a26..4925736 100644 --- a/arm

[PATCH v4 08/10] arm: prepare for instantiating different IRQ chip devices

Extend the vGIC handling code to potentially deal with different IRQ chip devices instead of hard-coding the GICv2 in. We extend most vGIC functions to take a type parameter, but still put GICv2 in at the top for the time being. Signed-off-by: Andre Przywara andre.przyw...@arm.com Reviewed

[PATCH v4 00/10] kvmtool: arm64: GICv3 guest support

]. [1] git://git.kernel.org/pub/scm/linux/kernel/git/will/kvmtool.git [2] git://linux-arm.org/kvmtool.git (branch gicv3/v4) http://www.linux-arm.org/git?p=kvmtool.git;a=log;h=refs/heads/gicv3/v4 Andre Przywara (6): arm: finish VGIC initialisation explicitly arm: simplify MMIO dispatching

[PATCH v4 09/10] arm: add support for supplying GICv3 redistributor addresses

) header files to allow compilation for ARM. Signed-off-by: Andre Przywara andre.przyw...@arm.com Reviewed-by: Marc Zyngier marc.zyng...@arm.com --- arm/gic.c | 36 +++- arm/include/arm-common/gic.h | 1 + arm/include/arm-common/kvm-arch.h

[PATCH v4 06/10] arm: simplify MMIO dispatching

extensions (like expanding the GIC regions). To be in line with the other architectures, move the now simpler code into a header file. Signed-off-by: Andre Przywara andre.przyw...@arm.com Reviewed-by: Marc Zyngier marc.zyng...@arm.com --- arm/include/arm-common/kvm-arch.h | 12 arm

[PATCH v4 02/10] AArch{32,64}: use KVM_CREATE_DEVICE co to instanciate the GIC

to differentiate between creation and initialisation more clearly and fix error path.] Signed-off-by: Marc Zyngier marc.zyng...@arm.com Signed-off-by: Andre Przywara andre.przyw...@arm.com --- arm/gic.c| 69 +++- arm/include/arm-common

[PATCH v4 03/10] irq: add irq__get_nr_allocated_lines

allocated so far. Signed-off-by: Marc Zyngier marc.zyng...@arm.com Signed-off-by: Andre Przywara andre.przyw...@arm.com --- include/kvm/irq.h | 1 + irq.c | 5 + 2 files changed, 6 insertions(+) diff --git a/include/kvm/irq.h b/include/kvm/irq.h index 4cec6f0..8a78e43 100644

[PATCH v4 07/10] limit number of VCPUs on demand

reached a VCPU limit. If we see this and have at least brought up one VCPU already successfully, then don't panic, but limit the number of VCPUs instead. Signed-off-by: Andre Przywara andre.przyw...@arm.com --- arm/gic.c | 6 -- arm/kvm-cpu.c | 7 ++- kvm-cpu.c | 7 +++ 3

[PATCH v4 05/10] arm: finish VGIC initialisation explicitly

-off-by: Andre Przywara andre.przyw...@arm.com Reviewed-by: Marc Zyngier marc.zyng...@arm.com --- arm/gic.c | 25 ++--- 1 file changed, 22 insertions(+), 3 deletions(-) diff --git a/arm/gic.c b/arm/gic.c index 8560c9b..99f0d2b 100644 --- a/arm/gic.c +++ b/arm/gic.c @@ -98,24

[PATCH v4 04/10] AArch{32,64}: dynamically configure the number of GIC interrupts

. [Andre: rename to gic__init_gic() to ease future expansion] Signed-off-by: Marc Zyngier marc.zyng...@arm.com Signed-off-by: Andre Przywara andre.przyw...@arm.com --- arm/gic.c | 25 + 1 file changed, 25 insertions(+) diff --git a/arm/gic.c b/arm/gic.c index 1ff3663

[PATCH v4 10/10] arm: use new irqchip parameter to create different vGIC types

Currently we unconditionally create a virtual GICv2 in the guest. Add a --irqchip= parameter to let the user specify a different GIC type for the guest, when omitting this parameter it still defaults to --irqchip=gicv2. For now the only other supported type is --irqchip=gicv3 Signed-off-by: Andre

Re: [PATCH v3 06/10] arm: simplify MMIO dispatching

Hi Will, do you want me to respin the whole series to address the remaining minor comments in the last four patches or do you want to take patch 01-06 already (which I think Marc has already agreed upon)? Then I would just send an updated version of the remaining patches. Cheers, Andre.

[RFC PATCH 1/2] Makefile: cleanup guest/init generation

The dependencies and targets for the guest userland binary are currently not correct, some are redundant. Fix them by splitting up guest/guest_init.o creation into its two steps and describe the dependencies properly. On the way use automatic variables in some rules. Signed-off-by: Andre Przywara

[RFC PATCH 2/2] Makefile: use xxd for converting guest/init

. If this turns out to be not widely installed (it seems to be part of the vim package in most distributions), we could think about switching to a scripted implementation using od or some printf trickery. Signed-off-by: Andre Przywara andre.przyw...@arm.com --- Makefile| 4 ++-- builtin

[RFC PATCH 0/2] kvmtool: Rework guest/init integration

and x86_64. Please test whether this works with your toolchain / system! Cheers, Andre. Andre Przywara (2): Makefile: cleanup guest/init generation Makefile: use xxd for converting guest/init Makefile| 21 - builtin-run.c | 8 builtin-setup.c | 8

Re: [RFC 0/6] KVM: arm/arm64: gsi routing support

Hi Eric, I went back reading the code and looked at how the x86 APIC works more closely to understand the GSI routing better. See below for more ... On 22/06/15 10:21, Eric Auger wrote: On 06/22/2015 10:40 AM, Andre Przywara wrote: Hi Eric, I briefly looked over the series, the patches

Re: [PATCH 1/2] powerpc: Define the hcall opcodes return values we need

Hi, On 23/06/15 11:05, Michael Ellerman wrote: On Tue, 2015-06-23 at 11:33 +0200, Paolo Bonzini wrote: On 19/06/2015 09:21, Michael Ellerman wrote: diff --git a/powerpc/spapr.h b/powerpc/spapr.h index 0537f881c0e4..7a377d093ef4 100644 --- a/powerpc/spapr.h +++ b/powerpc/spapr.h @@ -16,17

Re: [RFC 1/6] KVM: api: add kvm_irq_routing_extended_msi

Hi Eric, On 18/06/15 18:40, Eric Auger wrote: On ARM, the MSI msg (address and data) comes along with out-of-band device ID information. The device ID encodes the device that composes the MSI msg. Let's create a new routing entry structure that enables to encode that information on top of

Re: [RFC 0/6] KVM: arm/arm64: gsi routing support

Hi Eric, I briefly looked over the series, the patches itself look good overall. I have one or two comments on the actual code, but want to discuss the general approach first (more a dump of some first thoughts): On 18/06/15 18:40, Eric Auger wrote: With the advent of GICv3 ITS in-kernel

[PATCH] kvmtool: avoid casts when initializing structures

standard, so lets fix this better sooner than later. Signed-off-by: Andre Przywara andre.przyw...@arm.com --- Hi, TBH I don't know why we had those casts there in the first place, but it works without them, even for -std=gnu89. If people agree with this, we can think about dropping the forced

Re: [PATCH] kvmtool: Makefile: allow overriding CC and LD

Hi Paolo, On 19/06/15 10:59, Paolo Bonzini wrote: On 18/06/2015 17:50, Andre Przywara wrote: Currently we set CC unconditionally to ${CROSS_COMPILE}gcc, the same for LD. Allow people to override the compiler name by specifying it explicitly on the command line or via the environment

Re: [PATCH] kvmtool: Makefile: allow overriding CC and LD

Hi Michael, On 19/06/15 02:14, Michael Ellerman wrote: On Thu, 2015-06-18 at 16:50 +0100, Andre Przywara wrote: Currently we set CC unconditionally to ${CROSS_COMPILE}gcc, the same for LD. Allow people to override the compiler name by specifying it explicitly on the command line or via

Re: [PATCH] kvmtool: Makefile: allow overriding CC and LD

Hi Michael, On 19/06/15 02:14, Michael Ellerman wrote: On Thu, 2015-06-18 at 16:50 +0100, Andre Przywara wrote: Currently we set CC unconditionally to ${CROSS_COMPILE}gcc, the same for LD. Allow people to override the compiler name by specifying it explicitly on the command line or via

Re: [PATCH 2/3] powerpc: use default endianness for converting guest/init

Hi Michael, On 19/06/15 02:08, Michael Ellerman wrote: On Thu, 2015-06-18 at 15:52 +0100, Andre Przywara wrote: Hi, On 06/17/2015 10:43 AM, Andre Przywara wrote: For converting the guest/init binary into an object file, we call the linker binary, setting the endianness to big endian

Re: [PATCH 2/3] powerpc: use default endianness for converting guest/init

Hi Michael, On 19/06/15 02:08, Michael Ellerman wrote: On Thu, 2015-06-18 at 15:52 +0100, Andre Przywara wrote: Hi, On 06/17/2015 10:43 AM, Andre Przywara wrote: For converting the guest/init binary into an object file, we call the linker binary, setting the endianness to big endian

Re: [PATCH 13/13] KVM: arm64: enable ITS emulation as a virtual MSI controller

Hi Eric, On 06/18/2015 09:43 AM, Eric Auger wrote: On 05/29/2015 11:53 AM, Andre Przywara wrote: If userspace has provided a base address for the ITS register frame, we enable the bits that advertise LPIs in the GICv3. When the guest has enabled LPIs and the ITS, we enable the emulation part

Re: [PATCH 2/3] powerpc: use default endianness for converting guest/init

Hi, On 06/17/2015 10:43 AM, Andre Przywara wrote: For converting the guest/init binary into an object file, we call the linker binary, setting the endianness to big endian explicitly when compiling kvmtool for powerpc. This breaks if the compiler is actually targetting little endian (which

Re: [PATCH 2/3] powerpc: use default endianness for converting guest/init

Hi, On 06/17/2015 10:43 AM, Andre Przywara wrote: For converting the guest/init binary into an object file, we call the linker binary, setting the endianness to big endian explicitly when compiling kvmtool for powerpc. This breaks if the compiler is actually targetting little endian (which

[PATCH] kvmtool: Makefile: allow overriding CC and LD

rid of the PowerPC overrides in the Makefile. Possible uses: $ make CC=gcc -m64 LD=ld -melf64ppc (build kvmtool on a PowerPC toolchain defaulting to 32-bit) $ make CC=gcc -m32 LD=ld -melf_i386 (build a 32-bit binary on a multilib-enabled x86-64 compiler) Signed-off-by: Andre Przywara andre.przyw

[PATCH] kvmtool: Makefile: allow overriding CC and LD

rid of the PowerPC overrides in the Makefile. Possible uses: $ make CC=gcc -m64 LD=ld -melf64ppc (build kvmtool on a PowerPC toolchain defaulting to 32-bit) $ make CC=gcc -m32 LD=ld -melf_i386 (build a 32-bit binary on a multilib-enabled x86-64 compiler) Signed-off-by: Andre Przywara andre.przyw

Re: [PATCH] kvmtool: don't use PCI config space IRQ line field

Hi Will, On 06/16/2015 06:06 PM, Will Deacon wrote: On Mon, Jun 15, 2015 at 11:45:38AM +0100, Andre Przywara wrote: On 06/05/2015 05:41 PM, Will Deacon wrote: On Thu, Jun 04, 2015 at 04:20:45PM +0100, Andre Przywara wrote: In PCI config space there is an interrupt line field (offset 0x3f

Re: [PATCH 13/13] KVM: arm64: enable ITS emulation as a virtual MSI controller

On 06/18/2015 04:03 PM, Pavel Fedin wrote: Hello! But that fails compilation on ARM (which uses this file as well), because we have a dummy fail function in the header if CONFIG_HAVE_KVM_MSI is not defined. May be then remove that fail function too? Too many #ifdef's are not good...

[PATCH v2] powerpc: add hvcall.h header from Linux

The powerpc code uses some PAPR hypercalls, of which we need the hypercall number. Copy just the needed macro definitions from the kernel's (private) hvcall.h file and remove the extra tricks formerly used to be able to include this header file directly. Signed-off-by: Andre Przywara andre.przyw

[PATCH v2] powerpc: add hvcall.h header from Linux

The powerpc code uses some PAPR hypercalls, of which we need the hypercall number. Copy just the needed macro definitions from the kernel's (private) hvcall.h file and remove the extra tricks formerly used to be able to include this header file directly. Signed-off-by: Andre Przywara andre.przyw

[PATCH v3 09/10] arm: add support for supplying GICv3 redistributor addresses

) header files to allow compilation for ARM. Signed-off-by: Andre Przywara andre.przyw...@arm.com --- arm/gic.c | 36 +++- arm/include/arm-common/gic.h | 3 ++- arm/include/arm-common/kvm-arch.h | 7 +++ 3 files changed, 44 insertions

[PATCH v3 05/10] arm: finish VGIC initialisation explicitly

-off-by: Andre Przywara andre.przyw...@arm.com Reviewed-by: Marc Zyngier marc.zyng...@arm.com --- arm/gic.c | 25 ++--- 1 file changed, 22 insertions(+), 3 deletions(-) diff --git a/arm/gic.c b/arm/gic.c index 8560c9b..99f0d2b 100644 --- a/arm/gic.c +++ b/arm/gic.c @@ -98,24

[PATCH v3 01/10] AArch64: Reserve two 64k pages for GIC CPU interface

Zyngier marc.zyng...@arm.com Signed-off-by: Andre Przywara andre.przyw...@arm.com --- arm/aarch64/include/kvm/kvm-arch.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arm/aarch64/include/kvm/kvm-arch.h b/arm/aarch64/include/kvm/kvm-arch.h index 2f08a26..4925736 100644 --- a/arm

[PATCH v3 02/10] AArch{32,64}: use KVM_CREATE_DEVICE co to instanciate the GIC

to differentiate between creation and initialisation more clearly and fix error path.] Signed-off-by: Marc Zyngier marc.zyng...@arm.com Signed-off-by: Andre Przywara andre.przyw...@arm.com --- arm/gic.c| 69 +++- arm/include/arm-common

[PATCH v3 06/10] arm: simplify MMIO dispatching

extensions (like expanding the GIC regions). To be in line with the other architectures, move the now simpler code into a header file. Signed-off-by: Andre Przywara andre.przyw...@arm.com --- arm/include/arm-common/kvm-arch.h | 12 arm/include/arm-common/kvm-cpu-arch.h | 14

[PATCH v3 03/10] irq: add irq__get_nr_allocated_lines

allocated so far. Signed-off-by: Marc Zyngier marc.zyng...@arm.com Signed-off-by: Andre Przywara andre.przyw...@arm.com --- include/kvm/irq.h | 1 + irq.c | 5 + 2 files changed, 6 insertions(+) diff --git a/include/kvm/irq.h b/include/kvm/irq.h index 4cec6f0..8a78e43 100644

[PATCH v3 10/10] arm: use new irqchip parameter to create different vGIC types

Currently we unconditionally create a virtual GICv2 in the guest. Add a --irqchip= parameter to let the user specify a different GIC type for the guest. For now we the only other supported type is GICv3. Signed-off-by: Andre Przywara andre.przyw...@arm.com --- arm/aarch64/arm-cpu.c

[PATCH v3 07/10] limit number of VCPUs on demand

reached a VCPU limit. If we see this and have at least brought up one VCPU already successfully, then don't panic, but limit the number of VCPUs instead. Signed-off-by: Andre Przywara andre.przyw...@arm.com --- arm/gic.c | 6 -- arm/kvm-cpu.c | 11 +-- kvm-cpu.c | 7

[PATCH v3 00/10] kvmtool: arm64: GICv3 guest support

included at my repo [2]. [1] git://git.kernel.org/pub/scm/linux/kernel/git/will/kvmtool.git [2] git://linux-arm.org/kvmtool.git (branch gicv3/v3) http://www.linux-arm.org/git?p=kvmtool.git;a=log;h=refs/heads/gicv3/v3 Andre Przywara (6): arm: finish VGIC initialisation explicitly arm: simplify

[PATCH v3 08/10] arm: prepare for instantiating different IRQ chip devices

Extend the vGIC handling code to potentially deal with different IRQ chip devices instead of hard-coding the GICv2 in. We extend most vGIC functions to take a type parameter, but still put GICv2 in at the top for the time being. Signed-off-by: Andre Przywara andre.przyw...@arm.com --- arm

[PATCH v3 04/10] AArch{32,64}: dynamically configure the number of GIC interrupts

. [Andre: rename to gic__init_gic() to ease future expansion] Signed-off-by: Marc Zyngier marc.zyng...@arm.com Signed-off-by: Andre Przywara andre.przyw...@arm.com --- arm/gic.c | 25 + 1 file changed, 25 insertions(+) diff --git a/arm/gic.c b/arm/gic.c index 1ff3663

[PATCH 0/3] kvmtool: fixes for PowerPC

Hello, some patches to fix at least the build of the new kvmtool for PowerPC. I could only compile test it so far, so I'd be grateful if people more familiar with that architecture can have a look and maybe even test it on actual machines. Cheers, Andre. Andre Przywara (3): powerpc: implement

[PATCH 2/3] powerpc: use default endianness for converting guest/init

the explicit big endianness switch from the linker call to allow linking on little endian PowerPC builds again. Signed-off-by: Andre Przywara andre.przyw...@arm.com --- Hi, this fixed the powerpc64le build for me, while still compiling fine for big endian. Admittedly this whole init-guest_init.o

[PATCH 3/3] powerpc: add hvcall.h header from Linux

The powerpc code uses some PAPR hypercalls, of which we need the hypercall number. Copy the macro definition parts from the kernel's (private) hvcall.h file and remove the extra tricks formerly used to be able to include this header file directly. Signed-off-by: Andre Przywara andre.przyw

[PATCH 2/3] powerpc: use default endianness for converting guest/init

the explicit big endianness switch from the linker call to allow linking on little endian PowerPC builds again. Signed-off-by: Andre Przywara andre.przyw...@arm.com --- Hi, this fixed the powerpc64le build for me, while still compiling fine for big endian. Admittedly this whole init-guest_init.o

[PATCH 3/3] powerpc: add hvcall.h header from Linux

The powerpc code uses some PAPR hypercalls, of which we need the hypercall number. Copy the macro definition parts from the kernel's (private) hvcall.h file and remove the extra tricks formerly used to be able to include this header file directly. Signed-off-by: Andre Przywara andre.przyw

[PATCH 0/3] kvmtool: fixes for PowerPC

Hello, some patches to fix at least the build of the new kvmtool for PowerPC. I could only compile test it so far, so I'd be grateful if people more familiar with that architecture can have a look and maybe even test it on actual machines. Cheers, Andre. Andre Przywara (3): powerpc: implement

[PATCH 1/3] powerpc: implement barrier primitives

Instead of referring to the Linux header including the barrier macros, copy over the rather simple implementation for the PowerPC barrier instructions kvmtool uses. This fixes build for powerpc. Signed-off-by: Andre Przywara andre.przyw...@arm.com --- Hi, I just took what kvmtool seems to have

Re: IRQFD support with GICv3 ITS (WAS: RE: [PATCH 00/13] arm64: KVM: GICv3 ITS emulation)

Expert Engineer Samsung Electronics Research center Russia -Original Message- From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org] On Behalf Of Pavel Fedin Sent: Wednesday, June 10, 2015 6:30 PM To: 'Eric Auger'; 'Marc Zyngier'; 'Andre Przywara'; christoffer.d

Re: [PATCH v3 06/10] arm: simplify MMIO dispatching

Hi Marc, On 06/17/2015 01:48 PM, Marc Zyngier wrote: On 17/06/15 12:21, Andre Przywara wrote: Currently we separate any incoming MMIO request into one of the ARM memory map regions and take care to spare the GIC. It turns out that this is unnecessary, as we only have one special region

Re: [PATCH v3 07/10] limit number of VCPUs on demand

On 06/17/2015 01:53 PM, Marc Zyngier wrote: On 17/06/15 12:21, Andre Przywara wrote: Currently the ARM GIC checks the number of VCPUs against a fixed limit, which is GICv2 specific. Don't pretend we know better than the kernel and let's get rid of that explicit check. Instead be more relaxed

Re: [PATCH] kvmtool: don't use PCI config space IRQ line field

On 06/05/2015 05:41 PM, Will Deacon wrote: On Thu, Jun 04, 2015 at 04:20:45PM +0100, Andre Przywara wrote: Hi Will, sorry, almost forgot about this email... In PCI config space there is an interrupt line field (offset 0x3f), which is used to initially communicate the IRQ line number from

Re: [PATCH v2 6/8] arm: prepare for instantiating different IRQ chip devices

Hi Marc, On 06/10/2015 06:21 PM, Marc Zyngier wrote: On 05/06/15 09:37, Andre Przywara wrote: Extend the vGIC handling code to potentially deal with different IRQ chip devices instead of hard-coding the GICv2 in. We extend most vGIC functions to take a type parameter, but still put GICv2

Re: [PATCH v2 7/8] arm: add support for supplying GICv3 redistributor addresses

On 06/10/2015 06:40 PM, Marc Zyngier wrote: On 05/06/15 09:37, Andre Przywara wrote: The code currently is assuming fixed sized memory regions for the distributor and CPU interface. GICv3 needs a dynamic allocation of its redistributor region, since its size depends on the number of vCPUs

Re: [PATCH 05/13] KVM: arm64: handle ITS related GICv3 redistributor registers

Hi Eric, On 06/09/2015 09:52 AM, Eric Auger wrote: On 05/29/2015 11:53 AM, Andre Przywara wrote: In the GICv3 redistributor there are the PENDBASER and PROPBASER registers which we did not emulate so far, as they only make sense when having an ITS. In preparation for that emulate those MMIO

Re: [PATCH 07/10] KVM: arm/arm64: vgic: Allow HW interrupts to be queued to a guest

On 06/11/2015 10:15 AM, Marc Zyngier wrote: On 11/06/15 09:44, Andre Przywara wrote: On 06/08/2015 06:04 PM, Marc Zyngier wrote: ... @@ -1344,6 +1364,35 @@ static bool vgic_process_maintenance(struct kvm_vcpu *vcpu) return level_pending; } +/* Return 1 if HW interrupt went from

Re: [PATCH 06/10] KVM: arm/arm64: vgic: Allow dynamic mapping of physical/virtual interrupts

Hi, On 06/08/2015 06:04 PM, Marc Zyngier wrote: In order to be able to feed physical interrupts to a guest, we need to be able to establish the virtual-physical mapping between the two worlds. The mapping is kept in a rbtree, indexed by virtual interrupts. Signed-off-by: Marc Zyngier

Re: [PATCH 07/10] KVM: arm/arm64: vgic: Allow HW interrupts to be queued to a guest

Hi Marc, On 06/08/2015 06:04 PM, Marc Zyngier wrote: To allow a HW interrupt to be injected into a guest, we lookup the guest virtual interrupt in the irq_phys_map rbtree, and if we have a match, encode both interrupts in the LR. We also mark the interrupt as active at the host distributor

Re: [PATCH 04/13] KVM: arm64: Introduce new MMIO region for the ITS base address

Hi Eric, thanks for the review! On 06/09/2015 09:52 AM, Eric Auger wrote: On 05/29/2015 11:53 AM, Andre Przywara wrote: The ARM GICv3 ITS controller requires a separate register frame to cover ITS specific registers. Add a new VGIC address type and store the address in a field

Re: [PATCH 09/13] KVM: arm64: handle pending bit for LPIs in ITS emulation

Salut Eric, On 06/09/2015 04:59 PM, Eric Auger wrote: On 05/29/2015 11:53 AM, Andre Przywara wrote: As the actual LPI number in a guest can be quite high, but is mostly assigned using a very sparse allocation scheme, bitmaps and arrays for storing the virtual interrupt status are a waste

Re: [PATCH 03/10] KVM: arm/arm64: vgic: Convert struct vgic_lr to use bitfields

Hi Marc, On 06/08/2015 06:03 PM, Marc Zyngier wrote: As we're about to cram more information in the vgic_lr structure (HW interrupt number and additional state information), we switch to a layout similar to the HW's: - use bitfields to save space (we don't need more than 10 bits to

Re: [PATCH v2 6/8] arm: prepare for instantiating different IRQ chip devices

Hi, contrary to my boasting in the cover letter I managed to accidentially drop the fix for the GIC device initialization error handling Will requested from this series. If we fail the GIC initialization sequence at some point, we should make sure to not let the gic_fd initialized, so that

[PATCH v2 4/8] AArch{32,64}: dynamically configure the number of GIC interrupts

. [Andre: rename to gic__init_gic() to ease future expansion] Signed-off-by: Marc Zyngier marc.zyng...@arm.com Signed-off-by: Andre Przywara andre.przyw...@arm.com --- arm/gic.c | 25 + 1 file changed, 25 insertions(+) diff --git a/arm/gic.c b/arm/gic.c index ce5f7fa

[PATCH v2 5/8] arm: finish VGIC initialisation explicitly

-off-by: Andre Przywara andre.przyw...@arm.com --- arm/gic.c | 25 ++--- 1 file changed, 22 insertions(+), 3 deletions(-) diff --git a/arm/gic.c b/arm/gic.c index 6277af8..8d47562 100644 --- a/arm/gic.c +++ b/arm/gic.c @@ -89,24 +89,43 @@ int gic__create(struct kvm *kvm

[PATCH v2 3/8] irq: add irq__get_nr_allocated_lines

allocated so far. Signed-off-by: Marc Zyngier marc.zyng...@arm.com Signed-off-by: Andre Przywara andre.przyw...@arm.com --- include/kvm/irq.h | 1 + irq.c | 5 + 2 files changed, 6 insertions(+) diff --git a/include/kvm/irq.h b/include/kvm/irq.h index 4cec6f0..8a78e43 100644

[PATCH v2 2/8] AArch{32,64}: use KVM_CREATE_DEVICE co to instanciate the GIC

to differentiate between creation and initialisation more clearly.] Signed-off-by: Marc Zyngier marc.zyng...@arm.com Signed-off-by: Andre Przywara andre.przyw...@arm.com --- arm/gic.c| 60 ++-- arm/include/arm-common/gic.h | 2 +- arm

[PATCH v2 7/8] arm: add support for supplying GICv3 redistributor addresses

which are not (yet) in the (32 bit) header files to allow compilation for ARM. Signed-off-by: Andre Przywara andre.przyw...@arm.com --- arm/gic.c | 37 +++-- arm/include/arm-common/gic.h | 2 +- arm/include/arm-common/kvm-arch.h | 18

[PATCH v2 0/8] kvmtool: arm64: GICv3 guest support

/linux/kernel/git/will/kvmtool.git [2] git://linux-arm.org/kvmtool.git (branch gicv3/v2) http://www.linux-arm.org/git?p=kvmtool.git;a=log;h=refs/heads/gicv3/v2 Andre Przywara (4): arm: finish VGIC initialisation explicitly arm: prepare for instantiating different IRQ chip devices arm: add

[PATCH v2 8/8] arm: use new irqchip parameter to create different vGIC types

Currently we unconditionally create a virtual GICv2 in the guest. Add a --irqchip= parameter to let the user specify a different GIC type for the guest. For now we the only other supported type is GICv3. Signed-off-by: Andre Przywara andre.przyw...@arm.com --- arm/aarch64/arm-cpu.c

[PATCH v2 6/8] arm: prepare for instantiating different IRQ chip devices

Extend the vGIC handling code to potentially deal with different IRQ chip devices instead of hard-coding the GICv2 in. We extend most vGIC functions to take a type parameter, but still put GICv2 in at the top for the time being. Signed-off-by: Andre Przywara andre.przyw...@arm.com --- arm

[PATCH v2 1/8] AArch64: Reserve two 64k pages for GIC CPU interface

Zyngier marc.zyng...@arm.com Signed-off-by: Andre Przywara andre.przyw...@arm.com --- arm/aarch64/include/kvm/kvm-arch.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arm/aarch64/include/kvm/kvm-arch.h b/arm/aarch64/include/kvm/kvm-arch.h index 2f08a26..4925736 100644 --- a/arm

[PATCH] kvmtool: don't use PCI config space IRQ line field

. This fixes ARM/ARM64 guests using PCI with newer kernels. Signed-off-by: Andre Przywara andre.przyw...@arm.com --- include/kvm/virtio-pci.h | 8 virtio/pci.c | 9 ++--- 2 files changed, 14 insertions(+), 3 deletions(-) diff --git a/include/kvm/virtio-pci.h b/include/kvm/virtio

[PATCH 00/13] arm64: KVM: GICv3 ITS emulation

://linux-arm.org/linux-ap.git http://www.linux-arm.org/git?p=linux-ap.git;a=log;h=refs/heads/its-emul/v1 [2]: git://linux-arm.org/kvmtool.git http://www.linux-arm.org/git?p=kvmtool.git;a=log;h=refs/heads/its Andre Przywara (13): KVM: arm/arm64: VGIC: don't track used LRs in the distributor

[PATCH 01/13] KVM: arm/arm64: VGIC: don't track used LRs in the distributor

once every 100,000 exits. This has been briefly tested on Midway, Juno and the model (the latter both with GICv2 and GICv3 guests). Signed-off-by: Andre Przywara andre.przyw...@arm.com --- include/kvm/arm_vgic.h | 6 --- virt/kvm/arm/vgic-v2.c | 1 + virt/kvm/arm/vgic-v3.c | 1 + virt/kvm/arm

[PATCH 13/13] KVM: arm64: enable ITS emulation as a virtual MSI controller

we enable the KVM_SIGNAL_MSI feature to allow userland to inject MSIs into the guest. Not having enabled the ITS emulation will lead to a -ENODEV when trying to inject a MSI. Signed-off-by: Andre Przywara andre.przyw...@arm.com --- Documentation/virtual/kvm/api.txt | 2 +- arch/arm64/kvm/Kconfig

[PATCH 10/13] KVM: arm64: sync LPI properties and status between guest and KVM

by hardware, so the sync points are well known. Provide functions that read the guest memory and store the information from the property and status table in the kernel. Signed-off-by: Andre Przywara andre.przyw...@arm.com --- virt/kvm/arm/its-emul.c | 140

[PATCH 06/13] KVM: arm64: introduce ITS emulation file with stub functions

are not yet ready for the show. Signed-off-by: Andre Przywara andre.przyw...@arm.com --- arch/arm64/kvm/Makefile| 1 + include/kvm/arm_vgic.h | 6 ++ include/linux/irqchip/arm-gic-v3.h | 1 + virt/kvm/arm/its-emul.c| 127

[PATCH 09/13] KVM: arm64: handle pending bit for LPIs in ITS emulation

. With LPIs being only edge-triggered, we get away with a less complex IRQ handling. Signed-off-by: Andre Przywara andre.przyw...@arm.com --- include/kvm/arm_vgic.h | 2 ++ virt/kvm/arm/its-emul.c | 66 +++ virt/kvm/arm/its-emul.h | 3 ++ virt

[PATCH 05/13] KVM: arm64: handle ITS related GICv3 redistributor registers

emulation. Signed-off-by: Andre Przywara andre.przyw...@arm.com --- include/kvm/arm_vgic.h | 4 virt/kvm/arm/vgic-v3-emul.c | 43 +++ virt/kvm/arm/vgic.c | 35 +++ virt/kvm/arm/vgic.h | 4 4 files

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