From: Jan Kiszka jan.kis...@siemens.com
At least WB must be possible.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/kvm/vmx.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index e51bf4a..53050a0 100644
From: Jan Kiszka jan.kis...@siemens.com
Likely a typo, but a fatal one as kvm_set_cr0 performs checks on the
state transition that may prevent loading L1's cr0.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/kvm/vmx.c |2 +-
1 files changed, 1 insertions(+), 1 deletions
These patches apply on top of nEPT v6 and basically enable unrestricted
guest mode to be used by L1.
Jan Kiszka (7):
KVM: nEPT: Advertise WB type EPTP
KVM: nVMX: Replace kvm_set_cr0 with vmx_set_cr0 in
load_vmcs12_host_state
KVM: nVMX: Enable unrestricted guest mode support
KVM: nVMX
From: Jan Kiszka jan.kis...@siemens.com
If nested EPT is enabled, the L2 guest may change CR3 without any exits.
We therefore have to read the current value from the VMCS when switching
to L1. However, if paging wasn't enabled, L0 tracks L2's CR3, and
GUEST_CR3 rather contains the real-mode
From: Jan Kiszka jan.kis...@siemens.com
Now that we provide EPT support, there is no reason to torture our
guests by hiding the relieving unrestricted guest mode feature. We just
need to relax CR0 checks for always-on bits as PE and PG can now be
switched off.
Signed-off-by: Jan Kiszka jan.kis
From: Jan Kiszka jan.kis...@siemens.com
This job is normally performed by the architectural EFER set service
which we cannot use as it prevents transitions that are valid when
switching between L1 and L2. So open-code the update of base_role.nxe
after changing EFER on VM-entry and exit.
Signed
From: Jan Kiszka jan.kis...@siemens.com
Implement and advertise VM_EXIT_SAVE_IA32_EFER. L0 traps EFER writes
unconditionally, so we always find the current L2 value in the
architectural state.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/kvm/vmx.c |4 +++-
1 files changed
From: Jan Kiszka jan.kis...@siemens.com
We need to update EFER.NX before building the nEPT state via
nested_ept_init_mmu_context. Otherwise, we risk to create an MMU context
that claims to have NX disabled while the guest EPT used NX. This will
cause spurious faults for L2.
Signed-off-by: Jan
On 2013-08-04 20:04, Arthur Chunqi Li wrote:
@@ -432,6 +432,22 @@ enum Ctrl1 {
#define HYPERCALL_MASK 0xFFF
#define HYPERCALL_VMEXIT 0x1
+
+extern u64 hypercall_field;
+extern u32 vpid_cnt;
+extern ulong fix_cr0_set, fix_cr0_clr;
+extern ulong fix_cr4_set,
On 2013-08-04 20:25, Gmail wrote:
在 2013-8-5，2:08，Jan Kiszka jan.kis...@web.de 写道：
On 2013-08-04 20:04, Arthur Chunqi Li wrote:
@@ -432,6 +432,22 @@ enum Ctrl1 {
#define HYPERCALL_MASK0xFFF
#define HYPERCALL_VMEXIT0x1
+
+extern u64 hypercall_field;
+extern u32 vpid_cnt
On 2013-08-02 05:04, Zhang, Yang Z wrote:
Gleb Natapov wrote on 2013-08-01:
From: Nadav Har'El n...@il.ibm.com
Recent KVM, since
http://kerneltrap.org/mailarchive/linux-kvm/2010/5/2/6261577
switch the EFER MSR when EPT is used and the host and guest have different
NX bits. So if we add
On 2013-08-02 09:27, Zhang, Yang Z wrote:
Jan Kiszka wrote on 2013-08-02:
On 2013-08-02 05:04, Zhang, Yang Z wrote:
Gleb Natapov wrote on 2013-08-01:
From: Nadav Har'El n...@il.ibm.com
Recent KVM, since
http://kerneltrap.org/mailarchive/linux-kvm/2010/5/2/6261577
switch the EFER MSR when
If posted interrupts are enabled, we can no longer track if an IRQ was
coalesced based on IRR. So drop this logic also from the classic
software path and simplify apic_test_and_set_irr to apic_set_irr.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/kvm/lapic.c | 23
Both have no users anymore.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/kvm/lapic.c | 10 --
1 files changed, 0 insertions(+), 10 deletions(-)
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index 9dc3650..c98f054 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch
On 2013-07-25 07:31, Arthur Chunqi Li wrote:
This is the first version of VMX nested environment. It contains the
basic VMX instructions test cases, including VMXON/VMXOFF/VMXPTRLD/
VMXPTRST/VMCLEAR/VMLAUNCH/VMRESUME/VMCALL. This patchalso tests the
basic execution routine in VMX nested
On 2013-07-25 18:51, Bandan Das wrote:
Arthur Chunqi Li yzt...@gmail.com writes:
This is the first version of VMX nested environment. It contains the
basic VMX instructions test cases, including VMXON/VMXOFF/VMXPTRLD/
VMXPTRST/VMCLEAR/VMLAUNCH/VMRESUME/VMCALL. This patchalso tests the
basic
On 2013-07-24 10:48, Arthur Chunqi Li wrote:
So as what Gleb said, what about the following codes:
static int vmx_run2()
{
u32 eax;
bool ret;
asm volatile(
mov %%rsp, %%rsi\n\t
mov %2, %%edi\n\t
call vmcs_write\n\t
vmlaunch\n\t
Just like
On 2013-07-24 11:56, Arthur Chunqi Li wrote:
So what about this one. I merged all the exit reason to ret and
remove the flag detection after vmlaunch/vmresume (because I think
this detection is useless). Currently we support only one guest, so
variant launched is located in vmx_run(). If we
On 2013-07-24 12:16, Arthur Chunqi Li wrote:
On Wed, Jul 24, 2013 at 6:03 PM, Jan Kiszka jan.kis...@web.de wrote:
On 2013-07-24 11:56, Arthur Chunqi Li wrote:
So what about this one. I merged all the exit reason to ret and
remove the flag detection after vmlaunch/vmresume (because I think
On 2013-07-24 13:20, Arthur Chunqi Li wrote:
And what about this version:
static int vmx_run()
{
u32 ret = 0;
asm volatile(
mov %%rsp, %%rsi\n\t
mov %2, %%edi\n\t
call vmcs_write\n\t
0:
LOAD_GPR_C
cmpl $0, %1\n\t
On 2013-07-17 08:05, Arthur Chunqi Li wrote:
This is the first version for VMX nested environment test case. It
contains the basic VMX instructions test cases, including VMXON/
VMXOFF/VMXPTRLD/VMXPTRST/VMCLEAR/VMLAUNCH/VMRESUME/VMCALL. This patch
also tests the basic execution routine in VMX
On 2013-07-17 12:31, Gleb Natapov wrote:
I think the current version is mostly fine, but I'd prefer to move the
inline functions to vmx.h, and the tests to a separate file. Perhaps
lib/x86/vmx.h, lib/x86/vmx.c, and x86/vmx.c.
All knowledge of setjmp and longjmp should then be hidden in
On 2013-07-03 18:05, Arthur Chunqi Li wrote:
Set success rflags after emulating VMXON/VMXOFF in nested environment.
Re-arrange the code sequence of 3 functions,
nested_vmx_succeed()/failValid()/failInvalid(), to avoid double
declaration in the same file.
Just don't forget to provide
On 2013-07-02 15:59, Gleb Natapov wrote:
On Tue, Jul 02, 2013 at 03:01:24AM +, Zhang, Yang Z wrote:
Since this series is pending in mail list for long time. And it's really a
big feature for Nested. Also, I doubt the original authors(Jun and
Nahav)should not have enough time to continue
On 2013-07-02 17:15, Gleb Natapov wrote:
On Tue, Jul 02, 2013 at 04:28:56PM +0200, Jan Kiszka wrote:
On 2013-07-02 15:59, Gleb Natapov wrote:
On Tue, Jul 02, 2013 at 03:01:24AM +, Zhang, Yang Z wrote:
Since this series is pending in mail list for long time. And it's really a
big feature
On 2013-06-27 13:38, Paolo Bonzini wrote:
Il 27/06/2013 13:09, Gleb Natapov ha scritto:
On Tue, Jun 25, 2013 at 06:34:03PM -0400, Paul Gortmaker wrote:
In commit e935b8372cf8 (KVM: Convert kvm_lock to raw_spinlock),
I am copying Jan, the author of the patch. Commit message says:
Code under
From: Jan Kiszka jan.kis...@siemens.com
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
x86-run |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/x86-run b/x86-run
index 14ff331..646c577 100755
--- a/x86-run
+++ b/x86-run
@@ -33,7 +33,7 @@ else
pc_testdev
On 2013-06-26 08:15, Gleb Natapov wrote:
On Wed, Jun 26, 2013 at 07:49:37AM +0200, Jan Kiszka wrote:
On 2013-06-24 14:19, Gleb Natapov wrote:
This reverts most of the f1ed0450a5fac7067590317cbf027f566b6ccbca. After
the commit kvm_apic_set_irq() no longer returns accurate information
about
On 2013-06-05 11:06, Kashyap Chamarthy wrote:
Adding Jan, Jun, to see if they have any inputs here.
Thanks for the note, it's very helpful! This test actually fails on
older CPUs as well, and I can finally reproduce the issue that Jay also
reported. I'm not able to cure it by going back to
..
commit 3b656cf764cbc43d3efb9bf5f45c618d4cf0989f
Author: Jan Kiszka jan.kis...@siemens.com
Date: Sun Apr 14 12:12:45 2013 +0200
KVM: nVMX: Fix injection of PENDING_INTERRUPT and NMI_WINDOW exits to L1
Check if the interrupt or NMI window exit is for L1 by testing
On 2013-06-24 14:19, Gleb Natapov wrote:
This reverts most of the f1ed0450a5fac7067590317cbf027f566b6ccbca. After
the commit kvm_apic_set_irq() no longer returns accurate information
about interrupt injection status if injection is done into disabled
APIC. RTC interrupt coalescing tracking
On 2013-06-20 12:45, Arthur Chunqi Li wrote:
Add a function trap_emulator to run an instruction in emulator.
Set inregs first (%rax is invalid because it is used as return
address), put instruction codec in alt_insn and call func with
alt_insn_length. Get results in outregs.
Small hint: You
On 2013-06-20 13:47, Gleb Natapov wrote:
Jan ping, are you OK with what I proposed below?
On Thu, Jun 06, 2013 at 11:53:52AM +0300, Gleb Natapov wrote:
Hi Jan,
I bisected [1] to f1ed0450a5fac7067590317cbf027f566b6ccbca. Fortunately
further investigation showed that it is not really related
On 2013-06-20 22:29, Gleb Natapov wrote:
On Thu, Jun 20, 2013 at 10:10:18PM +0200, Jan Kiszka wrote:
On 2013-06-20 13:47, Gleb Natapov wrote:
Jan ping, are you OK with what I proposed below?
On Thu, Jun 06, 2013 at 11:53:52AM +0300, Gleb Natapov wrote:
Hi Jan,
I bisected [1
On 2013-05-30 19:58, 李春奇 Arthur Chunqi Li wrote:
Hi there,
I'm now reading codes of kvm-unit-tests and I found that some of the
test cases for x86 is only designed for x86_64 (including access.flat,
apic.flat, emulator.flat, idt_test.flat and so on). I wonder why these
cases are not designed
On 2013-05-15 16:59, Paolo Bonzini wrote:
Il 15/05/2013 03:24, Ren, Yongjie ha scritto:
-Original Message-
From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org]
On Behalf Of Alex Palesandro
Sent: Tuesday, May 14, 2013 10:51 PM
To: kvm@vger.kernel.org
Subject: Fwd: Xen
On 2013-05-15 19:45, Gleb Natapov wrote:
On Wed, May 15, 2013 at 07:43:25PM +0200, Jan Kiszka wrote:
On 2013-05-15 16:59, Paolo Bonzini wrote:
Il 15/05/2013 03:24, Ren, Yongjie ha scritto:
-Original Message-
From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org]
On Behalf
On 2013-05-12 18:52, Kashyap Chamarthy wrote:
[ 217.938034] Uhhuh. NMI received for unknown reason 30 on CPU 0.
[ 217.938034] Do you have a strange power saving mode enabled?
.[ 222.523373] Uhhuh. NMI received for unknown reason 20 on CPU 0.
[ 222.524073] Do you
On 2013-05-13 08:45, Ren, Yongjie wrote:
-Original Message-
From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org]
On Behalf Of Gleb Natapov
Sent: Monday, May 13, 2013 2:39 PM
To: Jan Kiszka
Cc: Kashyap Chamarthy; Abel Gordon; Nakajima, Jun;
kvm@vger.kernel.org; kvm-ow
On 2013-05-10 15:00, Kashyap Chamarthy wrote:
Heya,
This is on Intel Haswell.
First, some version info:
L0, L1 -- both of them have same versions of kernel, qemu:
=
$ rpm -q kernel --changelog | head -2
* Thu May 09 2013 Josh Boyer - 3.10.0-0.rc0.git23.1
- Linux
On 2013-05-10 17:12, Jan Kiszka wrote:
On 2013-05-10 15:00, Kashyap Chamarthy wrote:
Heya,
This is on Intel Haswell.
First, some version info:
L0, L1 -- both of them have same versions of kernel, qemu:
=
$ rpm -q kernel --changelog | head -2
* Thu May 09 2013 Josh Boyer - 3.10.0-0
On 2013-05-10 17:39, Kashyap Chamarthy wrote:
On Fri, May 10, 2013 at 8:54 PM, Jan Kiszka jan.kis...@siemens.com wrote:
On 2013-05-10 17:12, Jan Kiszka wrote:
On 2013-05-10 15:00, Kashyap Chamarthy wrote:
Heya,
This is on Intel Haswell.
First, some version info:
L0, L1 -- both of them
On 2013-05-10 19:40, Nakajima, Jun wrote:
On Fri, May 10, 2013 at 9:33 AM, Jan Kiszka jan.kis...@siemens.com wrote:
On 2013-05-10 17:39, Kashyap Chamarthy wrote:
On Fri, May 10, 2013 at 8:54 PM, Jan Kiszka jan.kis...@siemens.com wrote:
On 2013-05-10 17:12, Jan Kiszka wrote:
On 2013-05-10 15
)
+{
+return 0x;
+}
+
static const MemoryRegionOps vapic_ops = {
.write = vapic_write,
+.read = vapic_read,
.endianness = DEVICE_NATIVE_ENDIAN,
};
Right. I'm just wondering why the guest reads from that port.
Reviewed-by: Jan Kiszka jan.kis...@siemens.com
On 2013-05-06 09:04, Jun Nakajima wrote:
Recent KVM, since http://kerneltrap.org/mailarchive/linux-kvm/2010/5/2/6261577
switch the EFER MSR when EPT is used and the host and guest have different
NX bits. So if we add support for nested EPT (L1 guest using EPT to run L2)
and want to be able to
On 2013-04-30 14:42, Jan Kiszka wrote:
On 2013-04-30 13:46, Gleb Natapov wrote:
On Sun, Apr 28, 2013 at 12:20:38PM +0200, Jan Kiszka wrote:
On 2013-02-23 22:35, Jan Kiszka wrote:
From: Jan Kiszka jan.kis...@siemens.com
Likely a typo, but a fatal one as kvm_set_cr0 performs checks
On 2013-05-04 09:50, 李春奇 Arthur Chunqi Li wrote:
Hi Jan and All,
I find that when enable KVM with qemu, vendor ID of simulated CPU will be
set the same as host, but other features such as level, family, model,
stepping are not changed. This may bring out a confusing result, the
simulated CPU
Please don't top-post.
On 2013-05-04 10:45, 李春奇 Arthur Chunqi Li wrote:
But will the difference between the vendor ID and family number cause
confusion to the OS in VM?
The confusion is not yet clear to me. About which -cpu ... were you
talking?
Jan
On Sat, May 4, 2013 at 4:05 PM, Jan
On 2013-05-04 10:52, 李春奇 Arthur Chunqi Li wrote:
On Sat, May 4, 2013 at 4:47 PM, Jan Kiszka jan.kis...@web.de wrote:
Please don't top-post.
On 2013-05-04 10:45, 李春奇 Arthur Chunqi Li wrote:
But will the difference between the vendor ID and family number cause
confusion to the OS in VM
On 2013-05-03 08:19, Xiao Guangrong wrote:
On 05/01/2013 01:38 PM, Jordan Justen wrote:
Don't use #ifdef __KVM_HAVE_READONLY_MEM when defining
KVM_CAP_READONLY_MEM.
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
Cc: Xiao Guangrong xiaoguangr...@linux.vnet.ibm.com
Cc: Jan Kiszka
On 2013-05-03 09:33, Binarus wrote:
Hi all,
a while ago, I have set up a KVM virtual machine with PCI passthrough.
The device which is passed through is an AVM Fritz!card PCI v2.1.
This works, but there is a drawback: At that time, KVM was not able to
do PCI passthrough for PCI devices
On 2013-05-03 16:37, Alex Williamson wrote:
On Fri, 2013-05-03 at 10:35 +0200, Jan Kiszka wrote:
On 2013-05-03 09:33, Binarus wrote:
Hi all,
a while ago, I have set up a KVM virtual machine with PCI passthrough.
The device which is passed through is an AVM Fritz!card PCI v2.1.
This works
On 2013-05-02 08:59, Xu, Xinhao wrote:
Hi, Jan
Can you provide details of your test environment?
Pretty simple: Run a Linux 3.9(-rc5) kernel as L2 on top of the same
kernel with QEMU (git head at that time). I've attached the config.
Jan
-Original Message-
From: Jan Kiszka
On 2013-04-30 13:46, Gleb Natapov wrote:
On Sun, Apr 28, 2013 at 12:20:38PM +0200, Jan Kiszka wrote:
On 2013-02-23 22:35, Jan Kiszka wrote:
From: Jan Kiszka jan.kis...@siemens.com
Likely a typo, but a fatal one as kvm_set_cr0 performs checks on the
state transition that may prevent loading
With VMX, enable_irq_window can now return -EBUSY, in which case an
immediate exit shall be requested before entering the guest. Account for
this also in enable_nmi_window which uses enable_irq_window in absence
of vnmi support, e.g.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
Changes
On 2013-04-29 20:33, Gabriel L. Somlo wrote:
Jan,
Bisect says that commit 4fb60de74f93a601775dbda053b3237634d7a417
That commit alone is broken as it depends on the refactorings being
selected by the submodule update.
Does the problem persist with current master checked out into a clean
On 2013-04-29 21:44, Gabriel L. Somlo wrote:
On Mon, Apr 29, 2013 at 09:06:37PM +0200, Jan Kiszka wrote:
Bisect says that commit 4fb60de74f93a601775dbda053b3237634d7a417
That commit alone is broken as it depends on the refactorings being
selected by the submodule update.
Does the problem
On 2013-04-29 22:30, Gabriel L. Somlo wrote:
On Mon, Apr 29, 2013 at 10:09:42PM +0200, Jan Kiszka wrote:
On 2013-04-29 21:44, Gabriel L. Somlo wrote:
On Mon, Apr 29, 2013 at 09:06:37PM +0200, Jan Kiszka wrote:
Bisect says that commit 4fb60de74f93a601775dbda053b3237634d7a417
Linking should
On 2013-04-29 22:39, Gabriel L. Somlo wrote:
On Mon, Apr 29, 2013 at 10:33:29PM +0200, Jan Kiszka wrote:
I dare to say that ../kvm/virt/kvm/irqchip.c does not exit, thus your
external kvm directory is not recent enough.
That's weird, I just did a
git clone git://git.kernel.org/pub
From: Jan Kiszka jan.kis...@siemens.com
The VMX implementation of enable_irq_window will raise
KVM_REQ_IMMEDIATE_EXIT if an interrupt window shall be opened during
nested vmrun. We have to transfer this request into the local variable
to avoid looping over a continuously re-asserted request
From: Jan Kiszka jan.kis...@siemens.com
While a nested run is pending, vmx_queue_exception is only called to
requeue exceptions that were previously picked up via
vmx_cancel_injection. Therefore, we must not check for PF interception
by L1, possibly causing a bogus nested vmexit.
Signed-off
From: Jan Kiszka jan.kis...@siemens.com
The VMX implementation of enable_irq_window raised
KVM_REQ_IMMEDIATE_EXIT after we checked it in vcpu_enter_guest. This
caused infinite loops on vmentry. Fix it by letting enable_irq_window
signal the need for an immediate exit via its return value and drop
On 2013-04-26 08:43, Jun Nakajima wrote:
Advertise the support of EPT to the L1 guest, through the appropriate MSR.
This is the last patch of the basic Nested EPT feature, so as to allow
bisection through this patch series: The guest will not see EPT support until
this last patch, and will
On 2013-04-27 08:42, Xu, Xinhao wrote:
From 2df72c1e8e3b167a6008ab11e2a68d734c68e425 Mon Sep 17 00:00:00 2001
From: Xinhao Xu xinhao...@intel.com
Date: Sat, 27 Apr 2013 05:45:49 +0800
Subject: [PATCH] nEPT: Check EPT misconfiguration while walking addr move
pte
check code to vmx.c
Please
On 2013-04-26 18:07, Nakajima, Jun wrote:
On Thu, Apr 25, 2013 at 11:26 PM, Jan Kiszka jan.kis...@web.de wrote:
That's great but - as Gleb already said - unfortunately not yet usable.
I'd like to rebase my fixes and enhancements (unrestricted guest mode
specifically) on top these days
On 2013-03-17 09:47, Gleb Natapov wrote:
On Sat, Mar 16, 2013 at 09:49:07PM +0100, Jan Kiszka wrote:
From: Jan Kiszka jan.kis...@siemens.com
If the guest didn't take the last APIC timer interrupt yet and generates
another one on top, e.g. via periodic mode, we do not block the VCPU
even
On 2013-04-28 12:19, Gleb Natapov wrote:
On Sun, Apr 28, 2013 at 12:15:05PM +0200, Jan Kiszka wrote:
On 2013-03-17 09:47, Gleb Natapov wrote:
On Sat, Mar 16, 2013 at 09:49:07PM +0100, Jan Kiszka wrote:
From: Jan Kiszka jan.kis...@siemens.com
If the guest didn't take the last APIC timer
On 2013-02-23 22:35, Jan Kiszka wrote:
From: Jan Kiszka jan.kis...@siemens.com
Likely a typo, but a fatal one as kvm_set_cr0 performs checks on the
state transition that may prevent loading L1's cr0.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/kvm/vmx.c |2 +-
1
From: Jan Kiszka jan.kis...@siemens.com
Since the arrival of posted interrupt support we can no longer guarantee
that coalesced IRQs are always reported to the IRQ source. Moreover,
accumulated APIC timer events could cause a busy loop when a VCPU should
rather be halted. The consensus
From: Jan Kiszka jan.kis...@siemens.com
Since the arrival of posted interrupt support we can no longer guarantee
that coalesced IRQs are always reported to the IRQ source. Moreover,
accumulated APIC timer events could cause a busy loop when a VCPU should
rather be halted. The consensus
On 2013-04-28 18:20, Ren, Yongjie wrote:
-Original Message-
From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org]
On Behalf Of Gleb Natapov
Sent: Sunday, April 28, 2013 10:34 PM
To: Ren, Yongjie
Cc: Jan Kiszka; Marcelo Tosatti; kvm; Nakajima, Jun
Subject: Re: [PATCH
From: Jan Kiszka jan.kis...@siemens.com
With VMX, enable_irq_window can now return -EBUSY, in which case an
immediate exit shall be requested before entering the guest. Account for
this also in enable_nmi_window which uses enable_irq_window in absence
of vnmi support, e.g.
Signed-off-by: Jan
From: Jan Kiszka jan.kis...@siemens.com
Slipped in while copypasting from the SDM.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/kvm/vmx.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 7a320f4..d663a59
On 2013-04-27 08:02, Ren, Yongjie wrote:
CCed Jan Kiszka.
I did some bisection and found the following commit introduced this bug.
The bug still exists in the latest kvm.git next branch.
commit 5f3d5799974b89100268ba813cec8db7bd0693fb
Author: Jan Kiszka jan.kis...@siemens.com
Date: Sun
On 2013-04-25 10:00, Nakajima, Jun wrote:
On Wed, Apr 24, 2013 at 8:55 AM, Nakajima, Jun jun.nakaj...@intel.com wrote:
Sorry about the slow progress. We've been distracted by some priority
things. The patches are ready (i.e. working), but we are cleaning them
up. I'll send what we have today.
On 2013-03-22 17:45, Jan Kiszka wrote:
On 2013-03-22 07:23, Nakajima, Jun wrote:
On Mon, Mar 4, 2013 at 8:45 PM, Nakajima, Jun jun.nakaj...@intel.com wrote:
I have some updates on this. We rebased the patched to the latest KVM
(L0). It turned out that the version of L1 KVM/Linux matters
On 2013-04-24 17:55, Nakajima, Jun wrote:
On Wed, Apr 24, 2013 at 12:25 AM, Jan Kiszka jan.kis...@web.de wrote:
I don't have a full picture (already asked you to post / git-push your
intermediate state), but nested related states typically go to
nested_vmx, thus vcpu_vmx.
Ping regarding
As we may emulate the loading of EFER on VM-entry and VM-exit, implement
the checks that VMX performs on the guest and host values on vmlaunch/
vmresume. Factor out kvm_valid_efer for this purpose which checks for
set reserved bits.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
Changes
On 2013-04-16 05:49, 李春奇 Arthur Chunqi Li wrote:
I changed to the latest version of kvm kernel but the bug also occured.
On the startup of L1 VM on the host, the host kern.log will output:
Apr 16 11:28:22 Blade1-02 kernel: [ 4908.458090] kvm [2808]: vcpu0
unhandled rdmsr: 0x345
Apr 16
On 2013-04-16 12:19, 李春奇 Arthur Chunqi Li wrote:
I looked up Intel manual for VM instruction error. Error number 7 means VM
entry with invalid control field(s), which means in process of VM
switching some control fields are not properly configured.
I wonder why some emulated CPUs
On 2013-04-15 08:24, 李春奇 Arthur Chunqi Li wrote:
Hi all,
In a nested virtualization environment of qemu+KVM, some emulated CPU (such
as core2duo) may cause L2 guest crash after booting for a while. Here's my
configuration:
Host:
Linux 3.5.7
You should better use latest version from
On 2013-04-15 14:46, Paolo Bonzini wrote:
KVM does not use the activity state VMCS field, and does not support
it in nested VMX either (the corresponding bits in the misc VMX feature
MSR are zero). Fail entry if the activity state is set to anything but
active.
Ah, that indeed simplifies the
(GUEST_ACTIVITY_STATE);
vmcs12-guest_interruptibility_info =
vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
vmcs12-guest_pending_dbg_exceptions =
Reviewed-by: Jan Kiszka jan.kis...@siemens.com
--
Siemens AG, Corporate Technology, CT RTC ITP SDP-DE
Corporate Competence Center Embedded
On 2013-04-13 20:24, Mohit Dhingra wrote:
Hi All,
I am Mohit Dhingra, planning to work in GSoC project Improve nested
virtualization support for x86. I got in touch with Jan
(jan.kis...@web.de) few days back.
As suggested by him, I am trying to write a simple unit test which
tests the
From: Jan Kiszka jan.kis...@siemens.com
The basic idea is to always transfer the pending event injection on
vmexit into the architectural state of the VCPU and then drop it from
there if it turns out that we left L2 to enter L1, i.e. if we enter
prepare_vmcs12.
vmcs12_save_pending_events takes
From: Jan Kiszka jan.kis...@siemens.com
vmx_set_nmi_mask will soon be used by vmx_nmi_allowed. No functional
changes.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/kvm/vmx.c | 20 ++--
1 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/x86
From: Jan Kiszka jan.kis...@siemens.com
Check if the interrupt or NMI window exit is for L1 by testing if it has
the corresponding controls enabled. This is required when we allow
direct injection from L0 to L2
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
Reviewed-by: Gleb Natapov g
From: Jan Kiszka jan.kis...@siemens.com
If we are entering guest mode, we do not want L0 to interrupt this
vmentry with all its side effects on the vmcs. Therefore, injection
shall be disallowed during L1-L2 transitions, as in the previous
version. However, this check is conceptually independent
From: Jan Kiszka jan.kis...@siemens.com
We only need to update vm_exit_intr_error_code if there is a valid exit
interruption information and it comes with a valid error code.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/kvm/vmx.c |6 +-
1 files changed, 5 insertions
From: Jan Kiszka jan.kis...@siemens.com
The logic for checking if interrupts can be injected has to be applied
also on NMIs. The difference is that if NMI interception is on these
events are consumed and blocked by the VM exit.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/kvm
optimization patch 6
Jan Kiszka (6):
KVM: nVMX: Fix injection of PENDING_INTERRUPT and NMI_WINDOW exits to
L1
KVM: nVMX: Rework event injection and recovery
KVM: VMX: Move vmx_nmi_allowed after vmx_set_nmi_mask
KVM: nVMX: Fix conditions for interrupt injection
KVM: nVMX: Fix conditions for NMI
On 2013-04-14 12:07, Gleb Natapov wrote:
On Sun, Apr 14, 2013 at 01:00:10PM +0300, Gleb Natapov wrote:
On Sun, Apr 14, 2013 at 12:51:34PM +0300, Abel Gordon wrote:
Gleb Natapov g...@redhat.com wrote on 12/04/2013 01:48:04 PM:
On Fri, Apr 12, 2013 at 01:44:14PM +0300, Abel Gordon wrote:
From: Jan Kiszka jan.kis...@siemens.com
As we may emulate the loading of EFER on VM-entry and VM-exit, implement
the checks that VMX performs on the guest and host values on vmlaunch/
vmresume. Factor out kvm_valid_efer for this purpose which checks for
set reserved bits.
Signed-off-by: Jan
From: Jan Kiszka jan.kis...@siemens.com
If we load the complete EFER MSR on entry or exit, EFER.LMA (and LME)
loading is skipped. Their consistency is already checked now before
starting the transition.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/kvm/vmx.c |4 ++--
1 files
On 2013-04-14 17:23, Gleb Natapov wrote:
On Sun, Apr 14, 2013 at 12:12:49PM +0200, Jan Kiszka wrote:
From: Jan Kiszka jan.kis...@siemens.com
The logic for checking if interrupts can be injected has to be applied
also on NMIs. The difference is that if NMI interception is on these
events
On 2013-04-14 18:18, Gleb Natapov wrote:
On Sun, Apr 14, 2013 at 05:53:05PM +0200, Jan Kiszka wrote:
On 2013-04-14 17:23, Gleb Natapov wrote:
On Sun, Apr 14, 2013 at 12:12:49PM +0200, Jan Kiszka wrote:
From: Jan Kiszka jan.kis...@siemens.com
The logic for checking if interrupts can
From: Jan Kiszka jan.kis...@siemens.com
The logic for checking if interrupts can be injected has to be applied
also on NMIs. The difference is that if NMI interception is on these
events are consumed and blocked by the VM exit.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/kvm
On 2013-04-11 16:29, Gleb Natapov wrote:
On Thu, Apr 11, 2013 at 04:27:23PM +0200, Jan Kiszka wrote:
On 2013-04-11 13:20, Gleb Natapov wrote:
On Sun, Mar 24, 2013 at 07:44:47PM +0100, Jan Kiszka wrote:
From: Jan Kiszka jan.kis...@siemens.com
If we are in guest mode, L0 can only inject events
On 2013-04-11 13:20, Gleb Natapov wrote:
On Sun, Mar 24, 2013 at 07:44:47PM +0100, Jan Kiszka wrote:
From: Jan Kiszka jan.kis...@siemens.com
If we are in guest mode, L0 can only inject events into L2 if L1 has
nothing pending. Otherwise, L0 would overwrite L1's events and they
would get lost
On 2013-04-10 15:42, Gleb Natapov wrote:
On Sun, Mar 24, 2013 at 07:44:45PM +0100, Jan Kiszka wrote:
From: Jan Kiszka jan.kis...@siemens.com
The basic idea is to always transfer the pending event injection on
vmexit into the architectural state of the VCPU and then drop it from
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