On Wed, Dec 09, 2015 at 11:34:07AM +0100, Thomas Huth wrote:
> Only using 32 memslots for KVM on powerpc is way too low, you can
> nowadays hit this limit quite fast by adding a couple of PCI devices
> and/or pluggable memory DIMMs to the guest.
>
> x86 already increased the KVM_USER_MEM_SLOTS to
On Fri, Nov 20, 2015 at 09:11:45AM +0100, Thomas Huth wrote:
> In the old DABR register, the BT (Breakpoint Translation) bit
> is bit number 61. In the new DAWRX register, the WT (Watchpoint
> Translation) bit is bit number 59. So to move the DABR-BT bit
> into the position of the DAWRX-WT bit, it
On Tue, Dec 01, 2015 at 08:42:10PM -0300, Geyslan G. Bem wrote:
> The vcpu_book3s struct is assigned but never used. So remove it.
>
> Signed-off-by: Geyslan G. Bem
Thanks, applied to my kvm-ppc-next branch.
Paul.
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On Wed, Dec 09, 2015 at 11:34:07AM +0100, Thomas Huth wrote:
> Only using 32 memslots for KVM on powerpc is way too low, you can
> nowadays hit this limit quite fast by adding a couple of PCI devices
> and/or pluggable memory DIMMs to the guest.
>
> x86 already increased the KVM_USER_MEM_SLOTS to
On Fri, Nov 20, 2015 at 09:11:45AM +0100, Thomas Huth wrote:
> In the old DABR register, the BT (Breakpoint Translation) bit
> is bit number 61. In the new DAWRX register, the WT (Watchpoint
> Translation) bit is bit number 59. So to move the DABR-BT bit
> into the position of the DAWRX-WT bit, it
On Tue, Dec 01, 2015 at 08:42:10PM -0300, Geyslan G. Bem wrote:
> The vcpu_book3s struct is assigned but never used. So remove it.
>
> Signed-off-by: Geyslan G. Bem
Thanks, applied to my kvm-ppc-next branch.
Paul.
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)
Paul Mackerras (1):
KVM: PPC: Book3S HV: Prohibit setting illegal transaction state in MSR
arch/powerpc/kvm/book3s_hv.c | 6 ++
1 file changed, 6 insertions(+)
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Paul Mackerras (1):
KVM: PPC: Book3S HV: Prohibit setting illegal transaction state in MSR
arch/powerpc/kvm/book3s_hv.c | 6 ++
1 file changed, 6 insertions(+)
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On Wed, Nov 04, 2015 at 10:03:48AM +0100, Thomas Huth wrote:
> Only using 32 memslots for KVM on powerpc is way too low, you can
> nowadays hit this limit quite fast by adding a couple of PCI devices
> and/or pluggable memory DIMMs to the guest.
> x86 already increased the limit to 512 in total,
On Wed, Nov 04, 2015 at 10:03:48AM +0100, Thomas Huth wrote:
> Only using 32 memslots for KVM on powerpc is way too low, you can
> nowadays hit this limit quite fast by adding a couple of PCI devices
> and/or pluggable memory DIMMs to the guest.
> x86 already increased the limit to 512 in total,
On Sun, Nov 29, 2015 at 05:14:03PM -0300, Geyslan Gregório Bem wrote:
> Hello,
>
> I have found a possible out of bounds reading in
> arch/powerpc/kvm/book3s_64_mmu.c (kvmppc_mmu_book3s_64_xlate
> function). pteg[] array could be accessed twice using the i variable
> after the for iteration. What
On Sun, Nov 29, 2015 at 05:14:03PM -0300, Geyslan Gregório Bem wrote:
> Hello,
>
> I have found a possible out of bounds reading in
> arch/powerpc/kvm/book3s_64_mmu.c (kvmppc_mmu_book3s_64_xlate
> function). pteg[] array could be accessed twice using the i variable
> after the for iteration. What
On Tue, Sep 15, 2015 at 08:49:35PM +1000, Alexey Kardashevskiy wrote:
> At the moment pages used for TCE tables (in addition to pages addressed
> by TCEs) are not counted in locked_vm counter so a malicious userspace
> tool can call ioctl(KVM_CREATE_SPAPR_TCE) as many times as RLIMIT_NOFILE and
>
On Tue, Sep 15, 2015 at 08:49:35PM +1000, Alexey Kardashevskiy wrote:
> At the moment pages used for TCE tables (in addition to pages addressed
> by TCEs) are not counted in locked_vm counter so a malicious userspace
> tool can call ioctl(KVM_CREATE_SPAPR_TCE) as many times as RLIMIT_NOFILE and
>
.
This closes the hole by making kvmppc_set_msr_hv() check for the
illegal combination and force the TS field to a safe value (00,
meaning non-transactional).
Signed-off-by: Paul Mackerras <pau...@samba.org>
---
arch/powerpc/kvm/book3s_hv.c | 6 ++
1 file changed, 6 insertions(+)
diff --git
previously used either KVMTEST_PR or KVMTEST. It
also means that SOFTEN_TEST_HV_201 becomes the same as SOFTEN_TEST_PR,
so we deleted SOFTEN_TEST_HV_201 and use SOFTEN_TEST_PR instead.
Signed-off-by: Paul Mackerras <pau...@samba.org>
---
arch/powerpc/include/asm/exception-64s.
that if the MCE occurred in hypervisor mode, we exit to the
host rather than trying to continue the guest.
Signed-off-by: Paul Mackerras <pau...@samba.org>
---
arch/powerpc/kvm/book3s_hv.c| 18 ++
arch/powerpc/kvm/book3s_hv_rmhandlers.S | 2 ++
2 files chang
.
This closes the hole by making kvmppc_set_msr_hv() check for the
illegal combination and force the TS field to a safe value (00,
meaning non-transactional).
Signed-off-by: Paul Mackerras <pau...@samba.org>
---
arch/powerpc/kvm/book3s_hv.c | 6 ++
1 file changed, 6 insertions(+)
diff --git
/powerpc.git kvm-ppc-fixes
for you to fetch changes up to f74f2e2e26199f695ca3df94f29e9ab7cb707ea4:
KVM: PPC: Book3S HV: Don't dynamically split core when already split
(2015-11-06 16:02:59 +1100)
Paul Mackerras (2):
KVM
/powerpc.git kvm-ppc-fixes
for you to fetch changes up to f74f2e2e26199f695ca3df94f29e9ab7cb707ea4:
KVM: PPC: Book3S HV: Don't dynamically split core when already split
(2015-11-06 16:02:59 +1100)
Paul Mackerras (2):
KVM
that if the MCE occurred in hypervisor mode, we exit to the
host rather than trying to continue the guest.
Signed-off-by: Paul Mackerras <pau...@samba.org>
---
arch/powerpc/kvm/book3s_hv.c| 18 ++
arch/powerpc/kvm/book3s_hv_rmhandlers.S | 2 ++
2 files chang
-by: Paul Mackerras <pau...@samba.org>
---
arch/powerpc/kvm/book3s_hv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 2280497..becad3a 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3
-by: Paul Mackerras <pau...@samba.org>
---
arch/powerpc/kvm/book3s_hv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 2280497..becad3a 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3
. That should cause the guest to reload an appropriate entry
into the SLB and retry the faulting instruction. If it still faults,
we should find an appropriate SLB entry next time and be able to handle
the fault.
Signed-off-by: Paul Mackerras <pau...@samba.org>
---
arch/power
. That should cause the guest to reload an appropriate entry
into the SLB and retry the faulting instruction. If it still faults,
we should find an appropriate SLB entry next time and be able to handle
the fault.
Signed-off-by: Paul Mackerras <pau...@samba.org>
---
arch/power
Book3S HV: Handle H_DOORBELL on the guest exit path
Mahesh Salgaonkar (1):
KVM: PPC: Book3S HV: Deliver machine check with MSR(RI=0) to guest as MCE
Nikunj A Dadhania (1):
KVM: PPC: Implement extension to report number of memslots
Paul Mackerras (2):
KVM: PPC: Book3S HV: Don't
Book3S HV: Handle H_DOORBELL on the guest exit path
Mahesh Salgaonkar (1):
KVM: PPC: Book3S HV: Deliver machine check with MSR(RI=0) to guest as MCE
Nikunj A Dadhania (1):
KVM: PPC: Implement extension to report number of memslots
Paul Mackerras (2):
KVM: PPC: Book3S HV: Don't
On Fri, Oct 16, 2015 at 08:41:31AM +0200, Thomas Huth wrote:
> Yes, we'll likely need this soon! 32 slots are not enough...
Would anyone object if I raised the limit for PPC to 512 slots?
Would that cause problems on embedded PPC, for instance?
Paul.
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On Fri, Oct 16, 2015 at 08:41:31AM +0200, Thomas Huth wrote:
> Yes, we'll likely need this soon! 32 slots are not enough...
Would anyone object if I raised the limit for PPC to 512 slots?
Would that cause problems on embedded PPC, for instance?
Paul.
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On Thu, Oct 01, 2015 at 03:58:03PM +0300, Laurentiu Tudor wrote:
> Fix couple of cases where we shift left a 32-bit
> value thus might get truncated results on 64-bit
> targets.
>
> Signed-off-by: Laurentiu Tudor
> Suggested-by: Scott Wood
On Fri, Sep 25, 2015 at 06:02:23PM +0300, Laurentiu Tudor wrote:
> Emulate TMCFG0 TMRN register exposing one HW thread per vcpu.
>
> Signed-off-by: Mihai Caraman
> [laurentiu.tu...@freescale.com: rebased on latest kernel, use
> define instead of hardcoded value,
On Wed, Sep 23, 2015 at 06:06:22PM +0300, Laurentiu Tudor wrote:
> The register is not currently used in the base kernel
> but will be in a forthcoming kvm patch.
>
> Signed-off-by: Laurentiu Tudor
Thanks, applied to my kvm-ppc-next branch.
Paul.
--
To
On Fri, Sep 25, 2015 at 06:02:23PM +0300, Laurentiu Tudor wrote:
> Emulate TMCFG0 TMRN register exposing one HW thread per vcpu.
>
> Signed-off-by: Mihai Caraman
> [laurentiu.tu...@freescale.com: rebased on latest kernel, use
> define instead of hardcoded value,
On Thu, Oct 01, 2015 at 03:58:03PM +0300, Laurentiu Tudor wrote:
> Fix couple of cases where we shift left a 32-bit
> value thus might get truncated results on 64-bit
> targets.
>
> Signed-off-by: Laurentiu Tudor
> Suggested-by: Scott Wood
On Thu, Sep 24, 2015 at 04:00:23PM +0200, Andrzej Hajda wrote:
> The function can return negative value.
>
> The problem has been detected using proposed semantic patch
> scripts/coccinelle/tests/assign_signed_to_unsigned.cocci [1].
>
> [1]: http://permalink.gmane.org/gmane.linux.kernel/2046107
the guest's point of view, the HPTE is valid.
Signed-off-by: Paul Mackerras <pau...@samba.org>
---
arch/powerpc/kvm/book3s_hv_rm_mmu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/powerpc/kvm/book3s_hv_rm_mmu.c
b/arch/powerpc/kvm/book3s_hv_rm_mmu.c
index c1df9bb..97e7f8c
the guest's point of view, the HPTE is valid.
Signed-off-by: Paul Mackerras <pau...@samba.org>
---
arch/powerpc/kvm/book3s_hv_rm_mmu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/powerpc/kvm/book3s_hv_rm_mmu.c
b/arch/powerpc/kvm/book3s_hv_rm_mmu.c
index c1df9bb..97e7f8c
where the HPT is allocated at the time the first VCPU is run, if
no HPT has been allocated by ioctl by that time.
Signed-off-by: Paul Mackerras <pau...@samba.org>
---
arch/powerpc/kvm/book3s_64_mmu_hv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/power
where the HPT is allocated at the time the first VCPU is run, if
no HPT has been allocated by ioctl by that time.
Signed-off-by: Paul Mackerras <pau...@samba.org>
---
arch/powerpc/kvm/book3s_64_mmu_hv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/power
in my kvm-ppc-fixes branch on
kernel.org. They were in linux-next today. I was going to send you a
pull request tomorrow, but if you are about to send stuff off to Linus
you could pull now from:
git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc.git kvm-ppc-fixes
The three patches in t
in my kvm-ppc-fixes branch on
kernel.org. They were in linux-next today. I was going to send you a
pull request tomorrow, but if you are about to send stuff off to Linus
you could pull now from:
git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc.git kvm-ppc-fixes
The three patches in t
e vcpu to finish
executing inside the guest, and then remove this vcore from the
preempted vcores list. That way, we avoid leaving this vcpu's vcore
on the preempted vcores list when the vcpu gets interrupted.
Fixes: ec2571650826
Reported-by: Thomas Huth <th...@redhat.com>
Signed-off-by: Pa
e vcpu to finish
executing inside the guest, and then remove this vcore from the
preempted vcores list. That way, we avoid leaving this vcpu's vcore
on the preempted vcores list when the vcpu gets interrupted.
Fixes: ec2571650826
Reported-by: Thomas Huth <th...@redhat.com>
Signed-off-by: Pa
On Sun, Sep 06, 2015 at 12:47:12PM -0700, Nathan Whitehorn wrote:
> Anything I can do to help move these along? It's a big performance
> improvement for FreeBSD guests.
These patches are in Paolo's kvm-ppc-next branch and should go into
Linus' tree in the next couple of days.
Paul.
--
To
On Sun, Sep 06, 2015 at 12:47:12PM -0700, Nathan Whitehorn wrote:
> Anything I can do to help move these along? It's a big performance
> improvement for FreeBSD guests.
These patches are in Paolo's kvm-ppc-next branch and should go into
Linus' tree in the next couple of days.
Paul.
--
To
Paolo,
Please pull the commits listed below into your tree. I would like
them to go in for 4.3 as they are all small bug fixes not new
features, and they all can only affect HV-mode KVM on IBM server
machines (in fact one has no effect on code at all since it is a typo
fix for a comment).
Paolo,
Please pull the commits listed below into your tree. I would like
them to go in for 4.3 as they are all small bug fixes not new
features, and they all can only affect HV-mode KVM on IBM server
machines (in fact one has no effect on code at all since it is a typo
fix for a comment).
Hi Stephen,
Please include the kvm-ppc-next branch of my powerpc git tree at:
git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc.git
to linux-next. This branch currently only has commits that are
intended to go into 4.3, and I won't put in any commits for 4.4 until
4.3-rc1 is out.
..@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <pau...@samba.org>
---
arch/powerpc/kvm/book3s_hv_rmhandlers.S | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index b07f045..2273dca 100644
--- a/a
unsplit_nap when the vcore pointer
in its PACA struct is set.
Fixes: b4deba5c41e9
Signed-off-by: Gautham R. Shenoy <e...@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <pau...@samba.org>
---
arch/powerpc/kvm/book3s_hv.c| 10 +-
arch/powerpc/kvm/book3s_hv_rmhandler
..@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <pau...@samba.org>
---
arch/powerpc/kvm/book3s_hv_rmhandlers.S | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index b07f045..2273dca 100644
--- a/a
unsplit_nap when the vcore pointer
in its PACA struct is set.
Fixes: b4deba5c41e9
Signed-off-by: Gautham R. Shenoy <e...@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <pau...@samba.org>
---
arch/powerpc/kvm/book3s_hv.c| 10 +-
arch/powerpc/kvm/book3s_hv_rmhandler
On Tue, Sep 01, 2015 at 11:41:18PM +0200, Thomas Huth wrote:
> The size of the Problem State Priority Boost Register is only
> 32 bits, so let's change the type of the corresponding variable
> accordingly to avoid future trouble.
Since we're already using lwz/stw in the assembly code in
On Tue, Sep 01, 2015 at 11:41:18PM +0200, Thomas Huth wrote:
> The size of the Problem State Priority Boost Register is only
> 32 bits, so let's change the type of the corresponding variable
> accordingly to avoid future trouble.
Since we're already using lwz/stw in the assembly code in
On Wed, Sep 02, 2015 at 08:25:05AM +1000, Benjamin Herrenschmidt wrote:
> On Tue, 2015-09-01 at 23:41 +0200, Thomas Huth wrote:
> > The size of the Problem State Priority Boost Register is only
> > 32 bits, so let's change the type of the corresponding variable
> > accordingly to avoid future
On Wed, Sep 02, 2015 at 08:25:05AM +1000, Benjamin Herrenschmidt wrote:
> On Tue, 2015-09-01 at 23:41 +0200, Thomas Huth wrote:
> > The size of the Problem State Priority Boost Register is only
> > 32 bits, so let's change the type of the corresponding variable
> > accordingly to avoid future
On Wed, Aug 26, 2015 at 11:34:26AM +0200, Alexander Graf wrote:
On 13.08.15 03:15, David Gibson wrote:
ec53500f kvm: Add VFIO device added a special KVM pseudo-device which is
used to handle any necessary interactions between KVM and VFIO.
Currently that device is built on x86 and
On Wed, Aug 26, 2015 at 11:34:26AM +0200, Alexander Graf wrote:
On 13.08.15 03:15, David Gibson wrote:
ec53500f kvm: Add VFIO device added a special KVM pseudo-device which is
used to handle any necessary interactions between KVM and VFIO.
Currently that device is built on x86 and
On Mon, Aug 10, 2015 at 11:27:31AM -0400, Nicholas Krause wrote:
This fixes the wrapper functions kvm_umap_hva_hv and the function
kvm_unmap_hav_range_hv to return the return value of the function
kvm_handle_hva or kvm_handle_hva_range that they are wrapped to
call internally rather then
On Mon, Aug 10, 2015 at 11:27:31AM -0400, Nicholas Krause wrote:
This fixes the wrapper functions kvm_umap_hva_hv and the function
kvm_unmap_hav_range_hv to return the return value of the function
kvm_handle_hva or kvm_handle_hva_range that they are wrapped to
call internally rather then
On Thu, Jul 23, 2015 at 02:02:51PM +0200, Alexander Graf wrote:
The host crash should only occur with dynamic micro-threading enabled,
which is not in Linus' tree, correct?
Correct.
Paul.
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On Thu, Jul 23, 2015 at 02:02:51PM +0200, Alexander Graf wrote:
The host crash should only occur with dynamic micro-threading enabled,
which is not in Linus' tree, correct?
Correct.
Paul.
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the body of a message to
-by: Paul Mackerras pau...@samba.org
---
arch/powerpc/kvm/book3s_hv.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 3d02276..fad52f2 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
since the runner task may have moved to another CPU.
Signed-off-by: Paul Mackerras pau...@samba.org
---
arch/powerpc/kvm/book3s_hv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 6e3ef30..3d02276 100644
since the runner task may have moved to another CPU.
Signed-off-by: Paul Mackerras pau...@samba.org
---
arch/powerpc/kvm/book3s_hv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 6e3ef30..3d02276 100644
This series contains two fixes for the new dynamic micro-threading
code that was added recently for HV-mode KVM on Power servers.
The patches are against Alex Graf's kvm-ppc-queue branch. Please
apply.
Paul.
arch/powerpc/kvm/book3s_hv.c | 12 +---
1 file changed, 9 insertions(+), 3
-by: Paul Mackerras pau...@samba.org
---
arch/powerpc/kvm/book3s_hv.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 3d02276..fad52f2 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
This series contains two fixes for the new dynamic micro-threading
code that was added recently for HV-mode KVM on Power servers.
The patches are against Alex Graf's kvm-ppc-queue branch. Please
apply.
Paul.
arch/powerpc/kvm/book3s_hv.c | 12 +---
1 file changed, 9 insertions(+), 3
, since we haven't switched to the guest context.
Signed-off-by: Paul Mackerras pau...@samba.org
---
v3: Rename MAX_THREADS to MAX_SMT_THREADS to avoid a compile warning
arch/powerpc/include/asm/kvm_book3s_asm.h | 20 ++
arch/powerpc/include/asm/kvm_host.h | 3 +
arch/powerpc/kernel/asm
, since we haven't switched to the guest context.
Signed-off-by: Paul Mackerras pau...@samba.org
---
v3: Rename MAX_THREADS to MAX_SMT_THREADS to avoid a compile warning
arch/powerpc/include/asm/kvm_book3s_asm.h | 20 ++
arch/powerpc/include/asm/kvm_host.h | 3 +
arch/powerpc/kernel/asm
, since we haven't switched to the guest context.
Signed-off-by: Paul Mackerras pau...@samba.org
---
v2: List allowed values for dynamic_mt_modes module parameter in the
module parameter description.
arch/powerpc/include/asm/kvm_book3s_asm.h | 20 ++
arch/powerpc/include/asm/kvm_host.h | 3
, since we haven't switched to the guest context.
Signed-off-by: Paul Mackerras pau...@samba.org
---
v2: List allowed values for dynamic_mt_modes module parameter in the
module parameter description.
arch/powerpc/include/asm/kvm_book3s_asm.h | 20 ++
arch/powerpc/include/asm/kvm_host.h | 3
...@vger.kernel.org # v3.17+
Signed-off-by: Paul Mackerras pau...@samba.org
---
arch/powerpc/kvm/book3s_hv_rm_mmu.c | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/kvm/book3s_hv_rm_mmu.c
b/arch/powerpc/kvm/book3s_hv_rm_mmu.c
index b027a89..c6d601c 100644
. These implementations
have been tested using a FreeBSD guest.
Signed-off-by: Paul Mackerras pau...@samba.org
---
arch/powerpc/kvm/book3s_hv_rm_mmu.c | 126 ++--
arch/powerpc/kvm/book3s_hv_rmhandlers.S | 4 +-
2 files changed, 121 insertions(+), 9 deletions(-)
diff --git a/arch
, since we haven't switched to the guest context.
Signed-off-by: Paul Mackerras pau...@samba.org
---
arch/powerpc/include/asm/kvm_book3s_asm.h | 20 ++
arch/powerpc/include/asm/kvm_host.h | 3 +
arch/powerpc/kernel/asm-offsets.c | 7 +
arch/powerpc/kvm/book3s_hv.c | 369
...@vger.kernel.org # v3.17+
Signed-off-by: Paul Mackerras pau...@samba.org
---
arch/powerpc/kvm/book3s_hv_rm_mmu.c | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/kvm/book3s_hv_rm_mmu.c
b/arch/powerpc/kvm/book3s_hv_rm_mmu.c
index b027a89..c6d601c 100644
...@gibson.dropbear.id.au
Tested-by: Laurent Vivier lviv...@redhat.com
Signed-off-by: Paul Mackerras pau...@samba.org
---
arch/powerpc/include/asm/kvm_host.h | 19 +-
arch/powerpc/kernel/asm-offsets.c | 2 +
arch/powerpc/kvm/book3s_hv.c| 333 ++--
arch/powerpc
This is my current queue of patches for HV KVM. This series is based
on the kvm next branch. They have all been posted 6 weeks ago or
more, though I have just added a 3-line fix to patch 2/5 to fix a bug
that we found in testing migration, and I expanded a comment (no code
change) in patch 3/5
This is my current queue of patches for HV KVM. This series is based
on the kvm next branch. They have all been posted 6 weeks ago or
more, though I have just added a 3-line fix to patch 2/5 to fix a bug
that we found in testing migration, and I expanded a comment (no code
change) in patch 3/5
, since we haven't switched to the guest context.
Signed-off-by: Paul Mackerras pau...@samba.org
---
v2: Add a test (3 lines) to book3s_hv_rmhandlers.S to ensure that we
don't subtract the timebase offset in cases where we didn't add it.
This fixes a bug found in testing where the timebase could get
, since we haven't switched to the guest context.
Signed-off-by: Paul Mackerras pau...@samba.org
---
v2: Add a test (3 lines) to book3s_hv_rmhandlers.S to ensure that we
don't subtract the timebase offset in cases where we didn't add it.
This fixes a bug found in testing where the timebase could get
. These implementations
have been tested using a FreeBSD guest.
Signed-off-by: Paul Mackerras pau...@samba.org
---
arch/powerpc/kvm/book3s_hv_rm_mmu.c | 126 ++--
arch/powerpc/kvm/book3s_hv_rmhandlers.S | 4 +-
2 files changed, 121 insertions(+), 9 deletions(-)
diff --git a/arch
, since we haven't switched to the guest context.
Signed-off-by: Paul Mackerras pau...@samba.org
---
arch/powerpc/include/asm/kvm_book3s_asm.h | 20 ++
arch/powerpc/include/asm/kvm_host.h | 3 +
arch/powerpc/kernel/asm-offsets.c | 7 +
arch/powerpc/kvm/book3s_hv.c | 369
-by: Paul Mackerras pau...@samba.org
---
arch/powerpc/include/asm/kvm_book3s.h | 1 +
arch/powerpc/include/asm/kvm_host.h | 2 ++
arch/powerpc/kvm/book3s_64_mmu_hv.c | 8 +++-
arch/powerpc/kvm/book3s_hv_rm_mmu.c | 17 +
4 files changed, 27 insertions(+), 1 deletion
On Wed, Jun 17, 2015 at 07:30:09PM +0200, Laurent Vivier wrote:
Tested-by: Laurent Vivier lviv...@redhat.com
Performance is better, but Paul could you explain why it is better if I
disable dynamic micro-threading ?
Did I miss something ?
My test system is an IBM Power S822L.
I run
On Wed, Jun 17, 2015 at 07:30:09PM +0200, Laurent Vivier wrote:
Tested-by: Laurent Vivier lviv...@redhat.com
Performance is better, but Paul could you explain why it is better if I
disable dynamic micro-threading ?
Did I miss something ?
My test system is an IBM Power S822L.
I run
This patch series provides a way to use more of the capacity of each
processor core when running guests configured with threads=1, 2 or 4
on a POWER8 host with HV KVM, without having to change the static
micro-threading (the official name for split-core) mode for the whole
machine. The problem
that vcpu-arch.ptid is no longer necessarily the same as
the physical thread that the vcpu runs on. In order to make it easier
for code that wants to send an IPI to know which CPU to target, we
now store that in a new field in struct vcpu_arch, called thread_cpu.
Signed-off-by: Paul Mackerras pau
which are the primary thread
for their subcore and therefore need to do the MMU switch. These
threads will need to be started even if they have no vcpu to run, so
we use the vcore pointer in the PACA rather than the vcpu pointer to
trigger them.
Signed-off-by: Paul Mackerras pau...@samba.org
---
arch
This patch series provides a way to use more of the capacity of each
processor core when running guests configured with threads=1, 2 or 4
on a POWER8 host with HV KVM, without having to change the static
micro-threading (the official name for split-core) mode for the whole
machine. The problem
that vcpu-arch.ptid is no longer necessarily the same as
the physical thread that the vcpu runs on. In order to make it easier
for code that wants to send an IPI to know which CPU to target, we
now store that in a new field in struct vcpu_arch, called thread_cpu.
Signed-off-by: Paul Mackerras pau
which are the primary thread
for their subcore and therefore need to do the MMU switch. These
threads will need to be started even if they have no vcpu to run, so
we use the vcore pointer in the PACA rather than the vcpu pointer to
trigger them.
Signed-off-by: Paul Mackerras pau...@samba.org
---
arch
the access methods to
64 bits.
Signed-off-by: Sam Bobroff sam.bobr...@au1.ibm.com
Acked-by: Paul Mackerras pau...@samba.org
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On Wed, May 20, 2015 at 05:35:08PM -0500, Scott Wood wrote:
It's nominally a 64-bit register, but the upper 32 bits are reserved in
ISA 2.06. Do newer ISAs or certain implementations define things in the
upper 32 bits, or is this just about the asm accesses being wrong on
big-endian?
It's
3bdee368 419e0048 813e1b20 939e1b18 2f890001 409effcc
---[ end trace 8cdf50251cca6680 ]---
Fixes: 25fedfca94cf
Signed-off-by: Paul Mackerras pau...@samba.org
---
Since this is a regression fix for a patch that went in post 4.0,
it should go in for 4.1.
arch/powerpc/kvm/book3s_hv.c | 5 +++--
1
3bdee368 419e0048 813e1b20 939e1b18 2f890001 409effcc
---[ end trace 8cdf50251cca6680 ]---
Fixes: 25fedfca94cf
Signed-off-by: Paul Mackerras pau...@samba.org
---
Since this is a regression fix for a patch that went in post 4.0,
it should go in for 4.1.
arch/powerpc/kvm/book3s_hv.c | 5 +++--
1
On Tue, Apr 28, 2015 at 10:36:52AM +0530, Aneesh Kumar K.V wrote:
Paul Mackerras pau...@samba.org writes:
The reference (R) and change (C) bits in a HPT entry can be set by
hardware at any time up until the HPTE is invalidated and the TLB
invalidation sequence has completed. This means
On Tue, Apr 28, 2015 at 10:36:52AM +0530, Aneesh Kumar K.V wrote:
Paul Mackerras pau...@samba.org writes:
The reference (R) and change (C) bits in a HPT entry can be set by
hardware at any time up until the HPTE is invalidated and the TLB
invalidation sequence has completed. This means
-by: Paul Mackerras pau...@samba.org
---
arch/powerpc/include/asm/kvm_book3s.h | 1 +
arch/powerpc/include/asm/kvm_host.h | 2 ++
arch/powerpc/kvm/book3s_64_mmu_hv.c | 8 +++-
arch/powerpc/kvm/book3s_hv_rm_mmu.c | 17 +
4 files changed, 27 insertions(+), 1 deletion
and these implementations
are only compile tested.
Signed-off-by: Paul Mackerras pau...@samba.org
---
arch/powerpc/kvm/book3s_hv_rm_mmu.c | 126 ++--
arch/powerpc/kvm/book3s_hv_rmhandlers.S | 4 +-
2 files changed, 121 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/kvm
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