Marcelo, Hi,
I have been watching for this patch in the upstream but have not seen it yet.
What version of QEMU should it be in?
Thanks,
Will
-Original Message-
From: Marcelo Tosatti [mailto:mtosa...@redhat.com]
Sent: Friday, November 30, 2012 12:40 PM
To: Auld, Will
Cc: qemu
Thanks Marcelo!
-Original Message-
From: Marcelo Tosatti [mailto:mtosa...@redhat.com]
Sent: Friday, November 30, 2012 12:40 PM
To: Auld, Will
Cc: qemu-devel; Gleb; Andreas Farber; kvm@vger.kernel.org; Dugger,
Donald D; Liu, Jinsong; Zhang, Xiantao; a...@redhat.com
Subject: Re
I have re-based this patch set version (V6) to kvm.git's queue branch.
Will Auld (2):
Add code to track call origin for msr assignment.
Enabling IA32_TSC_ADJUST for KVM guest VM support
arch/x86/include/asm/cpufeature.h | 1 +
arch/x86/include/asm/kvm_host.h | 14 ---
arch/x86
as
individual parameters.
The initial use for this capability is for updating the IA32_TSC_ADJUST msr
while setting the tsc value. It is anticipated that this capability is
useful for other tasks.
Signed-off-by: Will Auld will.a...@intel.com
---
arch/x86/include/asm/kvm_host.h | 12 +---
arch/x86
a rdtsc. In this case the guest process will get
TSC + IA32_TSC_ADJUST_hyperviser + vmsc tsc_offset including
IA32_TSC_ADJUST_guest. While the total system semantics changed the semantics
as seen by the guest do not and hence this will not cause a problem.
Signed-off-by: Will Auld will.a...@intel.com
:44 PM
To: Auld, Will
Cc: kvm@vger.kernel.org; Dugger, Donald D; Liu, Jinsong; Zhang,
Xiantao; a...@redhat.com; qemu-devel; Gleb
Subject: Re: [PATCH V5 2/2] Enabling IA32_TSC_ADJUST for KVM guest VM
support
On Thu, Nov 29, 2012 at 07:21:28PM +, Auld, Will wrote:
Marcelo
Added x86/tsc_adjust.c and updated x86/vmexit.c to include timing tests
for reading and writing the emulated IA32_TSC_ADJUST msr.
Signed-off-by: Will Auld will.a...@intel.com
---
config-x86-common.mak | 5 -
x86/tsc_adjust.c | 60 +++
x86
Thanks Marcelo!
-Original Message-
From: Marcelo Tosatti [mailto:mtosa...@redhat.com]
Sent: Wednesday, November 28, 2012 2:14 PM
To: Auld, Will
Cc: kvm@vger.kernel.org; Dugger, Donald D; Liu, Jinsong; Zhang,
Xiantao; a...@redhat.com; Gleb
Subject: Re: [PATCH V2] Added tests
: Gleb Natapov [mailto:g...@redhat.com]
Sent: Monday, November 26, 2012 10:59 PM
To: Auld, Will
Cc: qemu-devel; mtosa...@redhat.com; kvm@vger.kernel.org; Dugger,
Donald D; Liu, Jinsong; Zhang, Xiantao; a...@redhat.com
Subject: Re: [PATCH V4 1/2] Add code to track call origin for msr
assignment
With this version (V5) I have gone back the the V3 implementation of
emulator_set_msr() but changing the
bool to false.
Will Auld (2):
Add code to track call origin for msr assignment.
Enabling IA32_TSC_ADJUST for KVM guest VM support
arch/x86/include/asm/cpufeature.h | 1 +
arch/x86
as
individual parameters.
The initial use for this capability is for updating the IA32_TSC_ADJUST
msr while setting the tsc value. It is anticipated that this capability
is useful other tasks.
Signed-off-by: Will Auld will.a...@intel.com
---
arch/x86/include/asm/kvm_host.h | 12 +---
arch/x86/kvm
a rdtsc. In this case the guest process will get TSC +
IA32_TSC_ADJUST_hyperviser + vmsc tsc_offset including IA32_TSC_ADJUST_guest.
While the total system semantics changed the semantics as seen by the guest
do not and hence this will not cause a problem.
Signed-off-by: Will Auld will.a...@intel.com
not sure what I need
to do. Will you explain or give me the needed path?
Thanks,
Will
-Original Message-
From: Marcelo Tosatti [mailto:mtosa...@redhat.com]
Sent: Tuesday, November 27, 2012 5:00 PM
To: Auld, Will
Cc: kvm@vger.kernel.org; Dugger, Donald D; Liu, Jinsong; Zhang,
Xiantao
Resending these as the mail seems to have not fully worked last Wed.
Marcelo,
I have addressed your comments for this patch set (V3), the following patch for
QEMU-KVM and for adding a test
case for tsc_adjust also to follow today.
Thanks,
Will
Will Auld (2):
Add code to track call
as
individual parameters.
The initial use for this capability is for updating the IA32_TSC_ADJUST
msr while setting the tsc value. It is anticipated that this capability
is useful other tasks.
Signed-off-by: Will Auld will.a...@intel.com
---
arch/x86/include/asm/kvm_host.h | 12 +---
arch/x86/kvm
a rdtsc. In this case the guest process will get TSC +
IA32_TSC_ADJUST_hyperviser + vmsc tsc_offset including IA32_TSC_ADJUST_guest.
While the total system semantics changed the semantics as seen by the guest
do not and hence this will not cause a problem.
Signed-off-by: Will Auld will.a...@intel.com
-by: Will Auld will.a...@intel.com
---
target-i386/cpu.h | 2 ++
target-i386/kvm.c | 15 +++
target-i386/machine.c | 21 +
3 files changed, 38 insertions(+)
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index aabf993..13d4152 100644
--- a/target-i386/cpu.h
but then rejected agreeing that the
msr_data structure would be a better solution. This was base on discussion with
both Avi and Marcelo. I will leave this as is.
Thanks,
Will
-Original Message-
From: Gleb Natapov [mailto:g...@redhat.com]
Sent: Monday, November 26, 2012 10:47 AM
To: Auld
This reversion, V4, addresses a couple of issues I missed from Gleb and Marcelo.
Thanks, Will
Will Auld (2):
Add code to track call origin for msr assignment.
Enabling IA32_TSC_ADJUST for KVM guest VM support
arch/x86/include/asm/cpufeature.h | 1 +
arch/x86/include/asm/kvm_host.h | 15
as
individual parameters.
The initial use for this capability is for updating the IA32_TSC_ADJUST
msr while setting the tsc value. It is anticipated that this capability
is useful other tasks.
Signed-off-by: Will Auld will.a...@intel.com
---
arch/x86/include/asm/kvm_host.h | 12 +---
arch/x86/kvm
a rdtsc. In this case the guest process will get TSC +
IA32_TSC_ADJUST_hyperviser + vmsc tsc_offset including IA32_TSC_ADJUST_guest.
While the total system semantics changed the semantics as seen by the guest
do not and hence this will not cause a problem.
Signed-off-by: Will Auld will.a...@intel.com
-by: Will Auld will.a...@intel.com
---
target-i386/cpu.h | 2 ++
target-i386/kvm.c | 15 +++
target-i386/machine.c | 21 +
3 files changed, 38 insertions(+)
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index aabf993..13d4152 100644
--- a/target-i386/cpu.h
Andreas,
Thanks. I just sent the update patch (V3) to address your comments.
Will
-Original Message-
From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org] On
Behalf Of Andreas Färber
Sent: Monday, November 26, 2012 11:05 AM
To: Auld, Will
Cc: Will Auld; qemu-devel
Sorry, let me figure this out and resend.
Thanks,
Will
-Original Message-
From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org] On
Behalf Of Andreas Färber
Sent: Monday, November 26, 2012 5:51 PM
To: Auld, Will
Cc: Will Auld; qemu-devel; Gleb; mtosa...@redhat.com
-by: Will Auld will.a...@intel.com
---
target-i386/cpu.h | 2 ++
target-i386/kvm.c | 14 ++
target-i386/machine.c | 21 +
3 files changed, 37 insertions(+)
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index aabf993..9dedaa6 100644
--- a/target-i386/cpu.h
+++ b
-by: Will Auld will.a...@intel.com
---
Andreas,
Thanks, that helped. I used Stefan's auto-run method this time.
Will
target-i386/cpu.h | 2 ++
target-i386/kvm.c | 14 ++
target-i386/machine.c | 21 +
3 files changed, 37 insertions(+)
diff --git a/target-i386
-by: Will Auld will.a...@intel.com
---
target-i386/cpu.h | 2 ++
target-i386/kvm.c | 15 +++
target-i386/machine.c | 21 +
3 files changed, 38 insertions(+)
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index aabf993..13d4152 100644
--- a/target-i386/cpu.h
Signed-off-by: Will Auld will.a...@intel.com
---
config-x86-common.mak | 5 -
x86/tsc_adjust.c | 43 +++
2 files changed, 47 insertions(+), 1 deletion(-)
create mode 100644 x86/tsc_adjust.c
diff --git a/config-x86-common.mak b/config-x86
-by: Will Auld will.a...@intel.com
---
target-i386/cpu.h | 2 ++
target-i386/kvm.c | 15 +++
target-i386/machine.c | 21 +
3 files changed, 38 insertions(+)
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index aabf993..13d4152 100644
--- a/target-i386/cpu.h
as
individual parameters.
The initial use for this capability is for updating the IA32_TSC_ADJUST
msr while setting the tsc value. It is anticipated that this capability
is useful other tasks.
Signed-off-by: Will Auld will.a...@intel.com
---
arch/x86/include/asm/kvm_host.h | 12 +---
arch/x86/kvm
as
individual parameters.
The initial use for this capability is for updating the IA32_TSC_ADJUST
msr while setting the tsc value. It is anticipated that this capability
is useful other tasks.
Signed-off-by: Will Auld will.a...@intel.com
---
arch/x86/include/asm/kvm_host.h | 12 +---
arch/x86/kvm
a rdtsc. In this case the guest process will get TSC +
IA32_TSC_ADJUST_hyperviser + vmsc tsc_offset including IA32_TSC_ADJUST_guest.
While the total system semantics changed the semantics as seen by the guest
do not and hence this will not cause a problem.
Signed-off-by: Will Auld will.a...@intel.com
Marcelo,
I have addressed your comments for this patch set, the following patch for
QEMU-KVM and for adding a test
case for tsc_adjust also to follow today.
Thanks,
Will
Will Auld (2):
Add code to track call origin for msr assignment.
Enabling IA32_TSC_ADJUST for KVM guest VM support
a rdtsc. In this case the guest process will get TSC +
IA32_TSC_ADJUST_hyperviser + vmsc tsc_offset including IA32_TSC_ADJUST_guest.
While the total system semantics changed the semantics as seen by the guest
do not and hence this will not cause a problem.
Signed-off-by: Will Auld will.a...@intel.com
Adding Gleb.
This is a resend of the patches for TSC_ADJUST functionality. The two KVM
patches and an additional QEMU-KVM patch
together provide this support.
Will Auld (2):
Add code to track call origin for msr assignment.
Enabling IA32_TSC_ADJUST for KVM guest VM support
arch/x86
as
individual parameters.
The initial use for this capability is for updating the IA32_TSC_ADJUST
msr while setting the tsc value. It is anticipated that this capability
is useful other tasks.
Signed-off-by: Will Auld will.a...@intel.com
---
arch/x86/include/asm/kvm_host.h | 12 +---
arch/x86/kvm
a rdtsc. In this case the guest process will get TSC +
IA32_TSC_ADJUST_hyperviser + vmsc tsc_offset including IA32_TSC_ADJUST_guest.
While the total system semantics changed the semantics as seen by the guest
do not and hence this will not cause a problem.
Signed-off-by: Will Auld will.a...@intel.com
-by: Will Auld will.a...@intel.com
---
target-i386/cpu.h | 4 +++-
target-i386/kvm.c | 15 +++
target-i386/machine.c | 21 +
3 files changed, 39 insertions(+), 1 deletion(-)
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index aabf993..7ca99c0 100644
a rdtsc. In this case the guest process will get TSC +
IA32_TSC_ADJUST_hyperviser + vmsc tsc_offset including IA32_TSC_ADJUST_guest.
While the total system semantics changed the semantics as seen by the guest
do not and hence this will not cause a problem.
Signed-off-by: Will Auld will.a...@intel.com
as
individual parameters.
The initial use for this capability is for updating the IA32_TSC_ADJUST
msr while setting the tsc value. It is anticipated that this capability
is useful for other tasks.
Signed-off-by: Will Auld will.a...@intel.com
---
arch/x86/include/asm/kvm_host.h | 12 +---
arch/x86
as
individual parameters.
The initial use for this capability is for updating the IA32_TSC_ADJUST
msr while setting the tsc value. It is anticipated that this capability
is useful for other tasks.
Signed-off-by: Will Auld will.a...@intel.com
---
arch/x86/include/asm/kvm_host.h | 18
can't be sure. If it is not possible we can set a
variable for the vcpu when a guest call is in progress and this would be
sufficient.
What do you think?
Thanks,
Will
-Original Message-
From: Will Auld [mailto:will.auld.in...@gmail.com]
Sent: Monday, October 22, 2012 2:58 PM
To: Avi
OK, agreed it is not pretty.
Thanks,
Will
-Original Message-
From: Marcelo Tosatti [mailto:mtosa...@redhat.com]
Sent: Wednesday, October 17, 2012 7:09 AM
To: Avi Kivity
Cc: Auld, Will; Will Auld; kvm@vger.kernel.org; Zhang, Xiantao; Liu,
Jinsong
Subject: Re: [PATCH] Added call
Signed-off-by: Will Auld will.a...@intel.com
---
Resending to full list
Marcelo,
This patch is what I believe you ask for as foundational for later
patches to address IA32_TSC_ADJUST.
Thanks,
Will
arch/x86/include/asm/kvm_host.h | 8
arch/x86/kvm/svm.c | 18
,
Will
-Original Message-
From: Marcelo Tosatti [mailto:mtosa...@redhat.com]
Sent: Wednesday, October 10, 2012 5:53 AM
To: Auld, Will
Cc: Avi Kivity; kvm@vger.kernel.org; Zhang, Xiantao; Liu, Jinsong
Subject: Re: [PATCH] Enabling IA32_TSC_ADJUST for guest VM
On Tue, Oct 09, 2012 at 04:10
, October 09, 2012 5:12 AM
To: Marcelo Tosatti
Cc: Auld, Will; kvm@vger.kernel.org; Zhang, Xiantao
Subject: Re: [PATCH] Enabling IA32_TSC_ADJUST for guest VM
On 10/08/2012 07:30 PM, Marcelo Tosatti wrote:
From Intel's manual:
• If an execution of WRMSR to the IA32_TIME_STAMP_COUNTER MSR adds
Marcelo,
I tagged my comments below with [auld] to make it easier to read.
Thanks,
Will
-Original Message-
From: Marcelo Tosatti [mailto:mtosa...@redhat.com]
Sent: Thursday, September 27, 2012 4:49 AM
To: Auld, Will
Cc: kvm@vger.kernel.org; Avi Kivity; Zhang, Xiantao; Liu, Jinsong
is to provide proper
synchronized TSC across cores, and newer guests which should already make use
of paravirt clock interface, what is the point of exposing the feature?
-Original Message-
From: Marcelo Tosatti [mailto:mtosa...@redhat.com]
Sent: Wednesday, September 26, 2012 2:35 PM
To: Auld
, September 26, 2012 5:29 PM
To: Auld, Will
Cc: kvm@vger.kernel.org; Avi Kivity; Zhang, Xiantao; Liu, Jinsong
Subject: Re: [PATCH] Enabling IA32_TSC_ADJUST for guest VM
On Wed, Sep 26, 2012 at 10:58:46PM +, Auld, Will wrote:
Avi, Still working on your suggestions.
Marcelo,
The purpose
From 9982bb73460b05c1328068aae047b14b2294e2da Mon Sep 17 00:00:00 2001
From: Will Auld will.a...@intel.com
Date: Wed, 12 Sep 2012 18:10:56 -0700
Subject: [PATCH] Enabling IA32_TSC_ADJUST for guest VM
CPUID.7.0.EBX[1]=1 indicates IA32_TSC_ADJUST MSR 0x3b is supported
Basic design is to emulate
From 9d5201975d2c9da4da8a945fcd9531c9fb2073c0 Mon Sep 17 00:00:00 2001
From: Will Auld will.a...@intel.com
Date: Wed, 12 Sep 2012 18:31:41 -0700
Subject: [PATCH] Enabling IA32_TSC_ADJUST for Qemu KVM guest VMs
CPUID.7.0.EBX[1]=1 indicates IA32_TSC_ADJUST MSR 0x3b is supported
Basic design
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