On Mon, Oct 12, 2015 at 10:55:24AM +0100, Suzuki K. Poulose wrote:
> On 10/10/15 15:52, Christoffer Dall wrote:
> >Hi Suzuki,
>
> Hi Christoffer,
>
> Thanks for being patient enough to review the code :-) without much of
> the comments. I now realise there needs much more documentation than
>
On 13/10/15 16:39, Christoffer Dall wrote:
On Mon, Oct 12, 2015 at 10:55:24AM +0100, Suzuki K. Poulose wrote:
On 10/10/15 15:52, Christoffer Dall wrote:
Hi Suzuki,
Hi Christoffer,
Thanks for being patient enough to review the code :-) without much of
the comments. I now realise there needs
On 10/10/15 15:52, Christoffer Dall wrote:
Hi Suzuki,
Hi Christoffer,
Thanks for being patient enough to review the code :-) without much of
the comments. I now realise there needs much more documentation than
what I have put in already. I am taking care of this in the next
revision already.
Hi Suzuki,
On Tue, Sep 15, 2015 at 04:41:22PM +0100, Suzuki K. Poulose wrote:
> From: "Suzuki K. Poulose"
>
> The existing fake pgd handling code assumes that the stage-2 entry
> level can only be one level down that of the host, which may not be
> true always(e.g, with
On 15/09/15 16:41, Suzuki K. Poulose wrote:
> From: "Suzuki K. Poulose"
>
> The existing fake pgd handling code assumes that the stage-2 entry
> level can only be one level down that of the host, which may not be
> true always(e.g, with the introduction of 16k pagesize).
On 07/10/15 12:13, Marc Zyngier wrote:
On 15/09/15 16:41, Suzuki K. Poulose wrote:
From: "Suzuki K. Poulose"
The existing fake pgd handling code assumes that the stage-2 entry
level can only be one level down that of the host, which may not be
true always(e.g, with the
From: "Suzuki K. Poulose"
The existing fake pgd handling code assumes that the stage-2 entry
level can only be one level down that of the host, which may not be
true always(e.g, with the introduction of 16k pagesize).
e.g.
With 16k page size and 48bit VA and 40bit IPA we